Searched refs:rMEMP0 (Results 1 – 6 of 6) sorted by relevance
/glibc-2.36/sysdeps/powerpc/powerpc64/ |
D | memset.S | 44 #define rMEMP0 r3 /* Original value of 1st arg. */ macro 57 andi. rALIGN, rMEMP0, 7 58 mr rMEMP, rMEMP0 65 mtcrf 0x01, rMEMP0 74 stb rCHR, 0(rMEMP0) 85 stb rCHR, 0(rMEMP0)
|
/glibc-2.36/sysdeps/powerpc/powerpc64/power4/ |
D | memset.S | 37 #define rMEMP0 r3 /* Original value of 1st arg. */ macro 50 andi. rALIGN, rMEMP0, 7 51 mr rMEMP, rMEMP0 58 mtcrf 0x01, rMEMP0 67 stb rCHR, 0(rMEMP0) 78 stb rCHR, 0(rMEMP0)
|
/glibc-2.36/sysdeps/powerpc/powerpc32/power4/ |
D | memset.S | 34 #define rMEMP0 r3 /* Original value of 1st arg. */ macro 47 andi. rALIGN, rMEMP0, 3 48 mr rMEMP, rMEMP0 55 mtcrf 0x01, rMEMP0 60 stb rCHR, 0(rMEMP0)
|
/glibc-2.36/sysdeps/powerpc/powerpc32/ |
D | memset.S | 35 #define rMEMP0 r3 /* original value of 1st arg */ macro 52 andi. rALIGN, rMEMP0, 3 53 mr rMEMP, rMEMP0 59 mtcrf 0x01, rMEMP0 64 stb rCHR, 0(rMEMP0)
|
/glibc-2.36/sysdeps/powerpc/powerpc64/power6/ |
D | memset.S | 37 #define rMEMP0 r3 /* Original value of 1st arg. */ macro 47 andi. rALIGN, rMEMP0, 7 48 mr rMEMP, rMEMP0 55 mtcrf 0x01, rMEMP0 64 stb rCHR, 0(rMEMP0) 75 stb rCHR, 0(rMEMP0)
|
/glibc-2.36/sysdeps/powerpc/powerpc32/power6/ |
D | memset.S | 34 #define rMEMP0 r3 /* Original value of 1st arg. */ macro 46 andi. rALIGN, rMEMP0, 3 47 mr rMEMP, rMEMP0 53 mtcrf 0x01, rMEMP0 58 stb rCHR, 0(rMEMP0)
|