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/glibc-2.36/sysdeps/x86_64/fpu/multiarch/
Dsvml_d_atanh8_core_avx512.S50 #define poly_coeff0 1024 macro
148 vmovups poly_coeff0+__svml_datanh_data_internal_avx512(%rip), %zmm8
308 __declspec(align(64)) VUINT32 poly_coeff0[8][2];