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Searched refs:new_exc (Results 1 – 16 of 16) sorted by relevance

/glibc-2.36/sysdeps/m68k/fpu/
Dfeenablxcpt.c24 unsigned int new_exc, old_exc; in feenableexcept() local
27 __asm__ ("fmove%.l %!,%0" : "=dm" (new_exc)); in feenableexcept()
29 old_exc = (new_exc >> 6) & FE_ALL_EXCEPT; in feenableexcept()
33 new_exc |= excepts << 6; in feenableexcept()
34 __asm__ ("fmove%.l %0,%!" : : "dm" (new_exc)); in feenableexcept()
Dfedisblxcpt.c24 unsigned int old_exc, new_exc; in fedisableexcept() local
27 __asm__ ("fmove%.l %!,%0" : "=dm" (new_exc)); in fedisableexcept()
29 old_exc = (new_exc >> 6) & FE_ALL_EXCEPT; in fedisableexcept()
33 new_exc &= ~(excepts << 6); in fedisableexcept()
34 __asm__ ("fmove%.l %0,%!" : : "dm" (new_exc)); in fedisableexcept()
/glibc-2.36/sysdeps/sparc/fpu/
Dfedisblxcpt.c25 fenv_t new_exc, old_exc; in fedisableexcept() local
27 __fenv_stfsr (new_exc); in fedisableexcept()
29 old_exc = (new_exc >> 18) & FE_ALL_EXCEPT; in fedisableexcept()
30 new_exc &= ~(((fenv_t)excepts & FE_ALL_EXCEPT) << 18); in fedisableexcept()
32 __fenv_ldfsr (new_exc); in fedisableexcept()
Dfeenablxcpt.c25 fenv_t new_exc, old_exc; in feenableexcept() local
27 __fenv_stfsr (new_exc); in feenableexcept()
29 old_exc = (new_exc >> 18) & FE_ALL_EXCEPT; in feenableexcept()
30 new_exc |= (((fenv_t)excepts & FE_ALL_EXCEPT) << 18); in feenableexcept()
32 __fenv_ldfsr (new_exc); in feenableexcept()
/glibc-2.36/sysdeps/alpha/fpu/
Dfedisblxcpt.c24 unsigned long int new_exc, old_exc; in fedisableexcept() local
26 new_exc = __ieee_get_fp_control (); in fedisableexcept()
28 old_exc = (new_exc & SWCR_ENABLE_MASK) << SWCR_ENABLE_SHIFT; in fedisableexcept()
29 new_exc &= ~((excepts >> SWCR_ENABLE_SHIFT) & SWCR_ENABLE_MASK); in fedisableexcept()
31 __ieee_set_fp_control (new_exc); in fedisableexcept()
Dfeenablxcpt.c24 unsigned long int new_exc, old_exc; in feenableexcept() local
26 new_exc = __ieee_get_fp_control (); in feenableexcept()
28 old_exc = (new_exc & SWCR_ENABLE_MASK) << SWCR_ENABLE_SHIFT; in feenableexcept()
29 new_exc |= (excepts >> SWCR_ENABLE_SHIFT) & SWCR_ENABLE_MASK; in feenableexcept()
31 __ieee_set_fp_control (new_exc); in feenableexcept()
/glibc-2.36/sysdeps/csky/fpu/
Dfeenablxcpt.c26 unsigned int new_exc, old_exc; in feenableexcept() local
29 _FPU_GETCW (new_exc); in feenableexcept()
31 old_exc = (new_exc & ENABLE_MASK) >> ENABLE_SHIFT; in feenableexcept()
35 new_exc |= excepts << ENABLE_SHIFT; in feenableexcept()
37 _FPU_SETCW (new_exc); in feenableexcept()
Dfedisblxcpt.c26 unsigned int new_exc, old_exc; in fedisableexcept() local
29 _FPU_GETCW (new_exc); in fedisableexcept()
31 old_exc = (new_exc & ENABLE_MASK) >> ENABLE_SHIFT; in fedisableexcept()
35 new_exc &= ~(excepts << ENABLE_SHIFT); in fedisableexcept()
38 _FPU_SETCW (new_exc); in fedisableexcept()
/glibc-2.36/sysdeps/loongarch/fpu/
Dfedisblxcpt.c26 unsigned int new_exc, old_exc; in fedisableexcept() local
29 _FPU_GETCW (new_exc); in fedisableexcept()
31 old_exc = (new_exc & ENABLE_MASK) << ENABLE_SHIFT; in fedisableexcept()
35 new_exc &= ~(excepts >> ENABLE_SHIFT); in fedisableexcept()
36 _FPU_SETCW (new_exc); in fedisableexcept()
Dfeenablxcpt.c26 unsigned int new_exc, old_exc; in feenableexcept() local
29 _FPU_GETCW (new_exc); in feenableexcept()
31 old_exc = (new_exc & ENABLE_MASK) << ENABLE_SHIFT; in feenableexcept()
35 new_exc |= excepts >> ENABLE_SHIFT; in feenableexcept()
36 _FPU_SETCW (new_exc); in feenableexcept()
/glibc-2.36/sysdeps/mips/fpu/
Dfeenablxcpt.c26 unsigned int new_exc, old_exc; in feenableexcept() local
29 _FPU_GETCW (new_exc); in feenableexcept()
31 old_exc = (new_exc & ENABLE_MASK) >> ENABLE_SHIFT; in feenableexcept()
35 new_exc |= excepts << ENABLE_SHIFT; in feenableexcept()
36 _FPU_SETCW (new_exc); in feenableexcept()
Dfedisblxcpt.c26 unsigned int new_exc, old_exc; in fedisableexcept() local
29 _FPU_GETCW (new_exc); in fedisableexcept()
31 old_exc = (new_exc & ENABLE_MASK) >> ENABLE_SHIFT; in fedisableexcept()
35 new_exc &= ~(excepts << ENABLE_SHIFT); in fedisableexcept()
36 _FPU_SETCW (new_exc); in fedisableexcept()
/glibc-2.36/sysdeps/x86_64/fpu/
Dfedisblxcpt.c24 unsigned short int new_exc, old_exc; in fedisableexcept() local
30 __asm__ ("fstcw %0" : "=m" (*&new_exc)); in fedisableexcept()
32 old_exc = (~new_exc) & FE_ALL_EXCEPT; in fedisableexcept()
34 new_exc |= excepts; in fedisableexcept()
35 __asm__ ("fldcw %0" : : "m" (*&new_exc)); in fedisableexcept()
Dfeenablxcpt.c24 unsigned short int new_exc, old_exc; in feenableexcept() local
30 __asm__ ("fstcw %0" : "=m" (*&new_exc)); in feenableexcept()
32 old_exc = (~new_exc) & FE_ALL_EXCEPT; in feenableexcept()
34 new_exc &= ~excepts; in feenableexcept()
35 __asm__ ("fldcw %0" : : "m" (*&new_exc)); in feenableexcept()
/glibc-2.36/sysdeps/i386/fpu/
Dfedisblxcpt.c27 unsigned short int new_exc, old_exc; in fedisableexcept() local
30 __asm__ ("fstcw %0" : "=m" (*&new_exc)); in fedisableexcept()
32 old_exc = (~new_exc) & FE_ALL_EXCEPT; in fedisableexcept()
36 new_exc |= excepts; in fedisableexcept()
37 __asm__ ("fldcw %0" : : "m" (*&new_exc)); in fedisableexcept()
Dfeenablxcpt.c27 unsigned short int new_exc; in feenableexcept() local
31 __asm__ ("fstcw %0" : "=m" (*&new_exc)); in feenableexcept()
34 old_exc = (~new_exc) & FE_ALL_EXCEPT; in feenableexcept()
36 new_exc &= ~excepts; in feenableexcept()
37 __asm__ ("fldcw %0" : : "m" (*&new_exc)); in feenableexcept()