/glibc-2.36/sysdeps/ia64/fpu/ |
D | e_exp.S | 194 fTmp = f49 define 463 fmpy.s0 fTmp = fLn2_by_128_lo, fLn2_by_128_lo // Force inexact 594 setf.exp fTmp = rTmp 606 fma.d.s0 FR_RESULT = fTmp, fTmp, fTmp // Set I,O and +INF result 684 setf.exp fTmp = rTmp // Form small normal 691 fmerge.se fTmp = fTmp, fLn2_by_128_lo // Small with signif lsb 1 698 fma.d.s0 f8 = fTmp, fTmp, f0 // Set I,U, tiny (+0.0) result
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D | s_floor.S | 69 fTmp = f11 define 126 setf.sig fTmp = rM1 // Make const for setting inexact 195 (p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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D | s_floorf.S | 68 fTmp = f11 define 125 setf.sig fTmp = rM1 // Make const for setting inexact 194 (p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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D | s_floorl.S | 68 fTmp = f11 define 125 setf.sig fTmp = rM1 // Make const for setting inexact 194 (p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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D | s_rint.S | 69 fTmp = f11 define 122 setf.sig fTmp = rM1 // Make const for setting inexact 175 (p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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D | s_rintf.S | 69 fTmp = f11 define 122 setf.sig fTmp = rM1 // Make const for setting inexact 175 (p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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D | s_rintl.S | 69 fTmp = f11 define 122 setf.sig fTmp = rM1 // Make const for setting inexact 175 (p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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D | e_expf.S | 174 fTmp = f39 define 513 setf.exp fTmp = r17ones_m1 525 fma.s.s0 FR_RESULT = fTmp, fTmp, fTmp // Set I,O and +INF result 603 setf.exp fTmp = rTmp // Form small normal 610 fmerge.se fTmp = fTmp, f64DivLn2 // Small with non-trial signif 617 fma.s.s0 f8 = fTmp, fTmp, f0 // Set I,U, tiny (+0.0) result
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D | s_ceil.S | 68 fTmp = f11 define 125 setf.sig fTmp = rM1 // Make const for setting inexact 203 (p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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D | s_ceilf.S | 68 fTmp = f11 define 125 setf.sig fTmp = rM1 // Make const for setting inexact 203 (p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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D | s_ceill.S | 68 fTmp = f11 define 125 setf.sig fTmp = rM1 // Make const for setting inexact 203 (p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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D | e_sinhf.S | 194 fTmp = f39 define 493 fmpy.s0 fTmp = fLn2Div64, fLn2Div64 // Force inexact 575 fmpy.s0 fTmp = fA4, fA4 664 setf.exp fTmp = r17ones_m1 671 (p6) fnma.s.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and -INF result 676 (p7) fma.s.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and +INF result
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D | s_expm1f.S | 189 fTmp = f41 define 480 (p13) setf.exp fTmp = rTmp // Make small value for -1 path 535 fms.s.s0 f8 = fTmp, fTmp, f1 // Result -1, and Inexact set 596 setf.exp fTmp = rTmp 608 fma.s.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and +INF result
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D | s_expm1.S | 215 fTmp = f58 define 572 fmpy.s0 fTmp = fLn2_by_128_lo, fLn2_by_128_lo // Force inexact 789 setf.exp fTmp = rTmp 801 fma.d.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and +INF result 820 setf.exp fTmp = rTmp 827 fms.d.s0 FR_RESULT = fTmp, fTmp, f1 // Set I, rounded -1+eps result
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D | e_sinh.S | 204 fTmp = f49 define 629 fmpy.s0 fTmp = fLn2_by_128_lo, fLn2_by_128_lo // Force inexact 736 fmpy.s0 fTmp = fA6, fA6 825 setf.exp fTmp = rTmp 832 (p6) fnma.d.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and -INF result 837 (p7) fma.d.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and +INF result
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D | e_coshf.S | 190 fTmp = f39 define 488 fmpy.s0 fTmp = fLn2Div64, fLn2Div64 // Force inexact 560 fmpy.s0 fTmp = fA4, fA4 627 setf.exp fTmp = r17ones_m1 639 fma.s.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and +INF result
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D | e_cosh.S | 200 fTmp = f49 define 623 fmpy.s0 fTmp = fLn2_by_128_lo, fLn2_by_128_lo // Force inexact 719 fmpy.s0 fTmp = fA6, fA6 786 setf.exp fTmp = rTmp 798 fma.d.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and +INF result
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D | s_ilogb.S | 100 fTmp = f9 define 146 (p6) fma.s0 fTmp = f8, f8, f0 // Dummy to set Invalid flag
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D | s_ilogbf.S | 100 fTmp = f9 define 146 (p6) fma.s0 fTmp = f8, f8, f0 // Dummy to set Invalid flag
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D | e_ilogbl.S | 100 fTmp = f9 define 146 (p6) fma.s0 fTmp = f8, f8, f0 // Dummy to set Invalid flag
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