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Searched refs:_iIndexMask (Results 1 – 11 of 11) sorted by relevance

/glibc-2.36/sysdeps/x86_64/fpu/multiarch/
Dsvml_s_exp10f4_core_sse4.S54 #define _iIndexMask 240 macro
91 movdqu _iIndexMask+__svml_sexp10_data_internal(%rip), %xmm3
246 __declspec(align(16)) VUINT32 _iIndexMask[4][1];
Dsvml_s_exp10f8_core_avx2.S54 #define _iIndexMask 352 macro
74 vmovups _iIndexMask+__svml_sexp10_data_internal(%rip), %ymm2
266 __declspec(align(32)) VUINT32 _iIndexMask[8][1];
Dsvml_d_cosh2_core_sse4.S42 #define _iIndexMask 2128 macro
98 movq _iIndexMask+__svml_dcosh_data_internal(%rip), %xmm8
291 __declspec(align(16)) VUINT32 _iIndexMask[4][1]; // (1<<K)1-
Dsvml_d_exp104_core_avx2.S57 #define _iIndexMask 1344 macro
111 vandps _iIndexMask+__svml_dexp10_data_internal(%rip), %xmm9, %xmm10
262 __declspec(align(32)) VUINT32 _iIndexMask[8][1];
Dsvml_d_exp102_core_sse4.S57 #define _iIndexMask 1184 macro
101 movq _iIndexMask+__svml_dexp10_data_internal(%rip), %xmm5
251 __declspec(align(16)) VUINT32 _iIndexMask[4][1];
Dsvml_d_cosh4_core_avx2.S42 #define _iIndexMask 2208 macro
89 vpand _iIndexMask+__svml_dcosh_data_internal(%rip), %xmm13, %xmm15
307 __declspec(align(32)) VUINT32 _iIndexMask[8][1]; // (1<<K)1-
Dsvml_d_pow8_core_avx512.S110 vpandd _iIndexMask(%rax), %zmm10, %zmm5{%k1}
425 vpand _iIndexMask(%rax), %ymm7, %ymm15
Dsvml_d_pow4_core_avx2.S104 vandps _iIndexMask(%rax), %xmm5, %xmm3
Dsvml_d_pow2_core_sse4.S97 movq _iIndexMask(%rdx), %xmm14
/glibc-2.36/sysdeps/x86_64/fpu/
Dsvml_d_pow_data.h79 #define _iIndexMask 40384 macro
Dsvml_d_pow_data.S4846 float_vector _iIndexMask 0x000ffe00