| /glibc-2.36/sysdeps/x86_64/fpu/multiarch/ |
| D | svml_s_exp2f16_core_avx512.S | 61 #define Threshold 384 macro
83 vmovups Threshold+__svml_sexp2_data_internal_avx512(%rip), %zmm2
235 __declspec(align(64)) VUINT32 Threshold[16][1];
|
| D | svml_d_exp28_core_avx512.S | 64 #define Threshold 640 macro
94 vmovups Threshold+__svml_dexp2_data_internal_avx512(%rip), %zmm2
256 __declspec(align(64)) VUINT32 Threshold[8][2];
|
| D | svml_s_exp10f16_core_avx512.S | 41 #define Threshold 640 macro
70 vmovups Threshold+__svml_sexp10_data_internal_avx512(%rip), %zmm13
214 __declspec(align(64)) VUINT32 Threshold[16][1];
|
| D | svml_s_expm1f16_core_avx512.S | 38 #define Threshold 384 macro
68 vmovups Threshold+__svml_sexpm1_data_internal_avx512(%rip), %zmm2
218 __declspec(align(64)) VUINT32 Threshold[16][1];
|
| D | svml_d_exp108_core_avx512.S | 46 #define Threshold 896 macro
70 vmovups Threshold+__svml_dexp10_data_internal_avx512(%rip), %zmm14
224 __declspec(align(64)) VUINT32 Threshold[8][2];
|
| D | svml_s_expm1f4_core_sse4.S | 41 #define Threshold 704 macro
79 cmpnleps Threshold+__svml_sexpm1_data_internal(%rip), %xmm8
243 __declspec(align(16)) VUINT32 Threshold[4][1];
|
| D | svml_s_expm1f8_core_avx2.S | 41 #define Threshold 896 macro
69 vcmpnle_uqps Threshold+__svml_sexpm1_data_internal(%rip), %ymm6, %ymm7
242 __declspec(align(32)) VUINT32 Threshold[8][1];
|
| D | svml_d_expm18_core_avx512.S | 38 #define Threshold 384 macro
67 vmovups Threshold+__svml_dexpm1_data_internal_avx512(%rip), %zmm3
235 __declspec(align(64)) VUINT32 Threshold[8][2];
|
| D | svml_s_acoshf16_core_avx512.S | 43 #define Threshold 384 macro
82 vmovups Threshold+__svml_sacosh_data_internal_avx512(%rip), %zmm10
314 __declspec(align(64)) VUINT32 Threshold[16][1];
|
| D | svml_d_expm12_core_sse4.S | 41 #define Threshold 2240 macro
95 cmpnlepd Threshold+__svml_dexpm1_data_internal(%rip), %xmm6
242 __declspec(align(16)) VUINT32 Threshold[2][2];
|
| D | svml_d_expm14_core_avx2.S | 41 #define Threshold 2432 macro
69 vcmpnle_uqpd Threshold+__svml_dexpm1_data_internal(%rip), %ymm6, %ymm7
235 __declspec(align(32)) VUINT32 Threshold[4][2];
|
| D | svml_s_asinhf16_core_avx512.S | 42 #define Threshold 448 macro
135 vmovups Threshold+__svml_sasinh_data_internal_avx512(%rip), %zmm7
338 __declspec(align(64)) VUINT32 Threshold[16][1];
|
| D | svml_d_acosh8_core_avx512.S | 43 #define Threshold 384 macro
93 vmovups Threshold+__svml_dacosh_data_internal_avx512(%rip), %zmm15
341 __declspec(align(64)) VUINT32 Threshold[8][2];
|
| D | svml_d_asinh8_core_avx512.S | 42 #define Threshold 448 macro
131 vmovups Threshold+__svml_dasinh_data_internal_avx512(%rip), %zmm15
368 __declspec(align(64)) VUINT32 Threshold[8][2];
|
| D | svml_d_log104_core_avx2.S | 41 #define Threshold 8608 macro
84 vmovupd Threshold+__svml_dlog10_data_internal(%rip), %ymm9
254 __declspec(align(32)) VUINT32 Threshold[4][2];
|
| D | svml_d_log102_core_sse4.S | 41 #define Threshold 8400 macro
123 movups Threshold+__svml_dlog10_data_internal(%rip), %xmm13
262 __declspec(align(16)) VUINT32 Threshold[2][2];
|
| D | svml_d_log22_core_sse4.S | 41 #define Threshold 12496 macro
126 movups Threshold+__svml_dlog2_data_internal(%rip), %xmm13
260 __declspec(align(16)) VUINT32 Threshold[2][2];
|
| D | svml_d_log24_core_avx2.S | 41 #define Threshold 12704 macro
83 vmovupd Threshold+__svml_dlog2_data_internal(%rip), %ymm9
252 __declspec(align(32)) VUINT32 Threshold[4][2];
|
| D | svml_d_log1p2_core_sse4.S | 44 #define Threshold 12512 macro
137 movups Threshold+__svml_dlog1p_data_internal(%rip), %xmm10
302 __declspec(align(16)) VUINT32 Threshold[2][2];
|
| D | svml_d_log1p4_core_avx2.S | 44 #define Threshold 12736 macro
113 vmovupd Threshold+__svml_dlog1p_data_internal(%rip), %ymm13
294 __declspec(align(32)) VUINT32 Threshold[4][2];
|
| D | svml_d_acosh2_core_sse4.S | 47 #define Threshold 12512 macro
200 movups Threshold+__svml_dacosh_data_internal(%rip), %xmm8
358 __declspec(align(16)) VUINT32 Threshold[2][2];
|
| D | svml_d_atanh2_core_sse4.S | 46 #define Threshold 12512 macro
242 movups Threshold+__svml_datanh_data_internal(%rip), %xmm6
404 __declspec(align(16)) VUINT32 Threshold[2][2];
|
| D | svml_d_atanh4_core_avx2.S | 46 #define Threshold 12736 macro
210 vmovupd Threshold+__svml_datanh_data_internal(%rip), %ymm14
370 __declspec(align(32)) VUINT32 Threshold[4][2];
|
| D | svml_d_asinh4_core_avx2.S | 45 #define Threshold 12736 macro
296 vmovupd Threshold+__svml_dasinh_data_internal(%rip), %ymm10
460 __declspec(align(32)) VUINT32 Threshold[4][2];
|
| D | svml_d_acosh4_core_avx2.S | 47 #define Threshold 12736 macro
212 vmovupd Threshold+__svml_dacosh_data_internal(%rip), %ymm13
403 __declspec(align(32)) VUINT32 Threshold[4][2];
|