/glibc-2.36/sysdeps/x86_64/fpu/multiarch/ |
D | svml_s_log10f4_core_sse4.S | 34 #define L2H 32 macro 88 movups L2H+__svml_slog10_data_internal(%rip), %xmm11 196 __declspec(align(16)) VUINT32 L2H[4][1];
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D | svml_s_log10f8_core_avx2.S | 34 #define L2H 64 macro 83 vfmadd132ps L2H+__svml_slog10_data_internal(%rip), %ymm15, %ymm1 196 __declspec(align(32)) VUINT32 L2H[8][1];
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D | svml_s_exp10f16_core_avx512.S | 37 #define L2H 384 macro 58 vmovups L2H+__svml_sexp10_data_internal_avx512(%rip), %zmm5 210 __declspec(align(64)) VUINT32 L2H[16][1];
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D | svml_s_expm1f16_core_avx512.S | 40 #define L2H 512 macro 60 vmovups L2H+__svml_sexpm1_data_internal_avx512(%rip), %zmm8 220 __declspec(align(64)) VUINT32 L2H[16][1];
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D | svml_d_exp108_core_avx512.S | 36 #define L2H 256 macro 61 vmovups L2H+__svml_dexp10_data_internal_avx512(%rip), %zmm5 214 __declspec(align(64)) VUINT32 L2H[8][2];
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D | svml_s_expm1f4_core_sse4.S | 34 #define L2H 592 macro 64 movups L2H+__svml_sexpm1_data_internal(%rip), %xmm6 236 __declspec(align(16)) VUINT32 L2H[4][1];
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D | svml_s_atanhf16_core_avx512.S | 54 #define L2H 448 macro 139 vmovups ATANHF_DATA(L2H)(%rip), %zmm2 268 __declspec(align(64)) VUINT32 L2H[16][1];
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D | svml_s_expm1f8_core_avx2.S | 34 #define L2H 672 macro 60 vmovups L2H+__svml_sexpm1_data_internal(%rip), %ymm2 235 __declspec(align(32)) VUINT32 L2H[8][1];
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D | svml_d_expm18_core_avx512.S | 40 #define L2H 512 macro 65 vmovups L2H+__svml_dexpm1_data_internal_avx512(%rip), %zmm11 237 __declspec(align(64)) VUINT32 L2H[8][2];
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D | svml_s_acoshf16_core_avx512.S | 55 #define L2H 1152 macro 190 vmovups L2H+__svml_sacosh_data_internal_avx512(%rip), %zmm2 326 __declspec(align(64)) VUINT32 L2H[16][1];
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D | svml_d_expm12_core_sse4.S | 34 #define L2H 2128 macro 64 movups L2H+__svml_dexpm1_data_internal(%rip), %xmm4 235 __declspec(align(16)) VUINT32 L2H[2][2];
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D | svml_d_expm14_core_avx2.S | 34 #define L2H 2208 macro 60 vmovupd L2H+__svml_dexpm1_data_internal(%rip), %ymm2 228 __declspec(align(32)) VUINT32 L2H[4][2];
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D | svml_s_asinhf16_core_avx512.S | 54 #define L2H 1216 macro 168 vmovups L2H+__svml_sasinh_data_internal_avx512(%rip), %zmm15 350 __declspec(align(64)) VUINT32 L2H[16][1];
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D | svml_d_atanh8_core_avx512.S | 52 #define L2H 1152 macro 157 vmovups L2H+__svml_datanh_data_internal_avx512(%rip), %zmm10 310 __declspec(align(64)) VUINT32 L2H[8][2];
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D | svml_d_acosh8_core_avx512.S | 64 #define L2H 1728 macro 202 vmovups L2H+__svml_dacosh_data_internal_avx512(%rip), %zmm8 362 __declspec(align(64)) VUINT32 L2H[8][2];
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D | svml_d_asinh8_core_avx512.S | 63 #define L2H 1792 macro 226 vmovups L2H+__svml_dasinh_data_internal_avx512(%rip), %zmm15 389 __declspec(align(64)) VUINT32 L2H[8][2];
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