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Searched refs:AddB5 (Results 1 – 6 of 6) sorted by relevance

/glibc-2.36/sysdeps/x86_64/fpu/multiarch/
Dsvml_s_atanhf16_core_avx512.S48 #define AddB5 64 macro
76 vmovups ATANHF_DATA(AddB5)(%rip), %zmm14
262 __declspec(align(64)) VUINT32 AddB5[16][1];
Dsvml_s_acoshf16_core_avx512.S48 #define AddB5 704 macro
161 vpaddd AddB5+__svml_sacosh_data_internal_avx512(%rip), %zmm11, %zmm12
319 __declspec(align(64)) VUINT32 AddB5[16][1];
Dsvml_s_asinhf16_core_avx512.S47 #define AddB5 768 macro
181 vpaddd AddB5+__svml_sasinh_data_internal_avx512(%rip), %zmm6, %zmm4
343 __declspec(align(64)) VUINT32 AddB5[16][1];
Dsvml_d_atanh8_core_avx512.S40 #define AddB5 384 macro
69 vmovups AddB5+__svml_datanh_data_internal_avx512(%rip), %zmm6
298 __declspec(align(64)) VUINT32 AddB5[8][2];
Dsvml_d_acosh8_core_avx512.S51 #define AddB5 896 macro
177 vpaddq AddB5+__svml_dacosh_data_internal_avx512(%rip), %zmm1, %zmm2
349 __declspec(align(64)) VUINT32 AddB5[8][2];
Dsvml_d_asinh8_core_avx512.S50 #define AddB5 960 macro
198 vpaddq AddB5+__svml_dasinh_data_internal_avx512(%rip), %zmm13, %zmm11
376 __declspec(align(64)) VUINT32 AddB5[8][2];