/glibc-2.36/sysdeps/x86_64/fpu/multiarch/ |
D | svml_s_exp2f16_core_avx512.S | 60 #define AbsMask 320 macro 98 vandps AbsMask+__svml_sexp2_data_internal_avx512(%rip), %zmm0, %zmm1 234 __declspec(align(64)) VUINT32 AbsMask[16][1];
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D | svml_d_exp28_core_avx512.S | 63 #define AbsMask 576 macro 112 vandpd AbsMask+__svml_dexp2_data_internal_avx512(%rip), %zmm0, %zmm1 255 __declspec(align(64)) VUINT32 AbsMask[8][2];
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D | svml_s_exp10f16_core_avx512.S | 40 #define AbsMask 576 macro 77 vandps AbsMask+__svml_sexp10_data_internal_avx512(%rip), %zmm0, %zmm12 213 __declspec(align(64)) VUINT32 AbsMask[16][1];
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D | svml_d_exp108_core_avx512.S | 45 #define AbsMask 832 macro 75 vandpd AbsMask+__svml_dexp10_data_internal_avx512(%rip), %zmm1, %zmm13 223 __declspec(align(64)) VUINT32 AbsMask[8][2];
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D | svml_s_expm1f4_core_sse4.S | 40 #define AbsMask 688 macro 74 movups AbsMask+__svml_sexpm1_data_internal(%rip), %xmm3 242 __declspec(align(16)) VUINT32 AbsMask[4][1];
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D | svml_s_atanhf16_core_avx512.S | 43 #define AbsMask 0 macro 66 vandps AbsMask+__svml_satanh_data_internal_avx512(%rip){1to16}, %zmm0, %zmm6 260 __declspec(align(4)) VUINT32 AbsMask[1][1];
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D | svml_s_expm1f8_core_avx2.S | 40 #define AbsMask 864 macro 61 vmovups AbsMask+__svml_sexpm1_data_internal(%rip), %ymm5 241 __declspec(align(32)) VUINT32 AbsMask[8][1];
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D | svml_s_atanf16_core_avx512.S | 33 #define AbsMask 0 macro 112 __declspec(align(64)) VUINT32 AbsMask[16][1];
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D | svml_d_expm12_core_sse4.S | 40 #define AbsMask 2224 macro 86 movups AbsMask+__svml_dexpm1_data_internal(%rip), %xmm1 241 __declspec(align(16)) VUINT32 AbsMask[2][2];
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D | svml_d_expm14_core_avx2.S | 40 #define AbsMask 2400 macro 61 vmovupd AbsMask+__svml_dexpm1_data_internal(%rip), %ymm5 234 __declspec(align(32)) VUINT32 AbsMask[4][2];
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D | svml_s_asinhf16_core_avx512.S | 40 #define AbsMask 320 macro 84 vandps AbsMask+__svml_sasinh_data_internal_avx512(%rip), %zmm10, %zmm12 336 __declspec(align(64)) VUINT32 AbsMask[16][1];
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D | svml_d_atanh8_core_avx512.S | 39 #define AbsMask 320 macro 72 vandpd AbsMask+__svml_datanh_data_internal_avx512(%rip), %zmm2, %zmm13 297 __declspec(align(64)) VUINT32 AbsMask[8][2];
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D | svml_d_atan2_core_sse4.S | 33 #define AbsMask 0 macro 147 __declspec(align(16)) VUINT32 AbsMask[2][2];
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D | svml_d_atan4_core_avx2.S | 33 #define AbsMask 0 macro 133 __declspec(align(32)) VUINT32 AbsMask[4][2];
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D | svml_d_atan8_core_avx512.S | 33 #define AbsMask 0 macro 138 __declspec(align(64)) VUINT32 AbsMask[8][2];
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D | svml_s_asinf4_core_sse4.S | 31 #define AbsMask 0 macro 210 __declspec(align(16)) VUINT32 AbsMask[4][1];
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D | svml_s_asinf8_core_avx2.S | 31 #define AbsMask 0 macro 207 __declspec(align(32)) VUINT32 AbsMask[8][1];
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D | svml_s_asinf16_core_avx512.S | 31 #define AbsMask 0 macro 218 __declspec(align(64)) VUINT32 AbsMask[16][1];
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D | svml_d_asinh8_core_avx512.S | 40 #define AbsMask 320 macro 101 vandpd AbsMask+__svml_dasinh_data_internal_avx512(%rip), %zmm3, %zmm1 366 __declspec(align(64)) VUINT32 AbsMask[8][2];
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D | svml_d_asin4_core_avx2.S | 30 #define AbsMask 0 macro 222 __declspec(align(32)) VUINT32 AbsMask[4][2];
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D | svml_d_asin2_core_sse4.S | 30 #define AbsMask 0 macro 237 __declspec(align(16)) VUINT32 AbsMask[2][2];
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D | svml_d_asin8_core_avx512.S | 30 #define AbsMask 0 macro 244 __declspec(align(64)) VUINT32 AbsMask[8][2];
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