1 /* Header defining the minimum x86 ISA level 2 Copyright (C) 2022 Free Software Foundation, Inc. 3 This file is part of the GNU C Library. 4 5 The GNU C Library is free software; you can redistribute it and/or 6 modify it under the terms of the GNU Lesser General Public 7 License as published by the Free Software Foundation; either 8 version 2.1 of the License, or (at your option) any later version. 9 10 In addition to the permissions in the GNU Lesser General Public 11 License, the Free Software Foundation gives you unlimited 12 permission to link the compiled version of this file with other 13 programs, and to distribute those programs without any restriction 14 coming from the use of this file. (The Lesser General Public 15 License restrictions do apply in other respects; for example, they 16 cover modification of the file, and distribution when not linked 17 into another program.) 18 19 The GNU C Library is distributed in the hope that it will be useful, 20 but WITHOUT ANY WARRANTY; without even the implied warranty of 21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 Lesser General Public License for more details. 23 24 You should have received a copy of the GNU Lesser General Public 25 License along with the GNU C Library; if not, see 26 <https://www.gnu.org/licenses/>. */ 27 28 #ifndef _ISA_LEVEL_H 29 #define _ISA_LEVEL_H 30 31 #if defined __SSE__ && defined __SSE2__ 32 /* NB: ISAs, excluding MMX, in x86-64 ISA level baseline are used. */ 33 # define __X86_ISA_V1 1 34 #else 35 # define __X86_ISA_V1 0 36 #endif 37 38 #if __X86_ISA_V1 && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 \ 39 && defined HAVE_X86_LAHF_SAHF && defined __POPCNT__ && defined __SSE3__ \ 40 && defined __SSSE3__ && defined __SSE4_1__ && defined __SSE4_2__ 41 /* NB: ISAs in x86-64 ISA level v2 are used. */ 42 # define __X86_ISA_V2 1 43 #else 44 # define __X86_ISA_V2 0 45 #endif 46 47 #if __X86_ISA_V2 && defined __AVX__ && defined __AVX2__ && defined __F16C__ \ 48 && defined __FMA__ && defined __LZCNT__ && defined HAVE_X86_MOVBE \ 49 && defined __BMI__ && defined __BMI2__ 50 /* NB: ISAs in x86-64 ISA level v3 are used. */ 51 # define __X86_ISA_V3 1 52 #else 53 # define __X86_ISA_V3 0 54 #endif 55 56 #if __X86_ISA_V3 && defined __AVX512F__ && defined __AVX512BW__ \ 57 && defined __AVX512CD__ && defined __AVX512DQ__ && defined __AVX512VL__ 58 /* NB: ISAs in x86-64 ISA level v4 are used. */ 59 # define __X86_ISA_V4 1 60 #else 61 # define __X86_ISA_V4 0 62 #endif 63 64 #define MINIMUM_X86_ISA_LEVEL \ 65 (__X86_ISA_V1 + __X86_ISA_V2 + __X86_ISA_V3 + __X86_ISA_V4) 66 67 /* Depending on the minimum ISA level, a feature check result can be a 68 compile-time constant.. */ 69 70 71 /* For CPU_FEATURE_USABLE_P. */ 72 73 /* ISA level >= 4 guaranteed includes. */ 74 #define AVX512F_X86_ISA_LEVEL 4 75 #define AVX512VL_X86_ISA_LEVEL 4 76 #define AVX512BW_X86_ISA_LEVEL 4 77 #define AVX512DQ_X86_ISA_LEVEL 4 78 79 /* ISA level >= 3 guaranteed includes. */ 80 #define AVX_X86_ISA_LEVEL 3 81 #define AVX2_X86_ISA_LEVEL 3 82 #define BMI2_X86_ISA_LEVEL 3 83 #define MOVBE_X86_ISA_LEVEL 3 84 85 /* ISA level >= 2 guaranteed includes. */ 86 #define SSE4_2_X86_ISA_LEVEL 2 87 #define SSE4_1_X86_ISA_LEVEL 2 88 #define SSSE3_X86_ISA_LEVEL 2 89 90 91 /* For X86_ISA_CPU_FEATURES_ARCH_P. */ 92 93 /* NB: This feature is enabled when ISA level >= 3, which was disabled 94 for the following CPUs: 95 - AMD Excavator 96 when ISA level < 3. */ 97 #define AVX_Fast_Unaligned_Load_X86_ISA_LEVEL 3 98 99 /* NB: This feature is disabled when ISA level >= 3, which was enabled 100 for the following CPUs: 101 - Intel KNL 102 when ISA level < 3. */ 103 #define Prefer_No_VZEROUPPER_X86_ISA_LEVEL 3 104 105 /* NB: This feature is disable when ISA level >= 3. All CPUs with 106 this feature don't run on glibc built with ISA level >= 3. */ 107 #define Slow_SSE42_X86_ISA_LEVEL 3 108 109 /* Feature(s) enabled when ISA level >= 2. */ 110 #define Fast_Unaligned_Load_X86_ISA_LEVEL 2 111 112 /* NB: This feature is disable when ISA level >= 2, which was enabled 113 for the early Atom CPUs. */ 114 #define Slow_BSF_X86_ISA_LEVEL 2 115 116 117 /* Both X86_ISA_CPU_FEATURE_USABLE_P and X86_ISA_CPU_FEATURES_ARCH_P 118 macros are wrappers for the respective CPU_FEATURE{S}_{USABLE|ARCH}_P 119 runtime checks. They differ in two ways. 120 121 1. The USABLE_P version is evaluated to true when the feature 122 is enabled. 123 124 2. The ARCH_P version has a third argument `not`. The `not` 125 argument can either be `!` or empty. If the feature is 126 enabled above an ISA level, the third argument should be empty 127 and the expression is evaluated to true when the feature is 128 enabled. If the feature is disabled above an ISA level, the 129 third argument should be `!` and the expression is evaluated 130 to true when the feature is disabled. 131 */ 132 133 #define X86_ISA_CPU_FEATURE_USABLE_P(ptr, name) \ 134 (((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) \ 135 || CPU_FEATURE_USABLE_P (ptr, name)) 136 137 #define X86_ISA_CPU_FEATURES_ARCH_P(ptr, name, not) \ 138 (((name##_X86_ISA_LEVEL) <= MINIMUM_X86_ISA_LEVEL) \ 139 || not CPU_FEATURES_ARCH_P (ptr, name)) 140 141 #define ISA_SHOULD_BUILD(isa_build_level) \ 142 (MINIMUM_X86_ISA_LEVEL <= (isa_build_level) && IS_IN (libc)) \ 143 || defined ISA_DEFAULT_IMPL 144 145 #endif 146