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Searched refs:ASI_BLK_INIT_QUAD_LDD_P (Results 1 – 7 of 7) sorted by relevance

/glibc-2.36/sysdeps/sparc/sparc64/multiarch/
Dmemset-niagara4.S21 #define ASI_BLK_INIT_QUAD_LDD_P 0xe2 macro
70 1: stxa %o4, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
72 stxa %o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
104 1: stxa %o4, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
106 stxa %o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
107 stxa %o4, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
108 stxa %o4, [%o0 + %o5] ASI_BLK_INIT_QUAD_LDD_P
110 stxa %o4, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
111 stxa %o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
112 stxa %o4, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
[all …]
Dmemset-niagara1.S21 #define ASI_BLK_INIT_QUAD_LDD_P 0xe2 macro
82 wr %g0, ASI_BLK_INIT_QUAD_LDD_P, %asi
Dmemcpy-niagara1.S21 #define ASI_BLK_INIT_QUAD_LDD_P 0xe2 macro
27 ldda [addr_reg] ASI_BLK_INIT_QUAD_LDD_P, dest0
85 wr %g0, ASI_BLK_INIT_QUAD_LDD_P, %asi
Dmemset-niagara7.S82 #define ASI_BLK_INIT_QUAD_LDD_P 0xe2 macro
85 #define ASI_STBI_P ASI_BLK_INIT_QUAD_LDD_P
Dmemcpy-niagara4.S21 #define ASI_BLK_INIT_QUAD_LDD_P 0xe2 macro
40 #define STORE_ASI ASI_BLK_INIT_QUAD_LDD_P
Dmemcpy-niagara2.S21 #define ASI_BLK_INIT_QUAD_LDD_P 0xe2 macro
36 #define STORE_ASI ASI_BLK_INIT_QUAD_LDD_P
Dmemcpy-memmove-niagara7.S40 #define ASI_BLK_INIT_QUAD_LDD_P 0xe2 macro
43 #define ASI_STBI_P ASI_BLK_INIT_QUAD_LDD_P