Searched refs:APIC_LVT_INT_MASKED (Results 1 – 4 of 4) sorted by relevance
17 val &= (~APIC_LVT_INT_MASKED); in apic_timer_enable()54 apic_timer_write_LVT(APIC_LVT_INT_MASKED); in apic_timer_uninstall()
51 register uint32_t val = (mode << 17) | vector | (mask ? (APIC_LVT_INT_MASKED) : 0); in apic_timer_set_LVT()98 val |= APIC_LVT_INT_MASKED; \
186 … *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_TIMER) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()189 …)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_THERMAL) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()191 …_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_PERFORMANCE_MONITOR) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()193 … *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT0) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()195 … *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_LINT1) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()197 … *)(APIC_LOCAL_APIC_VIRT_BASE_ADDR + LOCAL_APIC_OFFSET_Local_APIC_LVT_ERROR) = APIC_LVT_INT_MASKED; in __local_apic_xapic_init()
215 #define APIC_LVT_INT_MASKED 0x10000UL macro