1/* Round float to int floating-point values without generating 2 an inexact exception, sparc64 vis3 version. 3 4 Copyright (C) 2013-2022 Free Software Foundation, Inc. 5 This file is part of the GNU C Library. 6 7 The GNU C Library is free software; you can redistribute it and/or 8 modify it under the terms of the GNU Lesser General Public 9 License as published by the Free Software Foundation; either 10 version 2.1 of the License, or (at your option) any later version. 11 12 The GNU C Library is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 Lesser General Public License for more details. 16 17 You should have received a copy of the GNU Lesser General Public 18 License along with the GNU C Library; if not, see 19 <https://www.gnu.org/licenses/>. */ 20 21#include <sysdep.h> 22 23 /* We pop constants into the FPU registers using the incoming 24 argument stack slots, since this avoid having to use any PIC 25 references. We also thus avoid having to allocate a register 26 window. 27 28 VIS instructions are used to facilitate the formation of 29 easier constants, and the propagation of the sign bit. */ 30 31#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ 32 33#define ZERO %f10 /* 0.0 */ 34#define SIGN_BIT %f12 /* -0.0 */ 35 36ENTRY (__nearbyint_vis3) 37 fcmpd %fcc3, %f0, %f0 /* Check for sNaN */ 38 stx %fsr, [%sp + STACK_BIAS + 144] 39 sethi %hi(TWO_FIFTYTWO), %o2 40 sllx %o2, 32, %o2 41 ldx [%sp + STACK_BIAS + 144], %o4 42 sethi %hi(0xf8003e0), %o5 43 fzero ZERO 44 or %o5, %lo(0xf8003e0), %o5 45 fnegd ZERO, SIGN_BIT 46 andn %o4, %o5, %o4 47 movxtod %o2, %f16 48 stx %o4, [%sp + STACK_BIAS + 136] 49 ldx [%sp + STACK_BIAS + 136], %fsr 50 fabsd %f0, %f14 51 fcmpd %fcc3, %f14, %f16 52 fmovduge %fcc3, ZERO, %f16 53 fand %f0, SIGN_BIT, SIGN_BIT 54 for %f16, SIGN_BIT, %f16 55 faddd %f0, %f16, %f6 56 fsubd %f6, %f16, %f0 57 fabsd %f0, %f0 58 for %f0, SIGN_BIT, %f0 59 retl 60 ldx [%sp + STACK_BIAS + 144], %fsr 61END (__nearbyint_vis3) 62