1 /* FPU control word definitions.  PowerPC version.
2    Copyright (C) 1996-2022 Free Software Foundation, Inc.
3    This file is part of the GNU C Library.
4 
5    The GNU C Library is free software; you can redistribute it and/or
6    modify it under the terms of the GNU Lesser General Public
7    License as published by the Free Software Foundation; either
8    version 2.1 of the License, or (at your option) any later version.
9 
10    The GNU C Library is distributed in the hope that it will be useful,
11    but WITHOUT ANY WARRANTY; without even the implied warranty of
12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13    Lesser General Public License for more details.
14 
15    You should have received a copy of the GNU Lesser General Public
16    License along with the GNU C Library; if not, see
17    <https://www.gnu.org/licenses/>.  */
18 
19 #ifndef _FPU_CONTROL_H
20 #define _FPU_CONTROL_H
21 
22 #if defined __SPE__ || (defined __NO_FPRS__ && !defined _SOFT_FLOAT)
23 # error "SPE/e500 is no longer supported"
24 #endif
25 
26 #ifdef _SOFT_FLOAT
27 
28 # define _FPU_RESERVED 0xffffffff
29 # define _FPU_DEFAULT  0x00000000 /* Default value.  */
30 typedef unsigned int fpu_control_t;
31 # define _FPU_GETCW(cw) (cw) = 0
32 # define _FPU_SETCW(cw) (void) (cw)
33 extern fpu_control_t __fpu_control;
34 
35 #else /* PowerPC 6xx floating-point.  */
36 
37 /* rounding control */
38 # define _FPU_RC_NEAREST 0x00   /* RECOMMENDED */
39 # define _FPU_RC_DOWN    0x03
40 # define _FPU_RC_UP      0x02
41 # define _FPU_RC_ZERO    0x01
42 
43 # define _FPU_MASK_RC (_FPU_RC_NEAREST|_FPU_RC_DOWN|_FPU_RC_UP|_FPU_RC_ZERO)
44 
45 # define _FPU_MASK_NI  0x04 /* non-ieee mode */
46 
47 /* masking of interrupts */
48 # define _FPU_MASK_ZM  0x10 /* zero divide */
49 # define _FPU_MASK_OM  0x40 /* overflow */
50 # define _FPU_MASK_UM  0x20 /* underflow */
51 # define _FPU_MASK_XM  0x08 /* inexact */
52 # define _FPU_MASK_IM  0x80 /* invalid operation */
53 
54 # define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */
55 
56 /* The fdlibm code requires no interrupts for exceptions.  */
57 # define _FPU_DEFAULT  0x00000000 /* Default value.  */
58 
59 /* IEEE:  same as above, but (some) exceptions;
60    we leave the 'inexact' exception off.
61  */
62 # define _FPU_IEEE     0x000000f0
63 
64 /* Type of the control word.  */
65 typedef unsigned int fpu_control_t;
66 
67 /* Macros for accessing the hardware control word.  */
68 # define _FPU_GETCW(cw)						\
69   ({union { double __d; unsigned long long __ll; } __u;		\
70     __asm__ __volatile__("mffs %0" : "=f" (__u.__d));		\
71     (cw) = (fpu_control_t) __u.__ll;				\
72     (fpu_control_t) __u.__ll;					\
73   })
74 
75 # define _FPU_GET_RC_ISA300()						\
76   ({union { double __d; unsigned long long __ll; } __u;			\
77     __asm__ __volatile__(						\
78       ".machine push; .machine \"power9\"; mffsl %0; .machine pop" 	\
79       : "=f" (__u.__d));						\
80     (fpu_control_t) (__u.__ll & _FPU_MASK_RC);				\
81   })
82 
83 # ifdef _ARCH_PWR9
84 #  define _FPU_GET_RC() _FPU_GET_RC_ISA300()
85 # elif defined __BUILTIN_CPU_SUPPORTS__
86 #  define _FPU_GET_RC()							\
87   ({fpu_control_t __rc;							\
88     __rc = __glibc_likely (__builtin_cpu_supports ("arch_3_00"))	\
89       ? _FPU_GET_RC_ISA300 ()						\
90       : _FPU_GETCW (__rc) & _FPU_MASK_RC;				\
91     __rc;								\
92   })
93 # else
94 #  define _FPU_GET_RC()						\
95   ({fpu_control_t __rc = _FPU_GETCW (__rc) & _FPU_MASK_RC;	\
96     __rc;							\
97   })
98 # endif
99 
100 # define _FPU_SETCW(cw)						\
101   { union { double __d; unsigned long long __ll; } __u;		\
102     register double __fr;					\
103     __u.__ll = 0xfff80000LL << 32; /* This is a QNaN.  */	\
104     __u.__ll |= (cw) & 0xffffffffLL;				\
105     __fr = __u.__d;						\
106     __asm__ __volatile__("mtfsf 255,%0" : : "f" (__fr));	\
107   }
108 
109 /* Default control word set at startup.  */
110 extern fpu_control_t __fpu_control;
111 
112 #endif /* PowerPC 6xx floating-point.  */
113 
114 #endif /* _FPU_CONTROL_H */
115