1 /* 2 * Copyright 2020 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __SMU_V13_0_1_PMFW_H__ 25 #define __SMU_V13_0_1_PMFW_H__ 26 27 #include "smu13_driver_if_yellow_carp.h" 28 29 #pragma pack(push, 1) 30 31 #define ENABLE_DEBUG_FEATURES 32 33 // Firmware features 34 // Feature Control Defines 35 #define FEATURE_CCLK_DPM_BIT 0 36 #define FEATURE_FAN_CONTROLLER_BIT 1 37 #define FEATURE_DATA_CALCULATION_BIT 2 38 #define FEATURE_PPT_BIT 3 39 #define FEATURE_TDC_BIT 4 40 #define FEATURE_THERMAL_BIT 5 41 #define FEATURE_FIT_BIT 6 42 #define FEATURE_EDC_BIT 7 43 #define FEATURE_PLL_POWER_DOWN_BIT 8 44 #define FEATURE_ULV_BIT 9 45 #define FEATURE_VDDOFF_BIT 10 46 #define FEATURE_VCN_DPM_BIT 11 47 #define FEATURE_CSTATE_BOOST_BIT 12 48 #define FEATURE_FCLK_DPM_BIT 13 49 #define FEATURE_SOCCLK_DPM_BIT 14 50 #define FEATURE_MP0CLK_DPM_BIT 15 51 #define FEATURE_LCLK_DPM_BIT 16 52 #define FEATURE_SHUBCLK_DPM_BIT 17 53 #define FEATURE_DCFCLK_DPM_BIT 18 54 #define FEATURE_GFX_DPM_BIT 19 55 #define FEATURE_DS_GFXCLK_BIT 20 56 #define FEATURE_DS_SOCCLK_BIT 21 57 #define FEATURE_DS_LCLK_BIT 22 58 #define FEATURE_DS_DCFCLK_BIT 23 59 #define FEATURE_DS_SHUBCLK_BIT 24 60 #define FEATURE_GFX_TEMP_VMIN_BIT 25 61 #define FEATURE_ZSTATES_BIT 26 62 #define FEATURE_WHISPER_MODE_BIT 27 63 #define FEATURE_DS_FCLK_BIT 28 64 #define FEATURE_DS_SMNCLK_BIT 29 65 #define FEATURE_DS_MP1CLK_BIT 30 66 #define FEATURE_DS_MP0CLK_BIT 31 67 #define FEATURE_CLK_LOW_POWER_BIT 32 68 #define FEATURE_FUSE_PG_BIT 33 69 #define FEATURE_GFX_DEM_BIT 34 70 #define FEATURE_PSI_BIT 35 71 #define FEATURE_PROCHOT_BIT 36 72 #define FEATURE_CPUOFF_BIT 37 73 #define FEATURE_STAPM_BIT 38 74 #define FEATURE_S0I3_BIT 39 75 #define FEATURE_DF_LIGHT_CSTATE 40 // shift the order or DFCstate annd DF light Cstate 76 #define FEATURE_PERF_LIMIT_BIT 41 77 #define FEATURE_CORE_DLDO_BIT 42 78 #define FEATURE_RSMU_LOW_POWER_BIT 43 79 #define FEATURE_SMN_LOW_POWER_BIT 44 80 #define FEATURE_THM_LOW_POWER_BIT 45 81 #define FEATURE_SMUIO_LOW_POWER_BIT 46 82 #define FEATURE_MP1_LOW_POWER_BIT 47 83 #define FEATURE_DS_VCN_BIT 48 84 #define FEATURE_CPPC_BIT 49 85 #define FEATURE_CPPC_PREFERRED_CORES 50 86 #define FEATURE_SMART_SHIFT_BIT 51 87 #define FEATURE_DF_CSTATES_BIT 52 88 #define FEATURE_MSMU_LOW_POWER_BIT 53 89 #define FEATURE_SOC_VOLTAGE_MON_BIT 54 90 #define FEATURE_ATHUB_PG_BIT 55 91 #define FEATURE_VDDOFF_ECO_BIT 56 92 #define FEATURE_ZSTATES_ECO_BIT 57 93 #define FEATURE_CC6_BIT 58 94 #define FEATURE_DS_UMCCLK_BIT 59 95 #define FEATURE_DS_HSPCLK_BIT 60 96 #define NUM_FEATURES 61 97 98 typedef struct { 99 // MP1_EXT_SCRATCH0 100 uint32_t DpmHandlerID : 8; 101 uint32_t ActivityMonitorID : 8; 102 uint32_t DpmTimerID : 8; 103 uint32_t DpmHubID : 4; 104 uint32_t DpmHubTask : 4; 105 // MP1_EXT_SCRATCH1 106 uint32_t GfxoffStatus : 8; 107 uint32_t GfxStatus : 2; 108 uint32_t CpuOff : 2; 109 uint32_t VddOff : 1; 110 uint32_t InUlv : 1; 111 uint32_t InWhisperMode : 1; 112 uint32_t spare0 : 1; 113 uint32_t ZstateStatus : 4; 114 uint32_t spare1 : 4; 115 uint32_t DstateFun : 4; 116 uint32_t DstateDev : 4; 117 // MP1_EXT_SCRATCH2 118 uint32_t P2JobHandler :24; 119 uint32_t RsmuPmiP2FinishedCnt : 8; 120 // MP1_EXT_SCRATCH3 121 uint32_t PostCode :32; 122 // MP1_EXT_SCRATCH4 123 uint32_t MsgPortBusy :15; 124 uint32_t RsmuPmiP1Pending : 1; 125 uint32_t DfCstateExitPending : 1; 126 uint32_t Pc6EntryPending : 1; 127 uint32_t Pc6ExitPending : 1; 128 uint32_t WarmResetPending : 1; 129 uint32_t Mp0ClkPending : 1; 130 uint32_t spare2 : 3; 131 uint32_t RsmuPmiP2PendingCnt : 8; 132 // MP1_EXT_SCRATCH5 133 uint32_t IdleMask :32; 134 // MP1_EXT_SCRATCH6 = RTOS threads' status 135 // MP1_EXT_SCRATCH7 = RTOS Current Job 136 } FwStatus_t; 137 138 139 #pragma pack(pop) 140 141 #endif 142