1 /* linux/arch/arm/plat-s3c/include/plat/gpio-core.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C Platform - GPIO core
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #define GPIOCON_OFF (0x00)
15 #define GPIODAT_OFF (0x04)
16
17 #define con_4bit_shift(__off) ((__off) * 4)
18
19 /* Define the core gpiolib support functions that the s3c platforms may
20 * need to extend or change depending on the hardware and the s3c chip
21 * selected at build or found at run time.
22 *
23 * These definitions are not intended for driver inclusion, there is
24 * nothing here that should not live outside the platform and core
25 * specific code.
26 */
27
28 struct samsung_gpio_chip;
29
30 /**
31 * struct samsung_gpio_pm - power management (suspend/resume) information
32 * @save: Routine to save the state of the GPIO block
33 * @resume: Routine to resume the GPIO block.
34 */
35 struct samsung_gpio_pm {
36 void (*save)(struct samsung_gpio_chip *chip);
37 void (*resume)(struct samsung_gpio_chip *chip);
38 };
39
40 struct samsung_gpio_cfg;
41
42 /**
43 * struct samsung_gpio_chip - wrapper for specific implementation of gpio
44 * @chip: The chip structure to be exported via gpiolib.
45 * @base: The base pointer to the gpio configuration registers.
46 * @group: The group register number for gpio interrupt support.
47 * @irq_base: The base irq number.
48 * @config: special function and pull-resistor control information.
49 * @lock: Lock for exclusive access to this gpio bank.
50 * @pm_save: Save information for suspend/resume support.
51 *
52 * This wrapper provides the necessary information for the Samsung
53 * specific gpios being registered with gpiolib.
54 *
55 * The lock protects each gpio bank from multiple access of the shared
56 * configuration registers, or from reading of data whilst another thread
57 * is writing to the register set.
58 *
59 * Each chip has its own lock to avoid any contention between different
60 * CPU cores trying to get one lock for different GPIO banks, where each
61 * bank of GPIO has its own register space and configuration registers.
62 */
63 struct samsung_gpio_chip {
64 struct gpio_chip chip;
65 struct samsung_gpio_cfg *config;
66 struct samsung_gpio_pm *pm;
67 void __iomem *base;
68 int irq_base;
69 int group;
70 spinlock_t lock;
71 #ifdef CONFIG_PM
72 u32 pm_save[4];
73 #endif
74 };
75
to_samsung_gpio(struct gpio_chip * gpc)76 static inline struct samsung_gpio_chip *to_samsung_gpio(struct gpio_chip *gpc)
77 {
78 return container_of(gpc, struct samsung_gpio_chip, chip);
79 }
80
81 /**
82 * samsung_gpiolib_to_irq - convert gpio pin to irq number
83 * @chip: The gpio chip that the pin belongs to.
84 * @offset: The offset of the pin in the chip.
85 *
86 * This helper returns the irq number calculated from the chip->irq_base and
87 * the provided offset.
88 */
89 extern int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset);
90
91 /* exported for core SoC support to change */
92 extern struct samsung_gpio_cfg s3c24xx_gpiocfg_default;
93
94 #ifdef CONFIG_S3C_GPIO_TRACK
95 extern struct samsung_gpio_chip *s3c_gpios[S3C_GPIO_END];
96
samsung_gpiolib_getchip(unsigned int chip)97 static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int chip)
98 {
99 return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL;
100 }
101 #else
102 /* machine specific code should provide samsung_gpiolib_getchip */
103
104 #include <mach/gpio-track.h>
105
s3c_gpiolib_track(struct samsung_gpio_chip * chip)106 static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { }
107 #endif
108
109 #ifdef CONFIG_PM
110 extern struct samsung_gpio_pm samsung_gpio_pm_1bit;
111 extern struct samsung_gpio_pm samsung_gpio_pm_2bit;
112 extern struct samsung_gpio_pm samsung_gpio_pm_4bit;
113 #define __gpio_pm(x) x
114 #else
115 #define samsung_gpio_pm_1bit NULL
116 #define samsung_gpio_pm_2bit NULL
117 #define samsung_gpio_pm_4bit NULL
118 #define __gpio_pm(x) NULL
119
120 #endif /* CONFIG_PM */
121
122 /* locking wrappers to deal with multiple access to the same gpio bank */
123 #define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
124 #define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
125