1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/pci.h>
3 #include <linux/acpi.h>
4 #include <linux/init.h>
5 #include <linux/irq.h>
6 #include <linux/dmi.h>
7 #include <linux/slab.h>
8 #include <linux/pci-acpi.h>
9 #include <asm/numa.h>
10 #include <asm/pci_x86.h>
11
12 struct pci_root_info {
13 struct acpi_pci_root_info common;
14 struct pci_sysdata sd;
15 #ifdef CONFIG_PCI_MMCONFIG
16 bool mcfg_added;
17 u8 start_bus;
18 u8 end_bus;
19 #endif
20 };
21
22 bool pci_use_e820 = true;
23 static bool pci_use_crs = true;
24 static bool pci_ignore_seg;
25
set_use_crs(const struct dmi_system_id * id)26 static int __init set_use_crs(const struct dmi_system_id *id)
27 {
28 pci_use_crs = true;
29 return 0;
30 }
31
set_nouse_crs(const struct dmi_system_id * id)32 static int __init set_nouse_crs(const struct dmi_system_id *id)
33 {
34 pci_use_crs = false;
35 return 0;
36 }
37
set_ignore_seg(const struct dmi_system_id * id)38 static int __init set_ignore_seg(const struct dmi_system_id *id)
39 {
40 printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
41 pci_ignore_seg = true;
42 return 0;
43 }
44
set_no_e820(const struct dmi_system_id * id)45 static int __init set_no_e820(const struct dmi_system_id *id)
46 {
47 printk(KERN_INFO "PCI: %s detected: not clipping E820 regions from _CRS\n",
48 id->ident);
49 pci_use_e820 = false;
50 return 0;
51 }
52
53 static const struct dmi_system_id pci_crs_quirks[] __initconst = {
54 /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
55 {
56 .callback = set_use_crs,
57 .ident = "IBM System x3800",
58 .matches = {
59 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
60 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
61 },
62 },
63 /* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
64 /* 2006 AMD HT/VIA system with two host bridges */
65 {
66 .callback = set_use_crs,
67 .ident = "ASRock ALiveSATA2-GLAN",
68 .matches = {
69 DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
70 },
71 },
72 /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
73 /* 2006 AMD HT/VIA system with two host bridges */
74 {
75 .callback = set_use_crs,
76 .ident = "ASUS M2V-MX SE",
77 .matches = {
78 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
79 DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
80 DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
81 },
82 },
83 /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
84 {
85 .callback = set_use_crs,
86 .ident = "MSI MS-7253",
87 .matches = {
88 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
89 DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
90 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
91 },
92 },
93 /* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/931368 */
94 /* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/1033299 */
95 {
96 .callback = set_use_crs,
97 .ident = "Foxconn K8M890-8237A",
98 .matches = {
99 DMI_MATCH(DMI_BOARD_VENDOR, "Foxconn"),
100 DMI_MATCH(DMI_BOARD_NAME, "K8M890-8237A"),
101 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
102 },
103 },
104
105 /* Now for the blacklist.. */
106
107 /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
108 {
109 .callback = set_nouse_crs,
110 .ident = "Dell Studio 1557",
111 .matches = {
112 DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
113 DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
114 DMI_MATCH(DMI_BIOS_VERSION, "A09"),
115 },
116 },
117 /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
118 {
119 .callback = set_nouse_crs,
120 .ident = "Thinkpad SL510",
121 .matches = {
122 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
123 DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
124 DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
125 },
126 },
127 /* https://bugzilla.kernel.org/show_bug.cgi?id=42606 */
128 {
129 .callback = set_nouse_crs,
130 .ident = "Supermicro X8DTH",
131 .matches = {
132 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
133 DMI_MATCH(DMI_PRODUCT_NAME, "X8DTH-i/6/iF/6F"),
134 DMI_MATCH(DMI_BIOS_VERSION, "2.0a"),
135 },
136 },
137
138 /* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
139 {
140 .callback = set_ignore_seg,
141 .ident = "HP xw9300",
142 .matches = {
143 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
144 DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
145 },
146 },
147
148 /*
149 * Many Lenovo models with "IIL" in their DMI_PRODUCT_VERSION have
150 * an E820 reserved region that covers the entire 32-bit host
151 * bridge memory window from _CRS. Using the E820 region to clip
152 * _CRS means no space is available for hot-added or uninitialized
153 * PCI devices. This typically breaks I2C controllers for touchpads
154 * and hot-added Thunderbolt devices. See the commit log for
155 * models known to require this quirk and related bug reports.
156 */
157 {
158 .callback = set_no_e820,
159 .ident = "Lenovo *IIL* product version",
160 .matches = {
161 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
162 DMI_MATCH(DMI_PRODUCT_VERSION, "IIL"),
163 },
164 },
165
166 /*
167 * The Acer Spin 5 (SP513-54N) has the same E820 reservation covering
168 * the entire _CRS 32-bit window issue as the Lenovo *IIL* models.
169 * See https://bugs.launchpad.net/bugs/1884232
170 */
171 {
172 .callback = set_no_e820,
173 .ident = "Acer Spin 5 (SP513-54N)",
174 .matches = {
175 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
176 DMI_MATCH(DMI_PRODUCT_NAME, "Spin SP513-54N"),
177 },
178 },
179
180 /*
181 * Clevo X170KM-G barebones have the same E820 reservation covering
182 * the entire _CRS 32-bit window issue as the Lenovo *IIL* models.
183 * See https://bugzilla.kernel.org/show_bug.cgi?id=214259
184 */
185 {
186 .callback = set_no_e820,
187 .ident = "Clevo X170KM-G Barebone",
188 .matches = {
189 DMI_MATCH(DMI_BOARD_NAME, "X170KM-G"),
190 },
191 },
192 {}
193 };
194
pci_acpi_crs_quirks(void)195 void __init pci_acpi_crs_quirks(void)
196 {
197 int year = dmi_get_bios_year();
198
199 if (year >= 0 && year < 2008 && iomem_resource.end <= 0xffffffff)
200 pci_use_crs = false;
201
202 /*
203 * Some firmware includes unusable space (host bridge registers,
204 * hidden PCI device BARs, etc) in PCI host bridge _CRS. This is a
205 * firmware defect, and 4dc2287c1805 ("x86: avoid E820 regions when
206 * allocating address space") has clipped out the unusable space in
207 * the past.
208 *
209 * But other firmware supplies E820 reserved regions that cover
210 * entire _CRS windows, so clipping throws away the entire window,
211 * leaving none for hot-added or uninitialized devices. These E820
212 * entries are probably *not* a firmware defect, so disable the
213 * clipping by default for post-2022 machines.
214 *
215 * We already have quirks to disable clipping for pre-2023
216 * machines, and we'll likely need quirks to *enable* clipping for
217 * post-2022 machines that incorrectly include unusable space in
218 * _CRS.
219 */
220 if (year >= 2023)
221 pci_use_e820 = false;
222
223 dmi_check_system(pci_crs_quirks);
224
225 /*
226 * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
227 * takes precedence over anything we figured out above.
228 */
229 if (pci_probe & PCI_ROOT_NO_CRS)
230 pci_use_crs = false;
231 else if (pci_probe & PCI_USE__CRS)
232 pci_use_crs = true;
233
234 printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
235 "if necessary, use \"pci=%s\" and report a bug\n",
236 pci_use_crs ? "Using" : "Ignoring",
237 pci_use_crs ? "nocrs" : "use_crs");
238
239 /* "pci=use_e820"/"pci=no_e820" on the kernel cmdline takes precedence */
240 if (pci_probe & PCI_NO_E820)
241 pci_use_e820 = false;
242 else if (pci_probe & PCI_USE_E820)
243 pci_use_e820 = true;
244
245 printk(KERN_INFO "PCI: %s E820 reservations for host bridge windows\n",
246 pci_use_e820 ? "Using" : "Ignoring");
247 if (pci_probe & (PCI_NO_E820 | PCI_USE_E820))
248 printk(KERN_INFO "PCI: Please notify linux-pci@vger.kernel.org so future kernels can this automatically\n");
249 }
250
251 #ifdef CONFIG_PCI_MMCONFIG
check_segment(u16 seg,struct device * dev,char * estr)252 static int check_segment(u16 seg, struct device *dev, char *estr)
253 {
254 if (seg) {
255 dev_err(dev,
256 "%s can't access PCI configuration "
257 "space under this host bridge.\n",
258 estr);
259 return -EIO;
260 }
261
262 /*
263 * Failure in adding MMCFG information is not fatal,
264 * just can't access extended configuration space of
265 * devices under this host bridge.
266 */
267 dev_warn(dev,
268 "%s can't access extended PCI configuration "
269 "space under this bridge.\n",
270 estr);
271
272 return 0;
273 }
274
setup_mcfg_map(struct acpi_pci_root_info * ci)275 static int setup_mcfg_map(struct acpi_pci_root_info *ci)
276 {
277 int result, seg;
278 struct pci_root_info *info;
279 struct acpi_pci_root *root = ci->root;
280 struct device *dev = &ci->bridge->dev;
281
282 info = container_of(ci, struct pci_root_info, common);
283 info->start_bus = (u8)root->secondary.start;
284 info->end_bus = (u8)root->secondary.end;
285 info->mcfg_added = false;
286 seg = info->sd.domain;
287
288 /* return success if MMCFG is not in use */
289 if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
290 return 0;
291
292 if (!(pci_probe & PCI_PROBE_MMCONF))
293 return check_segment(seg, dev, "MMCONFIG is disabled,");
294
295 result = pci_mmconfig_insert(dev, seg, info->start_bus, info->end_bus,
296 root->mcfg_addr);
297 if (result == 0) {
298 /* enable MMCFG if it hasn't been enabled yet */
299 if (raw_pci_ext_ops == NULL)
300 raw_pci_ext_ops = &pci_mmcfg;
301 info->mcfg_added = true;
302 } else if (result != -EEXIST)
303 return check_segment(seg, dev,
304 "fail to add MMCONFIG information,");
305
306 return 0;
307 }
308
teardown_mcfg_map(struct acpi_pci_root_info * ci)309 static void teardown_mcfg_map(struct acpi_pci_root_info *ci)
310 {
311 struct pci_root_info *info;
312
313 info = container_of(ci, struct pci_root_info, common);
314 if (info->mcfg_added) {
315 pci_mmconfig_delete(info->sd.domain,
316 info->start_bus, info->end_bus);
317 info->mcfg_added = false;
318 }
319 }
320 #else
setup_mcfg_map(struct acpi_pci_root_info * ci)321 static int setup_mcfg_map(struct acpi_pci_root_info *ci)
322 {
323 return 0;
324 }
325
teardown_mcfg_map(struct acpi_pci_root_info * ci)326 static void teardown_mcfg_map(struct acpi_pci_root_info *ci)
327 {
328 }
329 #endif
330
pci_acpi_root_get_node(struct acpi_pci_root * root)331 static int pci_acpi_root_get_node(struct acpi_pci_root *root)
332 {
333 int busnum = root->secondary.start;
334 struct acpi_device *device = root->device;
335 int node = acpi_get_node(device->handle);
336
337 if (node == NUMA_NO_NODE) {
338 node = x86_pci_root_bus_node(busnum);
339 if (node != 0 && node != NUMA_NO_NODE)
340 dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
341 node);
342 }
343 if (node != NUMA_NO_NODE && !node_online(node))
344 node = NUMA_NO_NODE;
345
346 return node;
347 }
348
pci_acpi_root_init_info(struct acpi_pci_root_info * ci)349 static int pci_acpi_root_init_info(struct acpi_pci_root_info *ci)
350 {
351 return setup_mcfg_map(ci);
352 }
353
pci_acpi_root_release_info(struct acpi_pci_root_info * ci)354 static void pci_acpi_root_release_info(struct acpi_pci_root_info *ci)
355 {
356 teardown_mcfg_map(ci);
357 kfree(container_of(ci, struct pci_root_info, common));
358 }
359
360 /*
361 * An IO port or MMIO resource assigned to a PCI host bridge may be
362 * consumed by the host bridge itself or available to its child
363 * bus/devices. The ACPI specification defines a bit (Producer/Consumer)
364 * to tell whether the resource is consumed by the host bridge itself,
365 * but firmware hasn't used that bit consistently, so we can't rely on it.
366 *
367 * On x86 and IA64 platforms, all IO port and MMIO resources are assumed
368 * to be available to child bus/devices except one special case:
369 * IO port [0xCF8-0xCFF] is consumed by the host bridge itself
370 * to access PCI configuration space.
371 *
372 * So explicitly filter out PCI CFG IO ports[0xCF8-0xCFF].
373 */
resource_is_pcicfg_ioport(struct resource * res)374 static bool resource_is_pcicfg_ioport(struct resource *res)
375 {
376 return (res->flags & IORESOURCE_IO) &&
377 res->start == 0xCF8 && res->end == 0xCFF;
378 }
379
pci_acpi_root_prepare_resources(struct acpi_pci_root_info * ci)380 static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci)
381 {
382 struct acpi_device *device = ci->bridge;
383 int busnum = ci->root->secondary.start;
384 struct resource_entry *entry, *tmp;
385 int status;
386
387 status = acpi_pci_probe_root_resources(ci);
388
389 if (pci_use_crs) {
390 resource_list_for_each_entry_safe(entry, tmp, &ci->resources)
391 if (resource_is_pcicfg_ioport(entry->res))
392 resource_list_destroy_entry(entry);
393 return status;
394 }
395
396 resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {
397 dev_printk(KERN_DEBUG, &device->dev,
398 "host bridge window %pR (ignored)\n", entry->res);
399 resource_list_destroy_entry(entry);
400 }
401 x86_pci_root_bus_resources(busnum, &ci->resources);
402
403 return 0;
404 }
405
406 static struct acpi_pci_root_ops acpi_pci_root_ops = {
407 .pci_ops = &pci_root_ops,
408 .init_info = pci_acpi_root_init_info,
409 .release_info = pci_acpi_root_release_info,
410 .prepare_resources = pci_acpi_root_prepare_resources,
411 };
412
pci_acpi_scan_root(struct acpi_pci_root * root)413 struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
414 {
415 int domain = root->segment;
416 int busnum = root->secondary.start;
417 int node = pci_acpi_root_get_node(root);
418 struct pci_bus *bus;
419
420 if (pci_ignore_seg)
421 root->segment = domain = 0;
422
423 if (domain && !pci_domains_supported) {
424 printk(KERN_WARNING "pci_bus %04x:%02x: "
425 "ignored (multiple domains not supported)\n",
426 domain, busnum);
427 return NULL;
428 }
429
430 bus = pci_find_bus(domain, busnum);
431 if (bus) {
432 /*
433 * If the desired bus has been scanned already, replace
434 * its bus->sysdata.
435 */
436 struct pci_sysdata sd = {
437 .domain = domain,
438 .node = node,
439 .companion = root->device
440 };
441
442 memcpy(bus->sysdata, &sd, sizeof(sd));
443 } else {
444 struct pci_root_info *info;
445
446 info = kzalloc(sizeof(*info), GFP_KERNEL);
447 if (!info)
448 dev_err(&root->device->dev,
449 "pci_bus %04x:%02x: ignored (out of memory)\n",
450 domain, busnum);
451 else {
452 info->sd.domain = domain;
453 info->sd.node = node;
454 info->sd.companion = root->device;
455 bus = acpi_pci_root_create(root, &acpi_pci_root_ops,
456 &info->common, &info->sd);
457 }
458 }
459
460 /* After the PCI-E bus has been walked and all devices discovered,
461 * configure any settings of the fabric that might be necessary.
462 */
463 if (bus) {
464 struct pci_bus *child;
465 list_for_each_entry(child, &bus->children, node)
466 pcie_bus_configure_settings(child);
467 }
468
469 return bus;
470 }
471
pcibios_root_bridge_prepare(struct pci_host_bridge * bridge)472 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
473 {
474 /*
475 * We pass NULL as parent to pci_create_root_bus(), so if it is not NULL
476 * here, pci_create_root_bus() has been called by someone else and
477 * sysdata is likely to be different from what we expect. Let it go in
478 * that case.
479 */
480 if (!bridge->dev.parent) {
481 struct pci_sysdata *sd = bridge->bus->sysdata;
482 ACPI_COMPANION_SET(&bridge->dev, sd->companion);
483 }
484 return 0;
485 }
486
pci_acpi_init(void)487 int __init pci_acpi_init(void)
488 {
489 struct pci_dev *dev = NULL;
490
491 if (acpi_noirq)
492 return -ENODEV;
493
494 printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
495 acpi_irq_penalty_init();
496 pcibios_enable_irq = acpi_pci_irq_enable;
497 pcibios_disable_irq = acpi_pci_irq_disable;
498 x86_init.pci.init_irq = x86_init_noop;
499
500 if (pci_routeirq) {
501 /*
502 * PCI IRQ routing is set up by pci_enable_device(), but we
503 * also do it here in case there are still broken drivers that
504 * don't use pci_enable_device().
505 */
506 printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
507 for_each_pci_dev(dev)
508 acpi_pci_irq_enable(dev);
509 }
510
511 return 0;
512 }
513