1 /*
2 * Copyright (c) 2006 - 2011 Intel-NE, Inc.  All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *      - Redistributions of source code must retain the above
15 *        copyright notice, this list of conditions and the following
16 *        disclaimer.
17 *
18 *      - Redistributions in binary form must reproduce the above
19 *        copyright notice, this list of conditions and the following
20 *        disclaimer in the documentation and/or other materials
21 *        provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32 
33 #ifndef __NES_MGT_H
34 #define __NES_MGT_H
35 
36 #define MPA_FRAMING 6	/* length is 2 bytes, crc is 4 bytes */
37 
38 int nes_init_mgt_qp(struct nes_device *nesdev, struct net_device *netdev, struct nes_vnic *nesvnic);
39 void nes_queue_mgt_skbs(struct sk_buff *skb, struct nes_vnic *nesvnic, struct nes_qp *nesqp);
40 void nes_destroy_mgt(struct nes_vnic *nesvnic);
41 void nes_destroy_pau_qp(struct nes_device *nesdev, struct nes_qp *nesqp);
42 
43 struct nes_hw_mgt {
44 	struct nes_hw_nic_rq_wqe *rq_vbase;	/* virtual address of rq */
45 	dma_addr_t rq_pbase;			/* PCI memory for host rings */
46 	struct sk_buff *rx_skb[NES_NIC_WQ_SIZE];
47 	u16 qp_id;
48 	u16 sq_head;
49 	u16 rq_head;
50 	u16 rq_tail;
51 	u16 rq_size;
52 	u8 replenishing_rq;
53 	u8 reserved;
54 	spinlock_t rq_lock;
55 };
56 
57 struct nes_vnic_mgt {
58 	struct nes_vnic        *nesvnic;
59 	struct nes_hw_mgt      mgt;
60 	struct nes_hw_nic_cq   mgt_cq;
61 	atomic_t               rx_skbs_needed;
62 	struct timer_list      rq_wqes_timer;
63 	atomic_t               rx_skb_timer_running;
64 };
65 
66 #define MAX_FPDU_FRAGS 4
67 struct pau_fpdu_frag {
68 	struct sk_buff         *skb;
69 	u64                    physaddr;
70 	u32                    frag_len;
71 	bool                   cmplt;
72 };
73 
74 struct pau_fpdu_info {
75 	struct nes_qp          *nesqp;
76 	struct nes_cqp_request *cqp_request;
77 	void                   *hdr_vbase;
78 	dma_addr_t             hdr_pbase;
79 	int                    hdr_len;
80 	u16                    data_len;
81 	u16                    frag_cnt;
82 	struct pau_fpdu_frag   frags[MAX_FPDU_FRAGS];
83 };
84 
85 enum pau_qh_state {
86 	PAU_DEL_QH,
87 	PAU_ADD_LB_QH,
88 	PAU_READY
89 };
90 
91 struct pau_qh_chg {
92 	struct nes_device *nesdev;
93 	struct nes_vnic *nesvnic;
94 	struct nes_qp *nesqp;
95 };
96 
97 #endif          /* __NES_MGT_H */
98