1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Platform data for the chipidea USB dual role controller
4  */
5 
6 #ifndef __LINUX_USB_CHIPIDEA_H
7 #define __LINUX_USB_CHIPIDEA_H
8 
9 #include <linux/extcon.h>
10 #include <linux/usb/otg.h>
11 
12 struct ci_hdrc;
13 
14 /**
15  * struct ci_hdrc_cable - structure for external connector cable state tracking
16  * @connected: true if cable is connected, false otherwise
17  * @changed: set to true when extcon event happen
18  * @enabled: set to true if we've enabled the vbus or id interrupt
19  * @edev: device which generate events
20  * @ci: driver state of the chipidea device
21  * @nb: hold event notification callback
22  * @conn: used for notification registration
23  */
24 struct ci_hdrc_cable {
25 	bool				connected;
26 	bool				changed;
27 	bool				enabled;
28 	struct extcon_dev		*edev;
29 	struct ci_hdrc			*ci;
30 	struct notifier_block		nb;
31 };
32 
33 struct ci_hdrc_platform_data {
34 	const char	*name;
35 	/* offset of the capability registers */
36 	uintptr_t	 capoffset;
37 	unsigned	 power_budget;
38 	struct phy	*phy;
39 	/* old usb_phy interface */
40 	struct usb_phy	*usb_phy;
41 	enum usb_phy_interface phy_mode;
42 	unsigned long	 flags;
43 #define CI_HDRC_REGS_SHARED		BIT(0)
44 #define CI_HDRC_DISABLE_DEVICE_STREAMING	BIT(1)
45 #define CI_HDRC_SUPPORTS_RUNTIME_PM	BIT(2)
46 #define CI_HDRC_DISABLE_HOST_STREAMING	BIT(3)
47 #define CI_HDRC_DISABLE_STREAMING (CI_HDRC_DISABLE_DEVICE_STREAMING |	\
48 		CI_HDRC_DISABLE_HOST_STREAMING)
49 	/*
50 	 * Only set it when DCCPARAMS.DC==1 and DCCPARAMS.HC==1,
51 	 * but otg is not supported (no register otgsc).
52 	 */
53 #define CI_HDRC_DUAL_ROLE_NOT_OTG	BIT(4)
54 #define CI_HDRC_IMX28_WRITE_FIX		BIT(5)
55 #define CI_HDRC_FORCE_FULLSPEED		BIT(6)
56 #define CI_HDRC_TURN_VBUS_EARLY_ON	BIT(7)
57 #define CI_HDRC_SET_NON_ZERO_TTHA	BIT(8)
58 #define CI_HDRC_OVERRIDE_AHB_BURST	BIT(9)
59 #define CI_HDRC_OVERRIDE_TX_BURST	BIT(10)
60 #define CI_HDRC_OVERRIDE_RX_BURST	BIT(11)
61 #define CI_HDRC_OVERRIDE_PHY_CONTROL	BIT(12) /* Glue layer manages phy */
62 #define CI_HDRC_REQUIRES_ALIGNED_DMA	BIT(13)
63 #define CI_HDRC_IMX_IS_HSIC		BIT(14)
64 #define CI_HDRC_PMQOS			BIT(15)
65 #define CI_HDRC_PHY_VBUS_CONTROL	BIT(16)
66 #define CI_HDRC_HAS_PORTSC_PEC_MISSED	BIT(17)
67 	enum usb_dr_mode	dr_mode;
68 #define CI_HDRC_CONTROLLER_RESET_EVENT		0
69 #define CI_HDRC_CONTROLLER_STOPPED_EVENT	1
70 #define CI_HDRC_IMX_HSIC_ACTIVE_EVENT		2
71 #define CI_HDRC_IMX_HSIC_SUSPEND_EVENT		3
72 #define CI_HDRC_CONTROLLER_VBUS_EVENT		4
73 	int	(*notify_event) (struct ci_hdrc *ci, unsigned event);
74 	struct regulator	*reg_vbus;
75 	struct usb_otg_caps	ci_otg_caps;
76 	bool			tpl_support;
77 	/* interrupt threshold setting */
78 	u32			itc_setting;
79 	u32			ahb_burst_config;
80 	u32			tx_burst_size;
81 	u32			rx_burst_size;
82 
83 	/* VBUS and ID signal state tracking, using extcon framework */
84 	struct ci_hdrc_cable		vbus_extcon;
85 	struct ci_hdrc_cable		id_extcon;
86 	u32			phy_clkgate_delay_us;
87 
88 	/* pins */
89 	struct pinctrl *pctl;
90 	struct pinctrl_state *pins_default;
91 	struct pinctrl_state *pins_host;
92 	struct pinctrl_state *pins_device;
93 
94 	/* platform-specific hooks */
95 	int (*hub_control)(struct ci_hdrc *ci, u16 typeReq, u16 wValue,
96 			   u16 wIndex, char *buf, u16 wLength,
97 			   bool *done, unsigned long *flags);
98 	void (*enter_lpm)(struct ci_hdrc *ci, bool enable);
99 };
100 
101 /* Default offset of capability registers */
102 #define DEF_CAPOFFSET		0x100
103 
104 /* Add ci hdrc device */
105 struct platform_device *ci_hdrc_add_device(struct device *dev,
106 			struct resource *res, int nres,
107 			struct ci_hdrc_platform_data *platdata);
108 /* Remove ci hdrc device */
109 void ci_hdrc_remove_device(struct platform_device *pdev);
110 /* Get current available role */
111 enum usb_dr_mode ci_hdrc_query_available_role(struct platform_device *pdev);
112 
113 #endif
114