1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Host communication command constants for ChromeOS EC 4 * 5 * Copyright (C) 2012 Google, Inc 6 * 7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 9 */ 10 11 /* Host communication command constants for Chrome EC */ 12 13 #ifndef __CROS_EC_COMMANDS_H 14 #define __CROS_EC_COMMANDS_H 15 16 17 18 19 #define BUILD_ASSERT(_cond) 20 21 /* 22 * Current version of this protocol 23 * 24 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is 25 * determined in other ways. Remove this once the kernel code no longer 26 * depends on it. 27 */ 28 #define EC_PROTO_VERSION 0x00000002 29 30 /* Command version mask */ 31 #define EC_VER_MASK(version) BIT(version) 32 33 /* I/O addresses for ACPI commands */ 34 #define EC_LPC_ADDR_ACPI_DATA 0x62 35 #define EC_LPC_ADDR_ACPI_CMD 0x66 36 37 /* I/O addresses for host command */ 38 #define EC_LPC_ADDR_HOST_DATA 0x200 39 #define EC_LPC_ADDR_HOST_CMD 0x204 40 41 /* I/O addresses for host command args and params */ 42 /* Protocol version 2 */ 43 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 44 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 45 * EC_PROTO2_MAX_PARAM_SIZE 46 */ 47 /* Protocol version 3 */ 48 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 49 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 50 51 /* 52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 53 * and they tell the kernel that so we have to think of it as two parts. 54 * 55 * Other BIOSes report only the I/O port region spanned by the Microchip 56 * MEC series EC; an attempt to address a larger region may fail. 57 */ 58 #define EC_HOST_CMD_REGION0 0x800 59 #define EC_HOST_CMD_REGION1 0x880 60 #define EC_HOST_CMD_REGION_SIZE 0x80 61 #define EC_HOST_CMD_MEC_REGION_SIZE 0x8 62 63 /* EC command register bit functions */ 64 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ 65 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 66 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ 67 #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ 68 #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ 69 #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ 70 #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ 71 72 #define EC_LPC_ADDR_MEMMAP 0x900 73 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 74 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 75 76 /* The offset address of each type of data in mapped memory. */ 77 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ 78 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ 79 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ 80 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ 81 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 82 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 83 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 84 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 85 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 86 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ 87 /* Unused 0x28 - 0x2f */ 88 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 89 /* Unused 0x31 - 0x33 */ 90 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ 91 /* Battery values are all 32 bits, unless otherwise noted. */ 92 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 93 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 94 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 95 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ 96 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ 97 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ 98 /* Unused 0x4f */ 99 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 100 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 101 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 102 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 103 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ 104 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 105 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 106 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 107 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 108 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ 109 /* Unused 0x84 - 0x8f */ 110 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 111 /* Unused 0x91 */ 112 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 113 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 114 /* 0x94 - 0x99: 1st Accelerometer */ 115 /* 0x9a - 0x9f: 2nd Accelerometer */ 116 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 117 /* Unused 0xa6 - 0xdf */ 118 119 /* 120 * ACPI is unable to access memory mapped data at or above this offset due to 121 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 122 * which might be needed by ACPI. 123 */ 124 #define EC_MEMMAP_NO_ACPI 0xe0 125 126 /* Define the format of the accelerometer mapped memory status byte. */ 127 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 128 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) 129 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) 130 131 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 132 #define EC_TEMP_SENSOR_ENTRIES 16 133 /* 134 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 135 * 136 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 137 */ 138 #define EC_TEMP_SENSOR_B_ENTRIES 8 139 140 /* Special values for mapped temperature sensors */ 141 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff 142 #define EC_TEMP_SENSOR_ERROR 0xfe 143 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd 144 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 145 /* 146 * The offset of temperature value stored in mapped memory. This allows 147 * reporting a temperature range of 200K to 454K = -73C to 181C. 148 */ 149 #define EC_TEMP_SENSOR_OFFSET 200 150 151 /* 152 * Number of ALS readings at EC_MEMMAP_ALS 153 */ 154 #define EC_ALS_ENTRIES 2 155 156 /* 157 * The default value a temperature sensor will return when it is present but 158 * has not been read this boot. This is a reasonable number to avoid 159 * triggering alarms on the host. 160 */ 161 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) 162 163 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 164 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 165 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 166 167 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 168 #define EC_BATT_FLAG_AC_PRESENT 0x01 169 #define EC_BATT_FLAG_BATT_PRESENT 0x02 170 #define EC_BATT_FLAG_DISCHARGING 0x04 171 #define EC_BATT_FLAG_CHARGING 0x08 172 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 173 /* Set if some of the static/dynamic data is invalid (or outdated). */ 174 #define EC_BATT_FLAG_INVALID_DATA 0x20 175 176 /* Switch flags at EC_MEMMAP_SWITCHES */ 177 #define EC_SWITCH_LID_OPEN 0x01 178 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 179 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 180 /* Was recovery requested via keyboard; now unused. */ 181 #define EC_SWITCH_IGNORE1 0x08 182 /* Recovery requested via dedicated signal (from servo board) */ 183 #define EC_SWITCH_DEDICATED_RECOVERY 0x10 184 /* Was fake developer mode switch; now unused. Remove in next refactor. */ 185 #define EC_SWITCH_IGNORE0 0x20 186 187 /* Host command interface flags */ 188 /* Host command interface supports LPC args (LPC interface only) */ 189 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 190 /* Host command interface supports version 3 protocol */ 191 #define EC_HOST_CMD_FLAG_VERSION_3 0x02 192 193 /* Wireless switch flags */ 194 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ 195 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ 196 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ 197 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 198 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 199 200 /*****************************************************************************/ 201 /* 202 * ACPI commands 203 * 204 * These are valid ONLY on the ACPI command/data port. 205 */ 206 207 /* 208 * ACPI Read Embedded Controller 209 * 210 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 211 * 212 * Use the following sequence: 213 * 214 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 215 * - Wait for EC_LPC_CMDR_PENDING bit to clear 216 * - Write address to EC_LPC_ADDR_ACPI_DATA 217 * - Wait for EC_LPC_CMDR_DATA bit to set 218 * - Read value from EC_LPC_ADDR_ACPI_DATA 219 */ 220 #define EC_CMD_ACPI_READ 0x0080 221 222 /* 223 * ACPI Write Embedded Controller 224 * 225 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 226 * 227 * Use the following sequence: 228 * 229 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 230 * - Wait for EC_LPC_CMDR_PENDING bit to clear 231 * - Write address to EC_LPC_ADDR_ACPI_DATA 232 * - Wait for EC_LPC_CMDR_PENDING bit to clear 233 * - Write value to EC_LPC_ADDR_ACPI_DATA 234 */ 235 #define EC_CMD_ACPI_WRITE 0x0081 236 237 /* 238 * ACPI Burst Enable Embedded Controller 239 * 240 * This enables burst mode on the EC to allow the host to issue several 241 * commands back-to-back. While in this mode, writes to mapped multi-byte 242 * data are locked out to ensure data consistency. 243 */ 244 #define EC_CMD_ACPI_BURST_ENABLE 0x0082 245 246 /* 247 * ACPI Burst Disable Embedded Controller 248 * 249 * This disables burst mode on the EC and stops preventing EC writes to mapped 250 * multi-byte data. 251 */ 252 #define EC_CMD_ACPI_BURST_DISABLE 0x0083 253 254 /* 255 * ACPI Query Embedded Controller 256 * 257 * This clears the lowest-order bit in the currently pending host events, and 258 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 259 * event 0x80000000 = 32), or 0 if no event was pending. 260 */ 261 #define EC_CMD_ACPI_QUERY_EVENT 0x0084 262 263 /* Valid addresses in ACPI memory space, for read/write commands */ 264 265 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 266 #define EC_ACPI_MEM_VERSION 0x00 267 /* 268 * Test location; writing value here updates test compliment byte to (0xff - 269 * value). 270 */ 271 #define EC_ACPI_MEM_TEST 0x01 272 /* Test compliment; writes here are ignored. */ 273 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 274 275 /* Keyboard backlight brightness percent (0 - 100) */ 276 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 277 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 278 #define EC_ACPI_MEM_FAN_DUTY 0x04 279 280 /* 281 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 282 * independent thresholds attached to them. The current value of the ID 283 * register determines which sensor is affected by the THRESHOLD and COMMIT 284 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 285 * as the memory-mapped sensors. The COMMIT register applies those settings. 286 * 287 * The spec does not mandate any way to read back the threshold settings 288 * themselves, but when a threshold is crossed the AP needs a way to determine 289 * which sensor(s) are responsible. Each reading of the ID register clears and 290 * returns one sensor ID that has crossed one of its threshold (in either 291 * direction) since the last read. A value of 0xFF means "no new thresholds 292 * have tripped". Setting or enabling the thresholds for a sensor will clear 293 * the unread event count for that sensor. 294 */ 295 #define EC_ACPI_MEM_TEMP_ID 0x05 296 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 297 #define EC_ACPI_MEM_TEMP_COMMIT 0x07 298 /* 299 * Here are the bits for the COMMIT register: 300 * bit 0 selects the threshold index for the chosen sensor (0/1) 301 * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 302 * Each write to the commit register affects one threshold. 303 */ 304 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) 305 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) 306 /* 307 * Example: 308 * 309 * Set the thresholds for sensor 2 to 50 C and 60 C: 310 * write 2 to [0x05] -- select temp sensor 2 311 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 312 * write 0x2 to [0x07] -- enable threshold 0 with this value 313 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 314 * write 0x3 to [0x07] -- enable threshold 1 with this value 315 * 316 * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 317 * write 2 to [0x05] -- select temp sensor 2 318 * write 0x1 to [0x07] -- disable threshold 1 319 */ 320 321 /* DPTF battery charging current limit */ 322 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 323 324 /* Charging limit is specified in 64 mA steps */ 325 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 326 /* Value to disable DPTF battery charging limit */ 327 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 328 329 /* 330 * Report device orientation 331 * Bits Definition 332 * 3:1 Device DPTF Profile Number (DDPN) 333 * 0 = Reserved for backward compatibility (indicates no valid 334 * profile number. Host should fall back to using TBMD). 335 * 1..7 = DPTF Profile number to indicate to host which table needs 336 * to be loaded. 337 * 0 Tablet Mode Device Indicator (TBMD) 338 */ 339 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 340 #define EC_ACPI_MEM_TBMD_SHIFT 0 341 #define EC_ACPI_MEM_TBMD_MASK 0x1 342 #define EC_ACPI_MEM_DDPN_SHIFT 1 343 #define EC_ACPI_MEM_DDPN_MASK 0x7 344 345 /* 346 * Report device features. Uses the same format as the host command, except: 347 * 348 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set 349 * of features", which is of limited interest when the system is already 350 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since 351 * these are supported, it defaults to 0. 352 * This allows detecting the presence of this field since older versions of 353 * the EC codebase would simply return 0xff to that unknown address. Check 354 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits 355 * are valid. 356 */ 357 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a 358 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b 359 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c 360 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d 361 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e 362 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f 363 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 364 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 365 366 #define EC_ACPI_MEM_BATTERY_INDEX 0x12 367 368 /* 369 * USB Port Power. Each bit indicates whether the corresponding USB ports' power 370 * is enabled (1) or disabled (0). 371 * bit 0 USB port ID 0 372 * ... 373 * bit 7 USB port ID 7 374 */ 375 #define EC_ACPI_MEM_USB_PORT_POWER 0x13 376 377 /* 378 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 379 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 380 */ 381 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 382 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 383 384 /* Current version of ACPI memory address space */ 385 #define EC_ACPI_MEM_VERSION_CURRENT 2 386 387 388 /* 389 * This header file is used in coreboot both in C and ACPI code. The ACPI code 390 * is pre-processed to handle constants but the ASL compiler is unable to 391 * handle actual C code so keep it separate. 392 */ 393 394 395 /* 396 * Attributes for EC request and response packets. Just defining __packed 397 * results in inefficient assembly code on ARM, if the structure is actually 398 * 32-bit aligned, as it should be for all buffers. 399 * 400 * Be very careful when adding these to existing structures. They will round 401 * up the structure size to the specified boundary. 402 * 403 * Also be very careful to make that if a structure is included in some other 404 * parent structure that the alignment will still be true given the packing of 405 * the parent structure. This is particularly important if the sub-structure 406 * will be passed as a pointer to another function, since that function will 407 * not know about the misaligment caused by the parent structure's packing. 408 * 409 * Also be very careful using __packed - particularly when nesting non-packed 410 * structures inside packed ones. In fact, DO NOT use __packed directly; 411 * always use one of these attributes. 412 * 413 * Once everything is annotated properly, the following search strings should 414 * not return ANY matches in this file other than right here: 415 * 416 * "__packed" - generates inefficient code; all sub-structs must also be packed 417 * 418 * "struct [^_]" - all structs should be annotated, except for structs that are 419 * members of other structs/unions (and their original declarations should be 420 * annotated). 421 */ 422 423 /* 424 * Packed structures make no assumption about alignment, so they do inefficient 425 * byte-wise reads. 426 */ 427 #define __ec_align1 __packed 428 #define __ec_align2 __packed 429 #define __ec_align4 __packed 430 #define __ec_align_size1 __packed 431 #define __ec_align_offset1 __packed 432 #define __ec_align_offset2 __packed 433 #define __ec_todo_packed __packed 434 #define __ec_todo_unpacked 435 436 437 /* LPC command status byte masks */ 438 /* EC has written a byte in the data register and host hasn't read it yet */ 439 #define EC_LPC_STATUS_TO_HOST 0x01 440 /* Host has written a command/data byte and the EC hasn't read it yet */ 441 #define EC_LPC_STATUS_FROM_HOST 0x02 442 /* EC is processing a command */ 443 #define EC_LPC_STATUS_PROCESSING 0x04 444 /* Last write to EC was a command, not data */ 445 #define EC_LPC_STATUS_LAST_CMD 0x08 446 /* EC is in burst mode */ 447 #define EC_LPC_STATUS_BURST_MODE 0x10 448 /* SCI event is pending (requesting SCI query) */ 449 #define EC_LPC_STATUS_SCI_PENDING 0x20 450 /* SMI event is pending (requesting SMI query) */ 451 #define EC_LPC_STATUS_SMI_PENDING 0x40 452 /* (reserved) */ 453 #define EC_LPC_STATUS_RESERVED 0x80 454 455 /* 456 * EC is busy. This covers both the EC processing a command, and the host has 457 * written a new command but the EC hasn't picked it up yet. 458 */ 459 #define EC_LPC_STATUS_BUSY_MASK \ 460 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 461 462 /* 463 * Host command response codes (16-bit). Note that response codes should be 464 * stored in a uint16_t rather than directly in a value of this type. 465 */ 466 enum ec_status { 467 EC_RES_SUCCESS = 0, 468 EC_RES_INVALID_COMMAND = 1, 469 EC_RES_ERROR = 2, 470 EC_RES_INVALID_PARAM = 3, 471 EC_RES_ACCESS_DENIED = 4, 472 EC_RES_INVALID_RESPONSE = 5, 473 EC_RES_INVALID_VERSION = 6, 474 EC_RES_INVALID_CHECKSUM = 7, 475 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 476 EC_RES_UNAVAILABLE = 9, /* No response available */ 477 EC_RES_TIMEOUT = 10, /* We got a timeout */ 478 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 479 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 480 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 481 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 482 EC_RES_BUS_ERROR = 15, /* Communications bus error */ 483 EC_RES_BUSY = 16, /* Up but too busy. Should retry */ 484 EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ 485 EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ 486 EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ 487 EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ 488 }; 489 490 /* 491 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 492 * EC command uses code 0 to mean "no event pending". We explicitly specify 493 * each value in the enum listing so they won't change if we delete/insert an 494 * item or rearrange the list (it needs to be stable across platforms, not 495 * just within a single compiled instance). 496 */ 497 enum host_event_code { 498 EC_HOST_EVENT_LID_CLOSED = 1, 499 EC_HOST_EVENT_LID_OPEN = 2, 500 EC_HOST_EVENT_POWER_BUTTON = 3, 501 EC_HOST_EVENT_AC_CONNECTED = 4, 502 EC_HOST_EVENT_AC_DISCONNECTED = 5, 503 EC_HOST_EVENT_BATTERY_LOW = 6, 504 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 505 EC_HOST_EVENT_BATTERY = 8, 506 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 507 /* Event generated by a device attached to the EC */ 508 EC_HOST_EVENT_DEVICE = 10, 509 EC_HOST_EVENT_THERMAL = 11, 510 EC_HOST_EVENT_USB_CHARGER = 12, 511 EC_HOST_EVENT_KEY_PRESSED = 13, 512 /* 513 * EC has finished initializing the host interface. The host can check 514 * for this event following sending a EC_CMD_REBOOT_EC command to 515 * determine when the EC is ready to accept subsequent commands. 516 */ 517 EC_HOST_EVENT_INTERFACE_READY = 14, 518 /* Keyboard recovery combo has been pressed */ 519 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 520 521 /* Shutdown due to thermal overload */ 522 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 523 /* Shutdown due to battery level too low */ 524 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 525 526 /* Suggest that the AP throttle itself */ 527 EC_HOST_EVENT_THROTTLE_START = 18, 528 /* Suggest that the AP resume normal speed */ 529 EC_HOST_EVENT_THROTTLE_STOP = 19, 530 531 /* Hang detect logic detected a hang and host event timeout expired */ 532 EC_HOST_EVENT_HANG_DETECT = 20, 533 /* Hang detect logic detected a hang and warm rebooted the AP */ 534 EC_HOST_EVENT_HANG_REBOOT = 21, 535 536 /* PD MCU triggering host event */ 537 EC_HOST_EVENT_PD_MCU = 22, 538 539 /* Battery Status flags have changed */ 540 EC_HOST_EVENT_BATTERY_STATUS = 23, 541 542 /* EC encountered a panic, triggering a reset */ 543 EC_HOST_EVENT_PANIC = 24, 544 545 /* Keyboard fastboot combo has been pressed */ 546 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 547 548 /* EC RTC event occurred */ 549 EC_HOST_EVENT_RTC = 26, 550 551 /* Emulate MKBP event */ 552 EC_HOST_EVENT_MKBP = 27, 553 554 /* EC desires to change state of host-controlled USB mux */ 555 EC_HOST_EVENT_USB_MUX = 28, 556 557 /* TABLET/LAPTOP mode or detachable base attach/detach event */ 558 EC_HOST_EVENT_MODE_CHANGE = 29, 559 560 /* Keyboard recovery combo with hardware reinitialization */ 561 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 562 563 /* WoV */ 564 EC_HOST_EVENT_WOV = 31, 565 566 /* 567 * The high bit of the event mask is not used as a host event code. If 568 * it reads back as set, then the entire event mask should be 569 * considered invalid by the host. This can happen when reading the 570 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 571 * not initialized on the EC, or improperly configured on the host. 572 */ 573 EC_HOST_EVENT_INVALID = 32 574 }; 575 /* Host event mask */ 576 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) 577 578 /** 579 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS 580 * @flags: The host argument flags. 581 * @command_version: Command version. 582 * @data_size: The length of data. 583 * @checksum: Checksum; sum of command + flags + command_version + data_size + 584 * all params/response data bytes. 585 */ 586 struct ec_lpc_host_args { 587 uint8_t flags; 588 uint8_t command_version; 589 uint8_t data_size; 590 uint8_t checksum; 591 } __ec_align4; 592 593 /* Flags for ec_lpc_host_args.flags */ 594 /* 595 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 596 * params. 597 * 598 * If EC gets a command and this flag is not set, this is an old-style command. 599 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 600 * unknown length. EC must respond with an old-style response (that is, 601 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 602 */ 603 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 604 /* 605 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 606 * 607 * If EC responds to a command and this flag is not set, this is an old-style 608 * response. Command version is 0 and response data from EC is at 609 * EC_LPC_ADDR_OLD_PARAM with unknown length. 610 */ 611 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 612 613 /*****************************************************************************/ 614 /* 615 * Byte codes returned by EC over SPI interface. 616 * 617 * These can be used by the AP to debug the EC interface, and to determine 618 * when the EC is not in a state where it will ever get around to responding 619 * to the AP. 620 * 621 * Example of sequence of bytes read from EC for a current good transfer: 622 * 1. - - AP asserts chip select (CS#) 623 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request 624 * 3. - - EC starts handling CS# interrupt 625 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request 626 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in 627 * bytes looking for EC_SPI_FRAME_START 628 * 6. - - EC finishes processing and sets up response 629 * 7. EC_SPI_FRAME_START - AP reads frame byte 630 * 8. (response packet) - AP reads response packet 631 * 9. EC_SPI_PAST_END - Any additional bytes read by AP 632 * 10 - - AP deasserts chip select 633 * 11 - - EC processes CS# interrupt and sets up DMA for 634 * next request 635 * 636 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than 637 * the following byte values: 638 * EC_SPI_OLD_READY 639 * EC_SPI_RX_READY 640 * EC_SPI_RECEIVING 641 * EC_SPI_PROCESSING 642 * 643 * Then the EC found an error in the request, or was not ready for the request 644 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, 645 * because the EC is unable to tell when the AP is done sending its request. 646 */ 647 648 /* 649 * Framing byte which precedes a response packet from the EC. After sending a 650 * request, the AP will clock in bytes until it sees the framing byte, then 651 * clock in the response packet. 652 */ 653 #define EC_SPI_FRAME_START 0xec 654 655 /* 656 * Padding bytes which are clocked out after the end of a response packet. 657 */ 658 #define EC_SPI_PAST_END 0xed 659 660 /* 661 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects 662 * that the AP will send a valid packet header (starting with 663 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. 664 */ 665 #define EC_SPI_RX_READY 0xf8 666 667 /* 668 * EC has started receiving the request from the AP, but hasn't started 669 * processing it yet. 670 */ 671 #define EC_SPI_RECEIVING 0xf9 672 673 /* EC has received the entire request from the AP and is processing it. */ 674 #define EC_SPI_PROCESSING 0xfa 675 676 /* 677 * EC received bad data from the AP, such as a packet header with an invalid 678 * length. EC will ignore all data until chip select deasserts. 679 */ 680 #define EC_SPI_RX_BAD_DATA 0xfb 681 682 /* 683 * EC received data from the AP before it was ready. That is, the AP asserted 684 * chip select and started clocking data before the EC was ready to receive it. 685 * EC will ignore all data until chip select deasserts. 686 */ 687 #define EC_SPI_NOT_READY 0xfc 688 689 /* 690 * EC was ready to receive a request from the AP. EC has treated the byte sent 691 * by the AP as part of a request packet, or (for old-style ECs) is processing 692 * a fully received packet but is not ready to respond yet. 693 */ 694 #define EC_SPI_OLD_READY 0xfd 695 696 /*****************************************************************************/ 697 698 /* 699 * Protocol version 2 for I2C and SPI send a request this way: 700 * 701 * 0 EC_CMD_VERSION0 + (command version) 702 * 1 Command number 703 * 2 Length of params = N 704 * 3..N+2 Params, if any 705 * N+3 8-bit checksum of bytes 0..N+2 706 * 707 * The corresponding response is: 708 * 709 * 0 Result code (EC_RES_*) 710 * 1 Length of params = M 711 * 2..M+1 Params, if any 712 * M+2 8-bit checksum of bytes 0..M+1 713 */ 714 #define EC_PROTO2_REQUEST_HEADER_BYTES 3 715 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 716 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ 717 EC_PROTO2_REQUEST_TRAILER_BYTES) 718 719 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2 720 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 721 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ 722 EC_PROTO2_RESPONSE_TRAILER_BYTES) 723 724 /* Parameter length was limited by the LPC interface */ 725 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc 726 727 /* Maximum request and response packet sizes for protocol version 2 */ 728 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ 729 EC_PROTO2_MAX_PARAM_SIZE) 730 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ 731 EC_PROTO2_MAX_PARAM_SIZE) 732 733 /*****************************************************************************/ 734 735 /* 736 * Value written to legacy command port / prefix byte to indicate protocol 737 * 3+ structs are being used. Usage is bus-dependent. 738 */ 739 #define EC_COMMAND_PROTOCOL_3 0xda 740 741 #define EC_HOST_REQUEST_VERSION 3 742 743 /** 744 * struct ec_host_request - Version 3 request from host. 745 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it 746 * receives a header with a version it doesn't know how to 747 * parse. 748 * @checksum: Checksum of request and data; sum of all bytes including checksum 749 * should total to 0. 750 * @command: Command to send (EC_CMD_...) 751 * @command_version: Command version. 752 * @reserved: Unused byte in current protocol version; set to 0. 753 * @data_len: Length of data which follows this header. 754 */ 755 struct ec_host_request { 756 uint8_t struct_version; 757 uint8_t checksum; 758 uint16_t command; 759 uint8_t command_version; 760 uint8_t reserved; 761 uint16_t data_len; 762 } __ec_align4; 763 764 #define EC_HOST_RESPONSE_VERSION 3 765 766 /** 767 * struct ec_host_response - Version 3 response from EC. 768 * @struct_version: Struct version (=3). 769 * @checksum: Checksum of response and data; sum of all bytes including 770 * checksum should total to 0. 771 * @result: EC's response to the command (separate from communication failure) 772 * @data_len: Length of data which follows this header. 773 * @reserved: Unused bytes in current protocol version; set to 0. 774 */ 775 struct ec_host_response { 776 uint8_t struct_version; 777 uint8_t checksum; 778 uint16_t result; 779 uint16_t data_len; 780 uint16_t reserved; 781 } __ec_align4; 782 783 /*****************************************************************************/ 784 785 /* 786 * Host command protocol V4. 787 * 788 * Packets always start with a request or response header. They are followed 789 * by data_len bytes of data. If the data_crc_present flag is set, the data 790 * bytes are followed by a CRC-8 of that data, using using x^8 + x^2 + x + 1 791 * polynomial. 792 * 793 * Host algorithm when sending a request q: 794 * 795 * 101) tries_left=(some value, e.g. 3); 796 * 102) q.seq_num++ 797 * 103) q.seq_dup=0 798 * 104) Calculate q.header_crc. 799 * 105) Send request q to EC. 800 * 106) Wait for response r. Go to 201 if received or 301 if timeout. 801 * 802 * 201) If r.struct_version != 4, go to 301. 803 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. 804 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. 805 * 204) If r.seq_num != q.seq_num, go to 301. 806 * 205) If r.seq_dup == q.seq_dup, return success. 807 * 207) If r.seq_dup == 1, go to 301. 808 * 208) Return error. 809 * 810 * 301) If --tries_left <= 0, return error. 811 * 302) If q.seq_dup == 1, go to 105. 812 * 303) q.seq_dup = 1 813 * 304) Go to 104. 814 * 815 * EC algorithm when receiving a request q. 816 * EC has response buffer r, error buffer e. 817 * 818 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION 819 * and go to 301 820 * 102) If q.header_crc mismatches calculated CRC, set e.result = 821 * EC_RES_INVALID_HEADER_CRC and go to 301 822 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC 823 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC 824 * and go to 301. 825 * 104) If q.seq_dup == 0, go to 201. 826 * 105) If q.seq_num != r.seq_num, go to 201. 827 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. 828 * 829 * 201) Process request q into response r. 830 * 202) r.seq_num = q.seq_num 831 * 203) r.seq_dup = q.seq_dup 832 * 204) Calculate r.header_crc 833 * 205) If r.data_len > 0 and data is no longer available, set e.result = 834 * EC_RES_DUP_UNAVAILABLE and go to 301. 835 * 206) Send response r. 836 * 837 * 301) e.seq_num = q.seq_num 838 * 302) e.seq_dup = q.seq_dup 839 * 303) Calculate e.header_crc. 840 * 304) Send error response e. 841 */ 842 843 /* Version 4 request from host */ 844 struct ec_host_request4 { 845 /* 846 * bits 0-3: struct_version: Structure version (=4) 847 * bit 4: is_response: Is response (=0) 848 * bits 5-6: seq_num: Sequence number 849 * bit 7: seq_dup: Sequence duplicate flag 850 */ 851 uint8_t fields0; 852 853 /* 854 * bits 0-4: command_version: Command version 855 * bits 5-6: Reserved (set 0, ignore on read) 856 * bit 7: data_crc_present: Is data CRC present after data 857 */ 858 uint8_t fields1; 859 860 /* Command code (EC_CMD_*) */ 861 uint16_t command; 862 863 /* Length of data which follows this header (not including data CRC) */ 864 uint16_t data_len; 865 866 /* Reserved (set 0, ignore on read) */ 867 uint8_t reserved; 868 869 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 870 uint8_t header_crc; 871 } __ec_align4; 872 873 /* Version 4 response from EC */ 874 struct ec_host_response4 { 875 /* 876 * bits 0-3: struct_version: Structure version (=4) 877 * bit 4: is_response: Is response (=1) 878 * bits 5-6: seq_num: Sequence number 879 * bit 7: seq_dup: Sequence duplicate flag 880 */ 881 uint8_t fields0; 882 883 /* 884 * bits 0-6: Reserved (set 0, ignore on read) 885 * bit 7: data_crc_present: Is data CRC present after data 886 */ 887 uint8_t fields1; 888 889 /* Result code (EC_RES_*) */ 890 uint16_t result; 891 892 /* Length of data which follows this header (not including data CRC) */ 893 uint16_t data_len; 894 895 /* Reserved (set 0, ignore on read) */ 896 uint8_t reserved; 897 898 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 899 uint8_t header_crc; 900 } __ec_align4; 901 902 /* Fields in fields0 byte */ 903 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f 904 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 905 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 906 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 907 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 908 909 /* Fields in fields1 byte */ 910 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ 911 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 912 913 /*****************************************************************************/ 914 /* 915 * Notes on commands: 916 * 917 * Each command is an 16-bit command value. Commands which take params or 918 * return response data specify structures for that data. If no structure is 919 * specified, the command does not input or output data, respectively. 920 * Parameter/response length is implicit in the structs. Some underlying 921 * communication protocols (I2C, SPI) may add length or checksum headers, but 922 * those are implementation-dependent and not defined here. 923 * 924 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 925 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 926 */ 927 928 /*****************************************************************************/ 929 /* General / test commands */ 930 931 /* 932 * Get protocol version, used to deal with non-backward compatible protocol 933 * changes. 934 */ 935 #define EC_CMD_PROTO_VERSION 0x0000 936 937 /** 938 * struct ec_response_proto_version - Response to the proto version command. 939 * @version: The protocol version. 940 */ 941 struct ec_response_proto_version { 942 uint32_t version; 943 } __ec_align4; 944 945 /* 946 * Hello. This is a simple command to test the EC is responsive to 947 * commands. 948 */ 949 #define EC_CMD_HELLO 0x0001 950 951 /** 952 * struct ec_params_hello - Parameters to the hello command. 953 * @in_data: Pass anything here. 954 */ 955 struct ec_params_hello { 956 uint32_t in_data; 957 } __ec_align4; 958 959 /** 960 * struct ec_response_hello - Response to the hello command. 961 * @out_data: Output will be in_data + 0x01020304. 962 */ 963 struct ec_response_hello { 964 uint32_t out_data; 965 } __ec_align4; 966 967 /* Get version number */ 968 #define EC_CMD_GET_VERSION 0x0002 969 970 enum ec_current_image { 971 EC_IMAGE_UNKNOWN = 0, 972 EC_IMAGE_RO, 973 EC_IMAGE_RW 974 }; 975 976 /** 977 * struct ec_response_get_version - Response to the get version command. 978 * @version_string_ro: Null-terminated RO firmware version string. 979 * @version_string_rw: Null-terminated RW firmware version string. 980 * @reserved: Unused bytes; was previously RW-B firmware version string. 981 * @current_image: One of ec_current_image. 982 */ 983 struct ec_response_get_version { 984 char version_string_ro[32]; 985 char version_string_rw[32]; 986 char reserved[32]; 987 uint32_t current_image; 988 } __ec_align4; 989 990 /* Read test */ 991 #define EC_CMD_READ_TEST 0x0003 992 993 /** 994 * struct ec_params_read_test - Parameters for the read test command. 995 * @offset: Starting value for read buffer. 996 * @size: Size to read in bytes. 997 */ 998 struct ec_params_read_test { 999 uint32_t offset; 1000 uint32_t size; 1001 } __ec_align4; 1002 1003 /** 1004 * struct ec_response_read_test - Response to the read test command. 1005 * @data: Data returned by the read test command. 1006 */ 1007 struct ec_response_read_test { 1008 uint32_t data[32]; 1009 } __ec_align4; 1010 1011 /* 1012 * Get build information 1013 * 1014 * Response is null-terminated string. 1015 */ 1016 #define EC_CMD_GET_BUILD_INFO 0x0004 1017 1018 /* Get chip info */ 1019 #define EC_CMD_GET_CHIP_INFO 0x0005 1020 1021 /** 1022 * struct ec_response_get_chip_info - Response to the get chip info command. 1023 * @vendor: Null-terminated string for chip vendor. 1024 * @name: Null-terminated string for chip name. 1025 * @revision: Null-terminated string for chip mask version. 1026 */ 1027 struct ec_response_get_chip_info { 1028 char vendor[32]; 1029 char name[32]; 1030 char revision[32]; 1031 } __ec_align4; 1032 1033 /* Get board HW version */ 1034 #define EC_CMD_GET_BOARD_VERSION 0x0006 1035 1036 /** 1037 * struct ec_response_board_version - Response to the board version command. 1038 * @board_version: A monotonously incrementing number. 1039 */ 1040 struct ec_response_board_version { 1041 uint16_t board_version; 1042 } __ec_align2; 1043 1044 /* 1045 * Read memory-mapped data. 1046 * 1047 * This is an alternate interface to memory-mapped data for bus protocols 1048 * which don't support direct-mapped memory - I2C, SPI, etc. 1049 * 1050 * Response is params.size bytes of data. 1051 */ 1052 #define EC_CMD_READ_MEMMAP 0x0007 1053 1054 /** 1055 * struct ec_params_read_memmap - Parameters for the read memory map command. 1056 * @offset: Offset in memmap (EC_MEMMAP_*). 1057 * @size: Size to read in bytes. 1058 */ 1059 struct ec_params_read_memmap { 1060 uint8_t offset; 1061 uint8_t size; 1062 } __ec_align1; 1063 1064 /* Read versions supported for a command */ 1065 #define EC_CMD_GET_CMD_VERSIONS 0x0008 1066 1067 /** 1068 * struct ec_params_get_cmd_versions - Parameters for the get command versions. 1069 * @cmd: Command to check. 1070 */ 1071 struct ec_params_get_cmd_versions { 1072 uint8_t cmd; 1073 } __ec_align1; 1074 1075 /** 1076 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command 1077 * versions (v1) 1078 * @cmd: Command to check. 1079 */ 1080 struct ec_params_get_cmd_versions_v1 { 1081 uint16_t cmd; 1082 } __ec_align2; 1083 1084 /** 1085 * struct ec_response_get_cmd_version - Response to the get command versions. 1086 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with 1087 * a desired version. 1088 */ 1089 struct ec_response_get_cmd_versions { 1090 uint32_t version_mask; 1091 } __ec_align4; 1092 1093 /* 1094 * Check EC communications status (busy). This is needed on i2c/spi but not 1095 * on lpc since it has its own out-of-band busy indicator. 1096 * 1097 * lpc must read the status from the command register. Attempting this on 1098 * lpc will overwrite the args/parameter space and corrupt its data. 1099 */ 1100 #define EC_CMD_GET_COMMS_STATUS 0x0009 1101 1102 /* Avoid using ec_status which is for return values */ 1103 enum ec_comms_status { 1104 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ 1105 }; 1106 1107 /** 1108 * struct ec_response_get_comms_status - Response to the get comms status 1109 * command. 1110 * @flags: Mask of enum ec_comms_status. 1111 */ 1112 struct ec_response_get_comms_status { 1113 uint32_t flags; /* Mask of enum ec_comms_status */ 1114 } __ec_align4; 1115 1116 /* Fake a variety of responses, purely for testing purposes. */ 1117 #define EC_CMD_TEST_PROTOCOL 0x000A 1118 1119 /* Tell the EC what to send back to us. */ 1120 struct ec_params_test_protocol { 1121 uint32_t ec_result; 1122 uint32_t ret_len; 1123 uint8_t buf[32]; 1124 } __ec_align4; 1125 1126 /* Here it comes... */ 1127 struct ec_response_test_protocol { 1128 uint8_t buf[32]; 1129 } __ec_align4; 1130 1131 /* Get protocol information */ 1132 #define EC_CMD_GET_PROTOCOL_INFO 0x000B 1133 1134 /* Flags for ec_response_get_protocol_info.flags */ 1135 /* EC_RES_IN_PROGRESS may be returned if a command is slow */ 1136 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) 1137 1138 /** 1139 * struct ec_response_get_protocol_info - Response to the get protocol info. 1140 * @protocol_versions: Bitmask of protocol versions supported (1 << n means 1141 * version n). 1142 * @max_request_packet_size: Maximum request packet size in bytes. 1143 * @max_response_packet_size: Maximum response packet size in bytes. 1144 * @flags: see EC_PROTOCOL_INFO_* 1145 */ 1146 struct ec_response_get_protocol_info { 1147 /* Fields which exist if at least protocol version 3 supported */ 1148 uint32_t protocol_versions; 1149 uint16_t max_request_packet_size; 1150 uint16_t max_response_packet_size; 1151 uint32_t flags; 1152 } __ec_align4; 1153 1154 1155 /*****************************************************************************/ 1156 /* Get/Set miscellaneous values */ 1157 1158 /* The upper byte of .flags tells what to do (nothing means "get") */ 1159 #define EC_GSV_SET 0x80000000 1160 1161 /* 1162 * The lower three bytes of .flags identifies the parameter, if that has 1163 * meaning for an individual command. 1164 */ 1165 #define EC_GSV_PARAM_MASK 0x00ffffff 1166 1167 struct ec_params_get_set_value { 1168 uint32_t flags; 1169 uint32_t value; 1170 } __ec_align4; 1171 1172 struct ec_response_get_set_value { 1173 uint32_t flags; 1174 uint32_t value; 1175 } __ec_align4; 1176 1177 /* More than one command can use these structs to get/set parameters. */ 1178 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1179 1180 /*****************************************************************************/ 1181 /* List the features supported by the firmware */ 1182 #define EC_CMD_GET_FEATURES 0x000D 1183 1184 /* Supported features */ 1185 enum ec_feature_code { 1186 /* 1187 * This image contains a limited set of features. Another image 1188 * in RW partition may support more features. 1189 */ 1190 EC_FEATURE_LIMITED = 0, 1191 /* 1192 * Commands for probing/reading/writing/erasing the flash in the 1193 * EC are present. 1194 */ 1195 EC_FEATURE_FLASH = 1, 1196 /* 1197 * Can control the fan speed directly. 1198 */ 1199 EC_FEATURE_PWM_FAN = 2, 1200 /* 1201 * Can control the intensity of the keyboard backlight. 1202 */ 1203 EC_FEATURE_PWM_KEYB = 3, 1204 /* 1205 * Support Google lightbar, introduced on Pixel. 1206 */ 1207 EC_FEATURE_LIGHTBAR = 4, 1208 /* Control of LEDs */ 1209 EC_FEATURE_LED = 5, 1210 /* Exposes an interface to control gyro and sensors. 1211 * The host goes through the EC to access these sensors. 1212 * In addition, the EC may provide composite sensors, like lid angle. 1213 */ 1214 EC_FEATURE_MOTION_SENSE = 6, 1215 /* The keyboard is controlled by the EC */ 1216 EC_FEATURE_KEYB = 7, 1217 /* The AP can use part of the EC flash as persistent storage. */ 1218 EC_FEATURE_PSTORE = 8, 1219 /* The EC monitors BIOS port 80h, and can return POST codes. */ 1220 EC_FEATURE_PORT80 = 9, 1221 /* 1222 * Thermal management: include TMP specific commands. 1223 * Higher level than direct fan control. 1224 */ 1225 EC_FEATURE_THERMAL = 10, 1226 /* Can switch the screen backlight on/off */ 1227 EC_FEATURE_BKLIGHT_SWITCH = 11, 1228 /* Can switch the wifi module on/off */ 1229 EC_FEATURE_WIFI_SWITCH = 12, 1230 /* Monitor host events, through for example SMI or SCI */ 1231 EC_FEATURE_HOST_EVENTS = 13, 1232 /* The EC exposes GPIO commands to control/monitor connected devices. */ 1233 EC_FEATURE_GPIO = 14, 1234 /* The EC can send i2c messages to downstream devices. */ 1235 EC_FEATURE_I2C = 15, 1236 /* Command to control charger are included */ 1237 EC_FEATURE_CHARGER = 16, 1238 /* Simple battery support. */ 1239 EC_FEATURE_BATTERY = 17, 1240 /* 1241 * Support Smart battery protocol 1242 * (Common Smart Battery System Interface Specification) 1243 */ 1244 EC_FEATURE_SMART_BATTERY = 18, 1245 /* EC can detect when the host hangs. */ 1246 EC_FEATURE_HANG_DETECT = 19, 1247 /* Report power information, for pit only */ 1248 EC_FEATURE_PMU = 20, 1249 /* Another Cros EC device is present downstream of this one */ 1250 EC_FEATURE_SUB_MCU = 21, 1251 /* Support USB Power delivery (PD) commands */ 1252 EC_FEATURE_USB_PD = 22, 1253 /* Control USB multiplexer, for audio through USB port for instance. */ 1254 EC_FEATURE_USB_MUX = 23, 1255 /* Motion Sensor code has an internal software FIFO */ 1256 EC_FEATURE_MOTION_SENSE_FIFO = 24, 1257 /* Support temporary secure vstore */ 1258 EC_FEATURE_VSTORE = 25, 1259 /* EC decides on USB-C SS mux state, muxes configured by host */ 1260 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, 1261 /* EC has RTC feature that can be controlled by host commands */ 1262 EC_FEATURE_RTC = 27, 1263 /* The MCU exposes a Fingerprint sensor */ 1264 EC_FEATURE_FINGERPRINT = 28, 1265 /* The MCU exposes a Touchpad */ 1266 EC_FEATURE_TOUCHPAD = 29, 1267 /* The MCU has RWSIG task enabled */ 1268 EC_FEATURE_RWSIG = 30, 1269 /* EC has device events support */ 1270 EC_FEATURE_DEVICE_EVENT = 31, 1271 /* EC supports the unified wake masks for LPC/eSPI systems */ 1272 EC_FEATURE_UNIFIED_WAKE_MASKS = 32, 1273 /* EC supports 64-bit host events */ 1274 EC_FEATURE_HOST_EVENT64 = 33, 1275 /* EC runs code in RAM (not in place, a.k.a. XIP) */ 1276 EC_FEATURE_EXEC_IN_RAM = 34, 1277 /* EC supports CEC commands */ 1278 EC_FEATURE_CEC = 35, 1279 /* EC supports tight sensor timestamping. */ 1280 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, 1281 /* 1282 * EC supports tablet mode detection aligned to Chrome and allows 1283 * setting of threshold by host command using 1284 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. 1285 */ 1286 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, 1287 /* The MCU is a System Companion Processor (SCP). */ 1288 EC_FEATURE_SCP = 39, 1289 /* The MCU is an Integrated Sensor Hub */ 1290 EC_FEATURE_ISH = 40, 1291 /* New TCPMv2 TYPEC_ prefaced commands supported */ 1292 EC_FEATURE_TYPEC_CMD = 41, 1293 /* 1294 * The EC will wait for direction from the AP to enter Type-C alternate 1295 * modes or USB4. 1296 */ 1297 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, 1298 /* 1299 * The EC will wait for an acknowledge from the AP after setting the 1300 * mux. 1301 */ 1302 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, 1303 }; 1304 1305 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) 1306 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) 1307 1308 struct ec_response_get_features { 1309 uint32_t flags[2]; 1310 } __ec_align4; 1311 1312 /*****************************************************************************/ 1313 /* Get the board's SKU ID from EC */ 1314 #define EC_CMD_GET_SKU_ID 0x000E 1315 1316 /* Set SKU ID from AP */ 1317 #define EC_CMD_SET_SKU_ID 0x000F 1318 1319 struct ec_sku_id_info { 1320 uint32_t sku_id; 1321 } __ec_align4; 1322 1323 /*****************************************************************************/ 1324 /* Flash commands */ 1325 1326 /* Get flash info */ 1327 #define EC_CMD_FLASH_INFO 0x0010 1328 #define EC_VER_FLASH_INFO 2 1329 1330 /** 1331 * struct ec_response_flash_info - Response to the flash info command. 1332 * @flash_size: Usable flash size in bytes. 1333 * @write_block_size: Write block size. Write offset and size must be a 1334 * multiple of this. 1335 * @erase_block_size: Erase block size. Erase offset and size must be a 1336 * multiple of this. 1337 * @protect_block_size: Protection block size. Protection offset and size 1338 * must be a multiple of this. 1339 * 1340 * Version 0 returns these fields. 1341 */ 1342 struct ec_response_flash_info { 1343 uint32_t flash_size; 1344 uint32_t write_block_size; 1345 uint32_t erase_block_size; 1346 uint32_t protect_block_size; 1347 } __ec_align4; 1348 1349 /* 1350 * Flags for version 1+ flash info command 1351 * EC flash erases bits to 0 instead of 1. 1352 */ 1353 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) 1354 1355 /* 1356 * Flash must be selected for read/write/erase operations to succeed. This may 1357 * be necessary on a chip where write/erase can be corrupted by other board 1358 * activity, or where the chip needs to enable some sort of programming voltage, 1359 * or where the read/write/erase operations require cleanly suspending other 1360 * chip functionality. 1361 */ 1362 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) 1363 1364 /** 1365 * struct ec_response_flash_info_1 - Response to the flash info v1 command. 1366 * @flash_size: Usable flash size in bytes. 1367 * @write_block_size: Write block size. Write offset and size must be a 1368 * multiple of this. 1369 * @erase_block_size: Erase block size. Erase offset and size must be a 1370 * multiple of this. 1371 * @protect_block_size: Protection block size. Protection offset and size 1372 * must be a multiple of this. 1373 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if 1374 * size is exactly this and offset is a multiple of this. 1375 * For example, an EC may have a write buffer which can do 1376 * half-page operations if data is aligned, and a slower 1377 * word-at-a-time write mode. 1378 * @flags: Flags; see EC_FLASH_INFO_* 1379 * 1380 * Version 1 returns the same initial fields as version 0, with additional 1381 * fields following. 1382 * 1383 * gcc anonymous structs don't seem to get along with the __packed directive; 1384 * if they did we'd define the version 0 structure as a sub-structure of this 1385 * one. 1386 * 1387 * Version 2 supports flash banks of different sizes: 1388 * The caller specified the number of banks it has preallocated 1389 * (num_banks_desc) 1390 * The EC returns the number of banks describing the flash memory. 1391 * It adds banks descriptions up to num_banks_desc. 1392 */ 1393 struct ec_response_flash_info_1 { 1394 /* Version 0 fields; see above for description */ 1395 uint32_t flash_size; 1396 uint32_t write_block_size; 1397 uint32_t erase_block_size; 1398 uint32_t protect_block_size; 1399 1400 /* Version 1 adds these fields: */ 1401 uint32_t write_ideal_size; 1402 uint32_t flags; 1403 } __ec_align4; 1404 1405 struct ec_params_flash_info_2 { 1406 /* Number of banks to describe */ 1407 uint16_t num_banks_desc; 1408 /* Reserved; set 0; ignore on read */ 1409 uint8_t reserved[2]; 1410 } __ec_align4; 1411 1412 struct ec_flash_bank { 1413 /* Number of sector is in this bank. */ 1414 uint16_t count; 1415 /* Size in power of 2 of each sector (8 --> 256 bytes) */ 1416 uint8_t size_exp; 1417 /* Minimal write size for the sectors in this bank */ 1418 uint8_t write_size_exp; 1419 /* Erase size for the sectors in this bank */ 1420 uint8_t erase_size_exp; 1421 /* Size for write protection, usually identical to erase size. */ 1422 uint8_t protect_size_exp; 1423 /* Reserved; set 0; ignore on read */ 1424 uint8_t reserved[2]; 1425 }; 1426 1427 struct ec_response_flash_info_2 { 1428 /* Total flash in the EC. */ 1429 uint32_t flash_size; 1430 /* Flags; see EC_FLASH_INFO_* */ 1431 uint32_t flags; 1432 /* Maximum size to use to send data to write to the EC. */ 1433 uint32_t write_ideal_size; 1434 /* Number of banks present in the EC. */ 1435 uint16_t num_banks_total; 1436 /* Number of banks described in banks array. */ 1437 uint16_t num_banks_desc; 1438 struct ec_flash_bank banks[]; 1439 } __ec_align4; 1440 1441 /* 1442 * Read flash 1443 * 1444 * Response is params.size bytes of data. 1445 */ 1446 #define EC_CMD_FLASH_READ 0x0011 1447 1448 /** 1449 * struct ec_params_flash_read - Parameters for the flash read command. 1450 * @offset: Byte offset to read. 1451 * @size: Size to read in bytes. 1452 */ 1453 struct ec_params_flash_read { 1454 uint32_t offset; 1455 uint32_t size; 1456 } __ec_align4; 1457 1458 /* Write flash */ 1459 #define EC_CMD_FLASH_WRITE 0x0012 1460 #define EC_VER_FLASH_WRITE 1 1461 1462 /* Version 0 of the flash command supported only 64 bytes of data */ 1463 #define EC_FLASH_WRITE_VER0_SIZE 64 1464 1465 /** 1466 * struct ec_params_flash_write - Parameters for the flash write command. 1467 * @offset: Byte offset to write. 1468 * @size: Size to write in bytes. 1469 */ 1470 struct ec_params_flash_write { 1471 uint32_t offset; 1472 uint32_t size; 1473 /* Followed by data to write */ 1474 } __ec_align4; 1475 1476 /* Erase flash */ 1477 #define EC_CMD_FLASH_ERASE 0x0013 1478 1479 /** 1480 * struct ec_params_flash_erase - Parameters for the flash erase command, v0. 1481 * @offset: Byte offset to erase. 1482 * @size: Size to erase in bytes. 1483 */ 1484 struct ec_params_flash_erase { 1485 uint32_t offset; 1486 uint32_t size; 1487 } __ec_align4; 1488 1489 /* 1490 * v1 add async erase: 1491 * subcommands can returns: 1492 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1493 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1494 * EC_RES_ERROR : other errors. 1495 * EC_RES_BUSY : an existing erase operation is in progress. 1496 * EC_RES_ACCESS_DENIED: Trying to erase running image. 1497 * 1498 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1499 * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1500 * the proper result. 1501 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1502 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1503 * ERASE_GET_RESULT command may timeout on EC where flash access is not 1504 * permitted while erasing. (For instance, STM32F4). 1505 */ 1506 enum ec_flash_erase_cmd { 1507 FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1508 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1509 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1510 }; 1511 1512 /** 1513 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. 1514 * @cmd: One of ec_flash_erase_cmd. 1515 * @reserved: Pad byte; currently always contains 0. 1516 * @flag: No flags defined yet; set to 0. 1517 * @params: Same as v0 parameters. 1518 */ 1519 struct ec_params_flash_erase_v1 { 1520 uint8_t cmd; 1521 uint8_t reserved; 1522 uint16_t flag; 1523 struct ec_params_flash_erase params; 1524 } __ec_align4; 1525 1526 /* 1527 * Get/set flash protection. 1528 * 1529 * If mask!=0, sets/clear the requested bits of flags. Depending on the 1530 * firmware write protect GPIO, not all flags will take effect immediately; 1531 * some flags require a subsequent hard reset to take effect. Check the 1532 * returned flags bits to see what actually happened. 1533 * 1534 * If mask=0, simply returns the current flags state. 1535 */ 1536 #define EC_CMD_FLASH_PROTECT 0x0015 1537 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1538 1539 /* Flags for flash protection */ 1540 /* RO flash code protected when the EC boots */ 1541 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) 1542 /* 1543 * RO flash code protected now. If this bit is set, at-boot status cannot 1544 * be changed. 1545 */ 1546 #define EC_FLASH_PROTECT_RO_NOW BIT(1) 1547 /* Entire flash code protected now, until reboot. */ 1548 #define EC_FLASH_PROTECT_ALL_NOW BIT(2) 1549 /* Flash write protect GPIO is asserted now */ 1550 #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) 1551 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1552 #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) 1553 /* 1554 * Error - flash protection is in inconsistent state. At least one bank of 1555 * flash which should be protected is not protected. Usually fixed by 1556 * re-requesting the desired flags, or by a hard reset if that fails. 1557 */ 1558 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) 1559 /* Entire flash code protected when the EC boots */ 1560 #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) 1561 /* RW flash code protected when the EC boots */ 1562 #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) 1563 /* RW flash code protected now. */ 1564 #define EC_FLASH_PROTECT_RW_NOW BIT(8) 1565 /* Rollback information flash region protected when the EC boots */ 1566 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) 1567 /* Rollback information flash region protected now */ 1568 #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) 1569 1570 1571 /** 1572 * struct ec_params_flash_protect - Parameters for the flash protect command. 1573 * @mask: Bits in flags to apply. 1574 * @flags: New flags to apply. 1575 */ 1576 struct ec_params_flash_protect { 1577 uint32_t mask; 1578 uint32_t flags; 1579 } __ec_align4; 1580 1581 /** 1582 * struct ec_response_flash_protect - Response to the flash protect command. 1583 * @flags: Current value of flash protect flags. 1584 * @valid_flags: Flags which are valid on this platform. This allows the 1585 * caller to distinguish between flags which aren't set vs. flags 1586 * which can't be set on this platform. 1587 * @writable_flags: Flags which can be changed given the current protection 1588 * state. 1589 */ 1590 struct ec_response_flash_protect { 1591 uint32_t flags; 1592 uint32_t valid_flags; 1593 uint32_t writable_flags; 1594 } __ec_align4; 1595 1596 /* 1597 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 1598 * write protect. These commands may be reused with version > 0. 1599 */ 1600 1601 /* Get the region offset/size */ 1602 #define EC_CMD_FLASH_REGION_INFO 0x0016 1603 #define EC_VER_FLASH_REGION_INFO 1 1604 1605 enum ec_flash_region { 1606 /* Region which holds read-only EC image */ 1607 EC_FLASH_REGION_RO = 0, 1608 /* 1609 * Region which holds active RW image. 'Active' is different from 1610 * 'running'. Active means 'scheduled-to-run'. Since RO image always 1611 * scheduled to run, active/non-active applies only to RW images (for 1612 * the same reason 'update' applies only to RW images. It's a state of 1613 * an image on a flash. Running image can be RO, RW_A, RW_B but active 1614 * image can only be RW_A or RW_B. In recovery mode, an active RW image 1615 * doesn't enter 'running' state but it's still active on a flash. 1616 */ 1617 EC_FLASH_REGION_ACTIVE, 1618 /* 1619 * Region which should be write-protected in the factory (a superset of 1620 * EC_FLASH_REGION_RO) 1621 */ 1622 EC_FLASH_REGION_WP_RO, 1623 /* Region which holds updatable (non-active) RW image */ 1624 EC_FLASH_REGION_UPDATE, 1625 /* Number of regions */ 1626 EC_FLASH_REGION_COUNT, 1627 }; 1628 /* 1629 * 'RW' is vague if there are multiple RW images; we mean the active one, 1630 * so the old constant is deprecated. 1631 */ 1632 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE 1633 1634 /** 1635 * struct ec_params_flash_region_info - Parameters for the flash region info 1636 * command. 1637 * @region: Flash region; see EC_FLASH_REGION_* 1638 */ 1639 struct ec_params_flash_region_info { 1640 uint32_t region; 1641 } __ec_align4; 1642 1643 struct ec_response_flash_region_info { 1644 uint32_t offset; 1645 uint32_t size; 1646 } __ec_align4; 1647 1648 /* Read/write VbNvContext */ 1649 #define EC_CMD_VBNV_CONTEXT 0x0017 1650 #define EC_VER_VBNV_CONTEXT 1 1651 #define EC_VBNV_BLOCK_SIZE 16 1652 1653 enum ec_vbnvcontext_op { 1654 EC_VBNV_CONTEXT_OP_READ, 1655 EC_VBNV_CONTEXT_OP_WRITE, 1656 }; 1657 1658 struct ec_params_vbnvcontext { 1659 uint32_t op; 1660 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1661 } __ec_align4; 1662 1663 struct ec_response_vbnvcontext { 1664 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1665 } __ec_align4; 1666 1667 1668 /* Get SPI flash information */ 1669 #define EC_CMD_FLASH_SPI_INFO 0x0018 1670 1671 struct ec_response_flash_spi_info { 1672 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1673 uint8_t jedec[3]; 1674 1675 /* Pad byte; currently always contains 0 */ 1676 uint8_t reserved0; 1677 1678 /* Manufacturer / device ID from command 0x90 */ 1679 uint8_t mfr_dev_id[2]; 1680 1681 /* Status registers from command 0x05 and 0x35 */ 1682 uint8_t sr1, sr2; 1683 } __ec_align1; 1684 1685 1686 /* Select flash during flash operations */ 1687 #define EC_CMD_FLASH_SELECT 0x0019 1688 1689 /** 1690 * struct ec_params_flash_select - Parameters for the flash select command. 1691 * @select: 1 to select flash, 0 to deselect flash 1692 */ 1693 struct ec_params_flash_select { 1694 uint8_t select; 1695 } __ec_align4; 1696 1697 1698 /*****************************************************************************/ 1699 /* PWM commands */ 1700 1701 /* Get fan target RPM */ 1702 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1703 1704 struct ec_response_pwm_get_fan_rpm { 1705 uint32_t rpm; 1706 } __ec_align4; 1707 1708 /* Set target fan RPM */ 1709 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1710 1711 /* Version 0 of input params */ 1712 struct ec_params_pwm_set_fan_target_rpm_v0 { 1713 uint32_t rpm; 1714 } __ec_align4; 1715 1716 /* Version 1 of input params */ 1717 struct ec_params_pwm_set_fan_target_rpm_v1 { 1718 uint32_t rpm; 1719 uint8_t fan_idx; 1720 } __ec_align_size1; 1721 1722 /* Get keyboard backlight */ 1723 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1724 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1725 1726 struct ec_response_pwm_get_keyboard_backlight { 1727 uint8_t percent; 1728 uint8_t enabled; 1729 } __ec_align1; 1730 1731 /* Set keyboard backlight */ 1732 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1733 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1734 1735 struct ec_params_pwm_set_keyboard_backlight { 1736 uint8_t percent; 1737 } __ec_align1; 1738 1739 /* Set target fan PWM duty cycle */ 1740 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1741 1742 /* Version 0 of input params */ 1743 struct ec_params_pwm_set_fan_duty_v0 { 1744 uint32_t percent; 1745 } __ec_align4; 1746 1747 /* Version 1 of input params */ 1748 struct ec_params_pwm_set_fan_duty_v1 { 1749 uint32_t percent; 1750 uint8_t fan_idx; 1751 } __ec_align_size1; 1752 1753 #define EC_CMD_PWM_SET_DUTY 0x0025 1754 /* 16 bit duty cycle, 0xffff = 100% */ 1755 #define EC_PWM_MAX_DUTY 0xffff 1756 1757 enum ec_pwm_type { 1758 /* All types, indexed by board-specific enum pwm_channel */ 1759 EC_PWM_TYPE_GENERIC = 0, 1760 /* Keyboard backlight */ 1761 EC_PWM_TYPE_KB_LIGHT, 1762 /* Display backlight */ 1763 EC_PWM_TYPE_DISPLAY_LIGHT, 1764 EC_PWM_TYPE_COUNT, 1765 }; 1766 1767 struct ec_params_pwm_set_duty { 1768 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1769 uint8_t pwm_type; /* ec_pwm_type */ 1770 uint8_t index; /* Type-specific index, or 0 if unique */ 1771 } __ec_align4; 1772 1773 #define EC_CMD_PWM_GET_DUTY 0x0026 1774 1775 struct ec_params_pwm_get_duty { 1776 uint8_t pwm_type; /* ec_pwm_type */ 1777 uint8_t index; /* Type-specific index, or 0 if unique */ 1778 } __ec_align1; 1779 1780 struct ec_response_pwm_get_duty { 1781 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1782 } __ec_align2; 1783 1784 /*****************************************************************************/ 1785 /* 1786 * Lightbar commands. This looks worse than it is. Since we only use one HOST 1787 * command to say "talk to the lightbar", we put the "and tell it to do X" part 1788 * into a subcommand. We'll make separate structs for subcommands with 1789 * different input args, so that we know how much to expect. 1790 */ 1791 #define EC_CMD_LIGHTBAR_CMD 0x0028 1792 1793 struct rgb_s { 1794 uint8_t r, g, b; 1795 } __ec_todo_unpacked; 1796 1797 #define LB_BATTERY_LEVELS 4 1798 1799 /* 1800 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a 1801 * host command, but the alignment is the same regardless. Keep it that way. 1802 */ 1803 struct lightbar_params_v0 { 1804 /* Timing */ 1805 int32_t google_ramp_up; 1806 int32_t google_ramp_down; 1807 int32_t s3s0_ramp_up; 1808 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1809 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1810 int32_t s0s3_ramp_down; 1811 int32_t s3_sleep_for; 1812 int32_t s3_ramp_up; 1813 int32_t s3_ramp_down; 1814 1815 /* Oscillation */ 1816 uint8_t new_s0; 1817 uint8_t osc_min[2]; /* AC=0/1 */ 1818 uint8_t osc_max[2]; /* AC=0/1 */ 1819 uint8_t w_ofs[2]; /* AC=0/1 */ 1820 1821 /* Brightness limits based on the backlight and AC. */ 1822 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1823 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1824 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1825 1826 /* Battery level thresholds */ 1827 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1828 1829 /* Map [AC][battery_level] to color index */ 1830 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1831 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1832 1833 /* Color palette */ 1834 struct rgb_s color[8]; /* 0-3 are Google colors */ 1835 } __ec_todo_packed; 1836 1837 struct lightbar_params_v1 { 1838 /* Timing */ 1839 int32_t google_ramp_up; 1840 int32_t google_ramp_down; 1841 int32_t s3s0_ramp_up; 1842 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1843 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1844 int32_t s0s3_ramp_down; 1845 int32_t s3_sleep_for; 1846 int32_t s3_ramp_up; 1847 int32_t s3_ramp_down; 1848 int32_t s5_ramp_up; 1849 int32_t s5_ramp_down; 1850 int32_t tap_tick_delay; 1851 int32_t tap_gate_delay; 1852 int32_t tap_display_time; 1853 1854 /* Tap-for-battery params */ 1855 uint8_t tap_pct_red; 1856 uint8_t tap_pct_green; 1857 uint8_t tap_seg_min_on; 1858 uint8_t tap_seg_max_on; 1859 uint8_t tap_seg_osc; 1860 uint8_t tap_idx[3]; 1861 1862 /* Oscillation */ 1863 uint8_t osc_min[2]; /* AC=0/1 */ 1864 uint8_t osc_max[2]; /* AC=0/1 */ 1865 uint8_t w_ofs[2]; /* AC=0/1 */ 1866 1867 /* Brightness limits based on the backlight and AC. */ 1868 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1869 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1870 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1871 1872 /* Battery level thresholds */ 1873 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1874 1875 /* Map [AC][battery_level] to color index */ 1876 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1877 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1878 1879 /* s5: single color pulse on inhibited power-up */ 1880 uint8_t s5_idx; 1881 1882 /* Color palette */ 1883 struct rgb_s color[8]; /* 0-3 are Google colors */ 1884 } __ec_todo_packed; 1885 1886 /* Lightbar command params v2 1887 * crbug.com/467716 1888 * 1889 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1890 * logical groups to make it more manageable ( < 120 bytes). 1891 * 1892 * NOTE: Each of these groups must be less than 120 bytes. 1893 */ 1894 1895 struct lightbar_params_v2_timing { 1896 /* Timing */ 1897 int32_t google_ramp_up; 1898 int32_t google_ramp_down; 1899 int32_t s3s0_ramp_up; 1900 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1901 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1902 int32_t s0s3_ramp_down; 1903 int32_t s3_sleep_for; 1904 int32_t s3_ramp_up; 1905 int32_t s3_ramp_down; 1906 int32_t s5_ramp_up; 1907 int32_t s5_ramp_down; 1908 int32_t tap_tick_delay; 1909 int32_t tap_gate_delay; 1910 int32_t tap_display_time; 1911 } __ec_todo_packed; 1912 1913 struct lightbar_params_v2_tap { 1914 /* Tap-for-battery params */ 1915 uint8_t tap_pct_red; 1916 uint8_t tap_pct_green; 1917 uint8_t tap_seg_min_on; 1918 uint8_t tap_seg_max_on; 1919 uint8_t tap_seg_osc; 1920 uint8_t tap_idx[3]; 1921 } __ec_todo_packed; 1922 1923 struct lightbar_params_v2_oscillation { 1924 /* Oscillation */ 1925 uint8_t osc_min[2]; /* AC=0/1 */ 1926 uint8_t osc_max[2]; /* AC=0/1 */ 1927 uint8_t w_ofs[2]; /* AC=0/1 */ 1928 } __ec_todo_packed; 1929 1930 struct lightbar_params_v2_brightness { 1931 /* Brightness limits based on the backlight and AC. */ 1932 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1933 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1934 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1935 } __ec_todo_packed; 1936 1937 struct lightbar_params_v2_thresholds { 1938 /* Battery level thresholds */ 1939 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1940 } __ec_todo_packed; 1941 1942 struct lightbar_params_v2_colors { 1943 /* Map [AC][battery_level] to color index */ 1944 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1945 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1946 1947 /* s5: single color pulse on inhibited power-up */ 1948 uint8_t s5_idx; 1949 1950 /* Color palette */ 1951 struct rgb_s color[8]; /* 0-3 are Google colors */ 1952 } __ec_todo_packed; 1953 1954 /* Lightbar program. */ 1955 #define EC_LB_PROG_LEN 192 1956 struct lightbar_program { 1957 uint8_t size; 1958 uint8_t data[EC_LB_PROG_LEN]; 1959 } __ec_todo_unpacked; 1960 1961 struct ec_params_lightbar { 1962 uint8_t cmd; /* Command (see enum lightbar_command) */ 1963 union { 1964 /* 1965 * The following commands have no args: 1966 * 1967 * dump, off, on, init, get_seq, get_params_v0, get_params_v1, 1968 * version, get_brightness, get_demo, suspend, resume, 1969 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, 1970 * get_params_v2_bright, get_params_v2_thlds, 1971 * get_params_v2_colors 1972 * 1973 * Don't use an empty struct, because C++ hates that. 1974 */ 1975 1976 struct __ec_todo_unpacked { 1977 uint8_t num; 1978 } set_brightness, seq, demo; 1979 1980 struct __ec_todo_unpacked { 1981 uint8_t ctrl, reg, value; 1982 } reg; 1983 1984 struct __ec_todo_unpacked { 1985 uint8_t led, red, green, blue; 1986 } set_rgb; 1987 1988 struct __ec_todo_unpacked { 1989 uint8_t led; 1990 } get_rgb; 1991 1992 struct __ec_todo_unpacked { 1993 uint8_t enable; 1994 } manual_suspend_ctrl; 1995 1996 struct lightbar_params_v0 set_params_v0; 1997 struct lightbar_params_v1 set_params_v1; 1998 1999 struct lightbar_params_v2_timing set_v2par_timing; 2000 struct lightbar_params_v2_tap set_v2par_tap; 2001 struct lightbar_params_v2_oscillation set_v2par_osc; 2002 struct lightbar_params_v2_brightness set_v2par_bright; 2003 struct lightbar_params_v2_thresholds set_v2par_thlds; 2004 struct lightbar_params_v2_colors set_v2par_colors; 2005 2006 struct lightbar_program set_program; 2007 }; 2008 } __ec_todo_packed; 2009 2010 struct ec_response_lightbar { 2011 union { 2012 struct __ec_todo_unpacked { 2013 struct __ec_todo_unpacked { 2014 uint8_t reg; 2015 uint8_t ic0; 2016 uint8_t ic1; 2017 } vals[23]; 2018 } dump; 2019 2020 struct __ec_todo_unpacked { 2021 uint8_t num; 2022 } get_seq, get_brightness, get_demo; 2023 2024 struct lightbar_params_v0 get_params_v0; 2025 struct lightbar_params_v1 get_params_v1; 2026 2027 2028 struct lightbar_params_v2_timing get_params_v2_timing; 2029 struct lightbar_params_v2_tap get_params_v2_tap; 2030 struct lightbar_params_v2_oscillation get_params_v2_osc; 2031 struct lightbar_params_v2_brightness get_params_v2_bright; 2032 struct lightbar_params_v2_thresholds get_params_v2_thlds; 2033 struct lightbar_params_v2_colors get_params_v2_colors; 2034 2035 struct __ec_todo_unpacked { 2036 uint32_t num; 2037 uint32_t flags; 2038 } version; 2039 2040 struct __ec_todo_unpacked { 2041 uint8_t red, green, blue; 2042 } get_rgb; 2043 2044 /* 2045 * The following commands have no response: 2046 * 2047 * off, on, init, set_brightness, seq, reg, set_rgb, demo, 2048 * set_params_v0, set_params_v1, set_program, 2049 * manual_suspend_ctrl, suspend, resume, set_v2par_timing, 2050 * set_v2par_tap, set_v2par_osc, set_v2par_bright, 2051 * set_v2par_thlds, set_v2par_colors 2052 */ 2053 }; 2054 } __ec_todo_packed; 2055 2056 /* Lightbar commands */ 2057 enum lightbar_command { 2058 LIGHTBAR_CMD_DUMP = 0, 2059 LIGHTBAR_CMD_OFF = 1, 2060 LIGHTBAR_CMD_ON = 2, 2061 LIGHTBAR_CMD_INIT = 3, 2062 LIGHTBAR_CMD_SET_BRIGHTNESS = 4, 2063 LIGHTBAR_CMD_SEQ = 5, 2064 LIGHTBAR_CMD_REG = 6, 2065 LIGHTBAR_CMD_SET_RGB = 7, 2066 LIGHTBAR_CMD_GET_SEQ = 8, 2067 LIGHTBAR_CMD_DEMO = 9, 2068 LIGHTBAR_CMD_GET_PARAMS_V0 = 10, 2069 LIGHTBAR_CMD_SET_PARAMS_V0 = 11, 2070 LIGHTBAR_CMD_VERSION = 12, 2071 LIGHTBAR_CMD_GET_BRIGHTNESS = 13, 2072 LIGHTBAR_CMD_GET_RGB = 14, 2073 LIGHTBAR_CMD_GET_DEMO = 15, 2074 LIGHTBAR_CMD_GET_PARAMS_V1 = 16, 2075 LIGHTBAR_CMD_SET_PARAMS_V1 = 17, 2076 LIGHTBAR_CMD_SET_PROGRAM = 18, 2077 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 2078 LIGHTBAR_CMD_SUSPEND = 20, 2079 LIGHTBAR_CMD_RESUME = 21, 2080 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 2081 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 2082 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 2083 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 2084 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 2085 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 2086 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 2087 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 2088 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 2089 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 2090 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 2091 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 2092 LIGHTBAR_NUM_CMDS 2093 }; 2094 2095 /*****************************************************************************/ 2096 /* LED control commands */ 2097 2098 #define EC_CMD_LED_CONTROL 0x0029 2099 2100 enum ec_led_id { 2101 /* LED to indicate battery state of charge */ 2102 EC_LED_ID_BATTERY_LED = 0, 2103 /* 2104 * LED to indicate system power state (on or in suspend). 2105 * May be on power button or on C-panel. 2106 */ 2107 EC_LED_ID_POWER_LED, 2108 /* LED on power adapter or its plug */ 2109 EC_LED_ID_ADAPTER_LED, 2110 /* LED to indicate left side */ 2111 EC_LED_ID_LEFT_LED, 2112 /* LED to indicate right side */ 2113 EC_LED_ID_RIGHT_LED, 2114 /* LED to indicate recovery mode with HW_REINIT */ 2115 EC_LED_ID_RECOVERY_HW_REINIT_LED, 2116 /* LED to indicate sysrq debug mode. */ 2117 EC_LED_ID_SYSRQ_DEBUG_LED, 2118 2119 EC_LED_ID_COUNT 2120 }; 2121 2122 /* LED control flags */ 2123 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ 2124 #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ 2125 2126 enum ec_led_colors { 2127 EC_LED_COLOR_RED = 0, 2128 EC_LED_COLOR_GREEN, 2129 EC_LED_COLOR_BLUE, 2130 EC_LED_COLOR_YELLOW, 2131 EC_LED_COLOR_WHITE, 2132 EC_LED_COLOR_AMBER, 2133 2134 EC_LED_COLOR_COUNT 2135 }; 2136 2137 struct ec_params_led_control { 2138 uint8_t led_id; /* Which LED to control */ 2139 uint8_t flags; /* Control flags */ 2140 2141 uint8_t brightness[EC_LED_COLOR_COUNT]; 2142 } __ec_align1; 2143 2144 struct ec_response_led_control { 2145 /* 2146 * Available brightness value range. 2147 * 2148 * Range 0 means color channel not present. 2149 * Range 1 means on/off control. 2150 * Other values means the LED is control by PWM. 2151 */ 2152 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 2153 } __ec_align1; 2154 2155 /*****************************************************************************/ 2156 /* Verified boot commands */ 2157 2158 /* 2159 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 2160 * reused for other purposes with version > 0. 2161 */ 2162 2163 /* Verified boot hash command */ 2164 #define EC_CMD_VBOOT_HASH 0x002A 2165 2166 struct ec_params_vboot_hash { 2167 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 2168 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2169 uint8_t nonce_size; /* Nonce size; may be 0 */ 2170 uint8_t reserved0; /* Reserved; set 0 */ 2171 uint32_t offset; /* Offset in flash to hash */ 2172 uint32_t size; /* Number of bytes to hash */ 2173 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 2174 } __ec_align4; 2175 2176 struct ec_response_vboot_hash { 2177 uint8_t status; /* enum ec_vboot_hash_status */ 2178 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2179 uint8_t digest_size; /* Size of hash digest in bytes */ 2180 uint8_t reserved0; /* Ignore; will be 0 */ 2181 uint32_t offset; /* Offset in flash which was hashed */ 2182 uint32_t size; /* Number of bytes hashed */ 2183 uint8_t hash_digest[64]; /* Hash digest data */ 2184 } __ec_align4; 2185 2186 enum ec_vboot_hash_cmd { 2187 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 2188 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 2189 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 2190 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 2191 }; 2192 2193 enum ec_vboot_hash_type { 2194 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 2195 }; 2196 2197 enum ec_vboot_hash_status { 2198 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 2199 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 2200 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 2201 }; 2202 2203 /* 2204 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 2205 * If one of these is specified, the EC will automatically update offset and 2206 * size to the correct values for the specified image (RO or RW). 2207 */ 2208 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 2209 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 2210 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 2211 2212 /* 2213 * 'RW' is vague if there are multiple RW images; we mean the active one, 2214 * so the old constant is deprecated. 2215 */ 2216 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE 2217 2218 /*****************************************************************************/ 2219 /* 2220 * Motion sense commands. We'll make separate structs for sub-commands with 2221 * different input args, so that we know how much to expect. 2222 */ 2223 #define EC_CMD_MOTION_SENSE_CMD 0x002B 2224 2225 /* Motion sense commands */ 2226 enum motionsense_command { 2227 /* 2228 * Dump command returns all motion sensor data including motion sense 2229 * module flags and individual sensor flags. 2230 */ 2231 MOTIONSENSE_CMD_DUMP = 0, 2232 2233 /* 2234 * Info command returns data describing the details of a given sensor, 2235 * including enum motionsensor_type, enum motionsensor_location, and 2236 * enum motionsensor_chip. 2237 */ 2238 MOTIONSENSE_CMD_INFO = 1, 2239 2240 /* 2241 * EC Rate command is a setter/getter command for the EC sampling rate 2242 * in milliseconds. 2243 * It is per sensor, the EC run sample task at the minimum of all 2244 * sensors EC_RATE. 2245 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 2246 * to collect all the sensor samples. 2247 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 2248 * to process of all motion sensors in milliseconds. 2249 */ 2250 MOTIONSENSE_CMD_EC_RATE = 2, 2251 2252 /* 2253 * Sensor ODR command is a setter/getter command for the output data 2254 * rate of a specific motion sensor in millihertz. 2255 */ 2256 MOTIONSENSE_CMD_SENSOR_ODR = 3, 2257 2258 /* 2259 * Sensor range command is a setter/getter command for the range of 2260 * a specified motion sensor in +/-G's or +/- deg/s. 2261 */ 2262 MOTIONSENSE_CMD_SENSOR_RANGE = 4, 2263 2264 /* 2265 * Setter/getter command for the keyboard wake angle. When the lid 2266 * angle is greater than this value, keyboard wake is disabled in S3, 2267 * and when the lid angle goes less than this value, keyboard wake is 2268 * enabled. Note, the lid angle measurement is an approximate, 2269 * un-calibrated value, hence the wake angle isn't exact. 2270 */ 2271 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, 2272 2273 /* 2274 * Returns a single sensor data. 2275 */ 2276 MOTIONSENSE_CMD_DATA = 6, 2277 2278 /* 2279 * Return sensor fifo info. 2280 */ 2281 MOTIONSENSE_CMD_FIFO_INFO = 7, 2282 2283 /* 2284 * Insert a flush element in the fifo and return sensor fifo info. 2285 * The host can use that element to synchronize its operation. 2286 */ 2287 MOTIONSENSE_CMD_FIFO_FLUSH = 8, 2288 2289 /* 2290 * Return a portion of the fifo. 2291 */ 2292 MOTIONSENSE_CMD_FIFO_READ = 9, 2293 2294 /* 2295 * Perform low level calibration. 2296 * On sensors that support it, ask to do offset calibration. 2297 */ 2298 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2299 2300 /* 2301 * Sensor Offset command is a setter/getter command for the offset 2302 * used for calibration. 2303 * The offsets can be calculated by the host, or via 2304 * PERFORM_CALIB command. 2305 */ 2306 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2307 2308 /* 2309 * List available activities for a MOTION sensor. 2310 * Indicates if they are enabled or disabled. 2311 */ 2312 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2313 2314 /* 2315 * Activity management 2316 * Enable/Disable activity recognition. 2317 */ 2318 MOTIONSENSE_CMD_SET_ACTIVITY = 13, 2319 2320 /* 2321 * Lid Angle 2322 */ 2323 MOTIONSENSE_CMD_LID_ANGLE = 14, 2324 2325 /* 2326 * Allow the FIFO to trigger interrupt via MKBP events. 2327 * By default the FIFO does not send interrupt to process the FIFO 2328 * until the AP is ready or it is coming from a wakeup sensor. 2329 */ 2330 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 2331 2332 /* 2333 * Spoof the readings of the sensors. The spoofed readings can be set 2334 * to arbitrary values, or will lock to the last read actual values. 2335 */ 2336 MOTIONSENSE_CMD_SPOOF = 16, 2337 2338 /* Set lid angle for tablet mode detection. */ 2339 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, 2340 2341 /* 2342 * Sensor Scale command is a setter/getter command for the calibration 2343 * scale. 2344 */ 2345 MOTIONSENSE_CMD_SENSOR_SCALE = 18, 2346 2347 /* Number of motionsense sub-commands. */ 2348 MOTIONSENSE_NUM_CMDS 2349 }; 2350 2351 /* List of motion sensor types. */ 2352 enum motionsensor_type { 2353 MOTIONSENSE_TYPE_ACCEL = 0, 2354 MOTIONSENSE_TYPE_GYRO = 1, 2355 MOTIONSENSE_TYPE_MAG = 2, 2356 MOTIONSENSE_TYPE_PROX = 3, 2357 MOTIONSENSE_TYPE_LIGHT = 4, 2358 MOTIONSENSE_TYPE_ACTIVITY = 5, 2359 MOTIONSENSE_TYPE_BARO = 6, 2360 MOTIONSENSE_TYPE_SYNC = 7, 2361 MOTIONSENSE_TYPE_MAX, 2362 }; 2363 2364 /* List of motion sensor locations. */ 2365 enum motionsensor_location { 2366 MOTIONSENSE_LOC_BASE = 0, 2367 MOTIONSENSE_LOC_LID = 1, 2368 MOTIONSENSE_LOC_CAMERA = 2, 2369 MOTIONSENSE_LOC_MAX, 2370 }; 2371 2372 /* List of motion sensor chips. */ 2373 enum motionsensor_chip { 2374 MOTIONSENSE_CHIP_KXCJ9 = 0, 2375 MOTIONSENSE_CHIP_LSM6DS0 = 1, 2376 MOTIONSENSE_CHIP_BMI160 = 2, 2377 MOTIONSENSE_CHIP_SI1141 = 3, 2378 MOTIONSENSE_CHIP_SI1142 = 4, 2379 MOTIONSENSE_CHIP_SI1143 = 5, 2380 MOTIONSENSE_CHIP_KX022 = 6, 2381 MOTIONSENSE_CHIP_L3GD20H = 7, 2382 MOTIONSENSE_CHIP_BMA255 = 8, 2383 MOTIONSENSE_CHIP_BMP280 = 9, 2384 MOTIONSENSE_CHIP_OPT3001 = 10, 2385 MOTIONSENSE_CHIP_BH1730 = 11, 2386 MOTIONSENSE_CHIP_GPIO = 12, 2387 MOTIONSENSE_CHIP_LIS2DH = 13, 2388 MOTIONSENSE_CHIP_LSM6DSM = 14, 2389 MOTIONSENSE_CHIP_LIS2DE = 15, 2390 MOTIONSENSE_CHIP_LIS2MDL = 16, 2391 MOTIONSENSE_CHIP_LSM6DS3 = 17, 2392 MOTIONSENSE_CHIP_LSM6DSO = 18, 2393 MOTIONSENSE_CHIP_LNG2DM = 19, 2394 MOTIONSENSE_CHIP_MAX, 2395 }; 2396 2397 /* List of orientation positions */ 2398 enum motionsensor_orientation { 2399 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, 2400 MOTIONSENSE_ORIENTATION_PORTRAIT = 1, 2401 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, 2402 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, 2403 MOTIONSENSE_ORIENTATION_UNKNOWN = 4, 2404 }; 2405 2406 struct ec_response_motion_sensor_data { 2407 /* Flags for each sensor. */ 2408 uint8_t flags; 2409 /* Sensor number the data comes from. */ 2410 uint8_t sensor_num; 2411 /* Each sensor is up to 3-axis. */ 2412 union { 2413 int16_t data[3]; 2414 struct __ec_todo_packed { 2415 uint16_t reserved; 2416 uint32_t timestamp; 2417 }; 2418 struct __ec_todo_unpacked { 2419 uint8_t activity; /* motionsensor_activity */ 2420 uint8_t state; 2421 int16_t add_info[2]; 2422 }; 2423 }; 2424 } __ec_todo_packed; 2425 2426 /* Note: used in ec_response_get_next_data */ 2427 struct ec_response_motion_sense_fifo_info { 2428 /* Size of the fifo */ 2429 uint16_t size; 2430 /* Amount of space used in the fifo */ 2431 uint16_t count; 2432 /* Timestamp recorded in us. 2433 * aka accurate timestamp when host event was triggered. 2434 */ 2435 uint32_t timestamp; 2436 /* Total amount of vector lost */ 2437 uint16_t total_lost; 2438 /* Lost events since the last fifo_info, per sensors */ 2439 uint16_t lost[]; 2440 } __ec_todo_packed; 2441 2442 struct ec_response_motion_sense_fifo_data { 2443 uint32_t number_data; 2444 struct ec_response_motion_sensor_data data[]; 2445 } __ec_todo_packed; 2446 2447 /* List supported activity recognition */ 2448 enum motionsensor_activity { 2449 MOTIONSENSE_ACTIVITY_RESERVED = 0, 2450 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 2451 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 2452 MOTIONSENSE_ACTIVITY_ORIENTATION = 3, 2453 }; 2454 2455 struct ec_motion_sense_activity { 2456 uint8_t sensor_num; 2457 uint8_t activity; /* one of enum motionsensor_activity */ 2458 uint8_t enable; /* 1: enable, 0: disable */ 2459 uint8_t reserved; 2460 uint16_t parameters[3]; /* activity dependent parameters */ 2461 } __ec_todo_unpacked; 2462 2463 /* Module flag masks used for the dump sub-command. */ 2464 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) 2465 2466 /* Sensor flag masks used for the dump sub-command. */ 2467 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) 2468 2469 /* 2470 * Flush entry for synchronization. 2471 * data contains time stamp 2472 */ 2473 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) 2474 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) 2475 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) 2476 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) 2477 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) 2478 2479 /* 2480 * Send this value for the data element to only perform a read. If you 2481 * send any other value, the EC will interpret it as data to set and will 2482 * return the actual value set. 2483 */ 2484 #define EC_MOTION_SENSE_NO_VALUE -1 2485 2486 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2487 2488 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2489 /* Set Calibration information */ 2490 #define MOTION_SENSE_SET_OFFSET BIT(0) 2491 2492 /* Default Scale value, factor 1. */ 2493 #define MOTION_SENSE_DEFAULT_SCALE BIT(15) 2494 2495 #define LID_ANGLE_UNRELIABLE 500 2496 2497 enum motionsense_spoof_mode { 2498 /* Disable spoof mode. */ 2499 MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 2500 2501 /* Enable spoof mode, but use provided component values. */ 2502 MOTIONSENSE_SPOOF_MODE_CUSTOM, 2503 2504 /* Enable spoof mode, but use the current sensor values. */ 2505 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 2506 2507 /* Query the current spoof mode status for the sensor. */ 2508 MOTIONSENSE_SPOOF_MODE_QUERY, 2509 }; 2510 2511 struct ec_params_motion_sense { 2512 uint8_t cmd; 2513 union { 2514 /* Used for MOTIONSENSE_CMD_DUMP. */ 2515 struct __ec_todo_unpacked { 2516 /* 2517 * Maximal number of sensor the host is expecting. 2518 * 0 means the host is only interested in the number 2519 * of sensors controlled by the EC. 2520 */ 2521 uint8_t max_sensor_count; 2522 } dump; 2523 2524 /* 2525 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2526 */ 2527 struct __ec_todo_unpacked { 2528 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 2529 * kb_wake_angle: angle to wakup AP. 2530 */ 2531 int16_t data; 2532 } kb_wake_angle; 2533 2534 /* 2535 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 2536 * and MOTIONSENSE_CMD_PERFORM_CALIB. 2537 */ 2538 struct __ec_todo_unpacked { 2539 uint8_t sensor_num; 2540 } info, info_3, data, fifo_flush, perform_calib, 2541 list_activities; 2542 2543 /* 2544 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 2545 * and MOTIONSENSE_CMD_SENSOR_RANGE. 2546 */ 2547 struct __ec_todo_unpacked { 2548 uint8_t sensor_num; 2549 2550 /* Rounding flag, true for round-up, false for down. */ 2551 uint8_t roundup; 2552 2553 uint16_t reserved; 2554 2555 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2556 int32_t data; 2557 } ec_rate, sensor_odr, sensor_range; 2558 2559 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2560 struct __ec_todo_packed { 2561 uint8_t sensor_num; 2562 2563 /* 2564 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2565 * the calibration information in the EC. 2566 * If unset, just retrieve calibration information. 2567 */ 2568 uint16_t flags; 2569 2570 /* 2571 * Temperature at calibration, in units of 0.01 C 2572 * 0x8000: invalid / unknown. 2573 * 0x0: 0C 2574 * 0x7fff: +327.67C 2575 */ 2576 int16_t temp; 2577 2578 /* 2579 * Offset for calibration. 2580 * Unit: 2581 * Accelerometer: 1/1024 g 2582 * Gyro: 1/1024 deg/s 2583 * Compass: 1/16 uT 2584 */ 2585 int16_t offset[3]; 2586 } sensor_offset; 2587 2588 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2589 struct __ec_todo_packed { 2590 uint8_t sensor_num; 2591 2592 /* 2593 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2594 * the calibration information in the EC. 2595 * If unset, just retrieve calibration information. 2596 */ 2597 uint16_t flags; 2598 2599 /* 2600 * Temperature at calibration, in units of 0.01 C 2601 * 0x8000: invalid / unknown. 2602 * 0x0: 0C 2603 * 0x7fff: +327.67C 2604 */ 2605 int16_t temp; 2606 2607 /* 2608 * Scale for calibration: 2609 * By default scale is 1, it is encoded on 16bits: 2610 * 1 = BIT(15) 2611 * ~2 = 0xFFFF 2612 * ~0 = 0. 2613 */ 2614 uint16_t scale[3]; 2615 } sensor_scale; 2616 2617 2618 /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 2619 /* (no params) */ 2620 2621 /* Used for MOTIONSENSE_CMD_FIFO_READ */ 2622 struct __ec_todo_unpacked { 2623 /* 2624 * Number of expected vector to return. 2625 * EC may return less or 0 if none available. 2626 */ 2627 uint32_t max_data_vector; 2628 } fifo_read; 2629 2630 struct ec_motion_sense_activity set_activity; 2631 2632 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2633 /* (no params) */ 2634 2635 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 2636 struct __ec_todo_unpacked { 2637 /* 2638 * 1: enable, 0 disable fifo, 2639 * EC_MOTION_SENSE_NO_VALUE return value. 2640 */ 2641 int8_t enable; 2642 } fifo_int_enable; 2643 2644 /* Used for MOTIONSENSE_CMD_SPOOF */ 2645 struct __ec_todo_packed { 2646 uint8_t sensor_id; 2647 2648 /* See enum motionsense_spoof_mode. */ 2649 uint8_t spoof_enable; 2650 2651 /* Ignored, used for alignment. */ 2652 uint8_t reserved; 2653 2654 /* Individual component values to spoof. */ 2655 int16_t components[3]; 2656 } spoof; 2657 2658 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2659 struct __ec_todo_unpacked { 2660 /* 2661 * Lid angle threshold for switching between tablet and 2662 * clamshell mode. 2663 */ 2664 int16_t lid_angle; 2665 2666 /* 2667 * Hysteresis degree to prevent fluctuations between 2668 * clamshell and tablet mode if lid angle keeps 2669 * changing around the threshold. Lid motion driver will 2670 * use lid_angle + hys_degree to trigger tablet mode and 2671 * lid_angle - hys_degree to trigger clamshell mode. 2672 */ 2673 int16_t hys_degree; 2674 } tablet_mode_threshold; 2675 }; 2676 } __ec_todo_packed; 2677 2678 struct ec_response_motion_sense { 2679 union { 2680 /* Used for MOTIONSENSE_CMD_DUMP */ 2681 struct __ec_todo_unpacked { 2682 /* Flags representing the motion sensor module. */ 2683 uint8_t module_flags; 2684 2685 /* Number of sensors managed directly by the EC. */ 2686 uint8_t sensor_count; 2687 2688 /* 2689 * Sensor data is truncated if response_max is too small 2690 * for holding all the data. 2691 */ 2692 struct ec_response_motion_sensor_data sensor[0]; 2693 } dump; 2694 2695 /* Used for MOTIONSENSE_CMD_INFO. */ 2696 struct __ec_todo_unpacked { 2697 /* Should be element of enum motionsensor_type. */ 2698 uint8_t type; 2699 2700 /* Should be element of enum motionsensor_location. */ 2701 uint8_t location; 2702 2703 /* Should be element of enum motionsensor_chip. */ 2704 uint8_t chip; 2705 } info; 2706 2707 /* Used for MOTIONSENSE_CMD_INFO version 3 */ 2708 struct __ec_todo_unpacked { 2709 /* Should be element of enum motionsensor_type. */ 2710 uint8_t type; 2711 2712 /* Should be element of enum motionsensor_location. */ 2713 uint8_t location; 2714 2715 /* Should be element of enum motionsensor_chip. */ 2716 uint8_t chip; 2717 2718 /* Minimum sensor sampling frequency */ 2719 uint32_t min_frequency; 2720 2721 /* Maximum sensor sampling frequency */ 2722 uint32_t max_frequency; 2723 2724 /* Max number of sensor events that could be in fifo */ 2725 uint32_t fifo_max_event_count; 2726 } info_3; 2727 2728 /* Used for MOTIONSENSE_CMD_DATA */ 2729 struct ec_response_motion_sensor_data data; 2730 2731 /* 2732 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2733 * MOTIONSENSE_CMD_SENSOR_RANGE, 2734 * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 2735 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 2736 * MOTIONSENSE_CMD_SPOOF. 2737 */ 2738 struct __ec_todo_unpacked { 2739 /* Current value of the parameter queried. */ 2740 int32_t ret; 2741 } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 2742 fifo_int_enable, spoof; 2743 2744 /* 2745 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, 2746 * PERFORM_CALIB. 2747 */ 2748 struct __ec_todo_unpacked { 2749 int16_t temp; 2750 int16_t offset[3]; 2751 } sensor_offset, perform_calib; 2752 2753 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2754 struct __ec_todo_unpacked { 2755 int16_t temp; 2756 uint16_t scale[3]; 2757 } sensor_scale; 2758 2759 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 2760 2761 struct ec_response_motion_sense_fifo_data fifo_read; 2762 2763 struct __ec_todo_packed { 2764 uint16_t reserved; 2765 uint32_t enabled; 2766 uint32_t disabled; 2767 } list_activities; 2768 2769 /* No params for set activity */ 2770 2771 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2772 struct __ec_todo_unpacked { 2773 /* 2774 * Angle between 0 and 360 degree if available, 2775 * LID_ANGLE_UNRELIABLE otherwise. 2776 */ 2777 uint16_t value; 2778 } lid_angle; 2779 2780 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2781 struct __ec_todo_unpacked { 2782 /* 2783 * Lid angle threshold for switching between tablet and 2784 * clamshell mode. 2785 */ 2786 uint16_t lid_angle; 2787 2788 /* Hysteresis degree. */ 2789 uint16_t hys_degree; 2790 } tablet_mode_threshold; 2791 2792 }; 2793 } __ec_todo_packed; 2794 2795 /*****************************************************************************/ 2796 /* Force lid open command */ 2797 2798 /* Make lid event always open */ 2799 #define EC_CMD_FORCE_LID_OPEN 0x002C 2800 2801 struct ec_params_force_lid_open { 2802 uint8_t enabled; 2803 } __ec_align1; 2804 2805 /*****************************************************************************/ 2806 /* Configure the behavior of the power button */ 2807 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D 2808 2809 enum ec_config_power_button_flags { 2810 /* Enable/Disable power button pulses for x86 devices */ 2811 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), 2812 }; 2813 2814 struct ec_params_config_power_button { 2815 /* See enum ec_config_power_button_flags */ 2816 uint8_t flags; 2817 } __ec_align1; 2818 2819 /*****************************************************************************/ 2820 /* USB charging control commands */ 2821 2822 /* Set USB port charging mode */ 2823 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2824 2825 struct ec_params_usb_charge_set_mode { 2826 uint8_t usb_port_id; 2827 uint8_t mode:7; 2828 uint8_t inhibit_charge:1; 2829 } __ec_align1; 2830 2831 /*****************************************************************************/ 2832 /* Persistent storage for host */ 2833 2834 /* Maximum bytes that can be read/written in a single command */ 2835 #define EC_PSTORE_SIZE_MAX 64 2836 2837 /* Get persistent storage info */ 2838 #define EC_CMD_PSTORE_INFO 0x0040 2839 2840 struct ec_response_pstore_info { 2841 /* Persistent storage size, in bytes */ 2842 uint32_t pstore_size; 2843 /* Access size; read/write offset and size must be a multiple of this */ 2844 uint32_t access_size; 2845 } __ec_align4; 2846 2847 /* 2848 * Read persistent storage 2849 * 2850 * Response is params.size bytes of data. 2851 */ 2852 #define EC_CMD_PSTORE_READ 0x0041 2853 2854 struct ec_params_pstore_read { 2855 uint32_t offset; /* Byte offset to read */ 2856 uint32_t size; /* Size to read in bytes */ 2857 } __ec_align4; 2858 2859 /* Write persistent storage */ 2860 #define EC_CMD_PSTORE_WRITE 0x0042 2861 2862 struct ec_params_pstore_write { 2863 uint32_t offset; /* Byte offset to write */ 2864 uint32_t size; /* Size to write in bytes */ 2865 uint8_t data[EC_PSTORE_SIZE_MAX]; 2866 } __ec_align4; 2867 2868 /*****************************************************************************/ 2869 /* Real-time clock */ 2870 2871 /* RTC params and response structures */ 2872 struct ec_params_rtc { 2873 uint32_t time; 2874 } __ec_align4; 2875 2876 struct ec_response_rtc { 2877 uint32_t time; 2878 } __ec_align4; 2879 2880 /* These use ec_response_rtc */ 2881 #define EC_CMD_RTC_GET_VALUE 0x0044 2882 #define EC_CMD_RTC_GET_ALARM 0x0045 2883 2884 /* These all use ec_params_rtc */ 2885 #define EC_CMD_RTC_SET_VALUE 0x0046 2886 #define EC_CMD_RTC_SET_ALARM 0x0047 2887 2888 /* Pass as time param to SET_ALARM to clear the current alarm */ 2889 #define EC_RTC_ALARM_CLEAR 0 2890 2891 /*****************************************************************************/ 2892 /* Port80 log access */ 2893 2894 /* Maximum entries that can be read/written in a single command */ 2895 #define EC_PORT80_SIZE_MAX 32 2896 2897 /* Get last port80 code from previous boot */ 2898 #define EC_CMD_PORT80_LAST_BOOT 0x0048 2899 #define EC_CMD_PORT80_READ 0x0048 2900 2901 enum ec_port80_subcmd { 2902 EC_PORT80_GET_INFO = 0, 2903 EC_PORT80_READ_BUFFER, 2904 }; 2905 2906 struct ec_params_port80_read { 2907 uint16_t subcmd; 2908 union { 2909 struct __ec_todo_unpacked { 2910 uint32_t offset; 2911 uint32_t num_entries; 2912 } read_buffer; 2913 }; 2914 } __ec_todo_packed; 2915 2916 struct ec_response_port80_read { 2917 union { 2918 struct __ec_todo_unpacked { 2919 uint32_t writes; 2920 uint32_t history_size; 2921 uint32_t last_boot; 2922 } get_info; 2923 struct __ec_todo_unpacked { 2924 uint16_t codes[EC_PORT80_SIZE_MAX]; 2925 } data; 2926 }; 2927 } __ec_todo_packed; 2928 2929 struct ec_response_port80_last_boot { 2930 uint16_t code; 2931 } __ec_align2; 2932 2933 /*****************************************************************************/ 2934 /* Temporary secure storage for host verified boot use */ 2935 2936 /* Number of bytes in a vstore slot */ 2937 #define EC_VSTORE_SLOT_SIZE 64 2938 2939 /* Maximum number of vstore slots */ 2940 #define EC_VSTORE_SLOT_MAX 32 2941 2942 /* Get persistent storage info */ 2943 #define EC_CMD_VSTORE_INFO 0x0049 2944 struct ec_response_vstore_info { 2945 /* Indicates which slots are locked */ 2946 uint32_t slot_locked; 2947 /* Total number of slots available */ 2948 uint8_t slot_count; 2949 } __ec_align_size1; 2950 2951 /* 2952 * Read temporary secure storage 2953 * 2954 * Response is EC_VSTORE_SLOT_SIZE bytes of data. 2955 */ 2956 #define EC_CMD_VSTORE_READ 0x004A 2957 2958 struct ec_params_vstore_read { 2959 uint8_t slot; /* Slot to read from */ 2960 } __ec_align1; 2961 2962 struct ec_response_vstore_read { 2963 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2964 } __ec_align1; 2965 2966 /* 2967 * Write temporary secure storage and lock it. 2968 */ 2969 #define EC_CMD_VSTORE_WRITE 0x004B 2970 2971 struct ec_params_vstore_write { 2972 uint8_t slot; /* Slot to write to */ 2973 uint8_t data[EC_VSTORE_SLOT_SIZE]; 2974 } __ec_align1; 2975 2976 /*****************************************************************************/ 2977 /* Thermal engine commands. Note that there are two implementations. We'll 2978 * reuse the command number, but the data and behavior is incompatible. 2979 * Version 0 is what originally shipped on Link. 2980 * Version 1 separates the CPU thermal limits from the fan control. 2981 */ 2982 2983 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 2984 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 2985 2986 /* The version 0 structs are opaque. You have to know what they are for 2987 * the get/set commands to make any sense. 2988 */ 2989 2990 /* Version 0 - set */ 2991 struct ec_params_thermal_set_threshold { 2992 uint8_t sensor_type; 2993 uint8_t threshold_id; 2994 uint16_t value; 2995 } __ec_align2; 2996 2997 /* Version 0 - get */ 2998 struct ec_params_thermal_get_threshold { 2999 uint8_t sensor_type; 3000 uint8_t threshold_id; 3001 } __ec_align1; 3002 3003 struct ec_response_thermal_get_threshold { 3004 uint16_t value; 3005 } __ec_align2; 3006 3007 3008 /* The version 1 structs are visible. */ 3009 enum ec_temp_thresholds { 3010 EC_TEMP_THRESH_WARN = 0, 3011 EC_TEMP_THRESH_HIGH, 3012 EC_TEMP_THRESH_HALT, 3013 3014 EC_TEMP_THRESH_COUNT 3015 }; 3016 3017 /* 3018 * Thermal configuration for one temperature sensor. Temps are in degrees K. 3019 * Zero values will be silently ignored by the thermal task. 3020 * 3021 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree 3022 * hysteresis. 3023 * For example, 3024 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3025 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K 3026 * EC will throttle ap when temperature >= 301 K, and release throttling when 3027 * temperature <= 299 K. 3028 * 3029 * Set 'temp_host_release' value allows thermal task has a custom hysteresis. 3030 * For example, 3031 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3032 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K 3033 * EC will throttle ap when temperature >= 301 K, and release throttling when 3034 * temperature <= 294 K. 3035 * 3036 * Note that this structure is a sub-structure of 3037 * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 3038 */ 3039 struct ec_thermal_config { 3040 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 3041 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ 3042 uint32_t temp_fan_off; /* no active cooling needed */ 3043 uint32_t temp_fan_max; /* max active cooling needed */ 3044 } __ec_align4; 3045 3046 /* Version 1 - get config for one sensor. */ 3047 struct ec_params_thermal_get_threshold_v1 { 3048 uint32_t sensor_num; 3049 } __ec_align4; 3050 /* This returns a struct ec_thermal_config */ 3051 3052 /* 3053 * Version 1 - set config for one sensor. 3054 * Use read-modify-write for best results! 3055 */ 3056 struct ec_params_thermal_set_threshold_v1 { 3057 uint32_t sensor_num; 3058 struct ec_thermal_config cfg; 3059 } __ec_align4; 3060 /* This returns no data */ 3061 3062 /****************************************************************************/ 3063 3064 /* Toggle automatic fan control */ 3065 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 3066 3067 /* Version 1 of input params */ 3068 struct ec_params_auto_fan_ctrl_v1 { 3069 uint8_t fan_idx; 3070 } __ec_align1; 3071 3072 /* Get/Set TMP006 calibration data */ 3073 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 3074 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 3075 3076 /* 3077 * The original TMP006 calibration only needed four params, but now we need 3078 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 3079 * the params opaque. The v1 "get" response will include the algorithm number 3080 * and how many params it requires. That way we can change the EC code without 3081 * needing to update this file. We can also use a different algorithm on each 3082 * sensor. 3083 */ 3084 3085 /* This is the same struct for both v0 and v1. */ 3086 struct ec_params_tmp006_get_calibration { 3087 uint8_t index; 3088 } __ec_align1; 3089 3090 /* Version 0 */ 3091 struct ec_response_tmp006_get_calibration_v0 { 3092 float s0; 3093 float b0; 3094 float b1; 3095 float b2; 3096 } __ec_align4; 3097 3098 struct ec_params_tmp006_set_calibration_v0 { 3099 uint8_t index; 3100 uint8_t reserved[3]; 3101 float s0; 3102 float b0; 3103 float b1; 3104 float b2; 3105 } __ec_align4; 3106 3107 /* Version 1 */ 3108 struct ec_response_tmp006_get_calibration_v1 { 3109 uint8_t algorithm; 3110 uint8_t num_params; 3111 uint8_t reserved[2]; 3112 float val[]; 3113 } __ec_align4; 3114 3115 struct ec_params_tmp006_set_calibration_v1 { 3116 uint8_t index; 3117 uint8_t algorithm; 3118 uint8_t num_params; 3119 uint8_t reserved; 3120 float val[]; 3121 } __ec_align4; 3122 3123 3124 /* Read raw TMP006 data */ 3125 #define EC_CMD_TMP006_GET_RAW 0x0055 3126 3127 struct ec_params_tmp006_get_raw { 3128 uint8_t index; 3129 } __ec_align1; 3130 3131 struct ec_response_tmp006_get_raw { 3132 int32_t t; /* In 1/100 K */ 3133 int32_t v; /* In nV */ 3134 } __ec_align4; 3135 3136 /*****************************************************************************/ 3137 /* MKBP - Matrix KeyBoard Protocol */ 3138 3139 /* 3140 * Read key state 3141 * 3142 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for 3143 * expected response size. 3144 * 3145 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish 3146 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 3147 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 3148 */ 3149 #define EC_CMD_MKBP_STATE 0x0060 3150 3151 /* 3152 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 3153 */ 3154 #define EC_CMD_MKBP_INFO 0x0061 3155 3156 struct ec_response_mkbp_info { 3157 uint32_t rows; 3158 uint32_t cols; 3159 /* Formerly "switches", which was 0. */ 3160 uint8_t reserved; 3161 } __ec_align_size1; 3162 3163 struct ec_params_mkbp_info { 3164 uint8_t info_type; 3165 uint8_t event_type; 3166 } __ec_align1; 3167 3168 enum ec_mkbp_info_type { 3169 /* 3170 * Info about the keyboard matrix: number of rows and columns. 3171 * 3172 * Returns struct ec_response_mkbp_info. 3173 */ 3174 EC_MKBP_INFO_KBD = 0, 3175 3176 /* 3177 * For buttons and switches, info about which specifically are 3178 * supported. event_type must be set to one of the values in enum 3179 * ec_mkbp_event. 3180 * 3181 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte 3182 * bitmask indicating which buttons or switches are present. See the 3183 * bit inidices below. 3184 */ 3185 EC_MKBP_INFO_SUPPORTED = 1, 3186 3187 /* 3188 * Instantaneous state of buttons and switches. 3189 * 3190 * event_type must be set to one of the values in enum ec_mkbp_event. 3191 * 3192 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] 3193 * indicating the current state of the keyboard matrix. 3194 * 3195 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw 3196 * event state. 3197 * 3198 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the 3199 * state of supported buttons. 3200 * 3201 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the 3202 * state of supported switches. 3203 */ 3204 EC_MKBP_INFO_CURRENT = 2, 3205 }; 3206 3207 /* Simulate key press */ 3208 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 3209 3210 struct ec_params_mkbp_simulate_key { 3211 uint8_t col; 3212 uint8_t row; 3213 uint8_t pressed; 3214 } __ec_align1; 3215 3216 #define EC_CMD_GET_KEYBOARD_ID 0x0063 3217 3218 struct ec_response_keyboard_id { 3219 uint32_t keyboard_id; 3220 } __ec_align4; 3221 3222 enum keyboard_id { 3223 KEYBOARD_ID_UNSUPPORTED = 0, 3224 KEYBOARD_ID_UNREADABLE = 0xffffffff, 3225 }; 3226 3227 /* Configure keyboard scanning */ 3228 #define EC_CMD_MKBP_SET_CONFIG 0x0064 3229 #define EC_CMD_MKBP_GET_CONFIG 0x0065 3230 3231 /* flags */ 3232 enum mkbp_config_flags { 3233 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 3234 }; 3235 3236 enum mkbp_config_valid { 3237 EC_MKBP_VALID_SCAN_PERIOD = BIT(0), 3238 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), 3239 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), 3240 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), 3241 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), 3242 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), 3243 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), 3244 }; 3245 3246 /* 3247 * Configuration for our key scanning algorithm. 3248 * 3249 * Note that this is used as a sub-structure of 3250 * ec_{params/response}_mkbp_get_config. 3251 */ 3252 struct ec_mkbp_config { 3253 uint32_t valid_mask; /* valid fields */ 3254 uint8_t flags; /* some flags (enum mkbp_config_flags) */ 3255 uint8_t valid_flags; /* which flags are valid */ 3256 uint16_t scan_period_us; /* period between start of scans */ 3257 /* revert to interrupt mode after no activity for this long */ 3258 uint32_t poll_timeout_us; 3259 /* 3260 * minimum post-scan relax time. Once we finish a scan we check 3261 * the time until we are due to start the next one. If this time is 3262 * shorter this field, we use this instead. 3263 */ 3264 uint16_t min_post_scan_delay_us; 3265 /* delay between setting up output and waiting for it to settle */ 3266 uint16_t output_settle_us; 3267 uint16_t debounce_down_us; /* time for debounce on key down */ 3268 uint16_t debounce_up_us; /* time for debounce on key up */ 3269 /* maximum depth to allow for fifo (0 = no keyscan output) */ 3270 uint8_t fifo_max_depth; 3271 } __ec_align_size1; 3272 3273 struct ec_params_mkbp_set_config { 3274 struct ec_mkbp_config config; 3275 } __ec_align_size1; 3276 3277 struct ec_response_mkbp_get_config { 3278 struct ec_mkbp_config config; 3279 } __ec_align_size1; 3280 3281 /* Run the key scan emulation */ 3282 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 3283 3284 enum ec_keyscan_seq_cmd { 3285 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 3286 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 3287 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 3288 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 3289 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 3290 }; 3291 3292 enum ec_collect_flags { 3293 /* 3294 * Indicates this scan was processed by the EC. Due to timing, some 3295 * scans may be skipped. 3296 */ 3297 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), 3298 }; 3299 3300 struct ec_collect_item { 3301 uint8_t flags; /* some flags (enum ec_collect_flags) */ 3302 } __ec_align1; 3303 3304 struct ec_params_keyscan_seq_ctrl { 3305 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 3306 union { 3307 struct __ec_align1 { 3308 uint8_t active; /* still active */ 3309 uint8_t num_items; /* number of items */ 3310 /* Current item being presented */ 3311 uint8_t cur_item; 3312 } status; 3313 struct __ec_todo_unpacked { 3314 /* 3315 * Absolute time for this scan, measured from the 3316 * start of the sequence. 3317 */ 3318 uint32_t time_us; 3319 uint8_t scan[0]; /* keyscan data */ 3320 } add; 3321 struct __ec_align1 { 3322 uint8_t start_item; /* First item to return */ 3323 uint8_t num_items; /* Number of items to return */ 3324 } collect; 3325 }; 3326 } __ec_todo_packed; 3327 3328 struct ec_result_keyscan_seq_ctrl { 3329 union { 3330 struct __ec_todo_unpacked { 3331 uint8_t num_items; /* Number of items */ 3332 /* Data for each item */ 3333 struct ec_collect_item item[0]; 3334 } collect; 3335 }; 3336 } __ec_todo_packed; 3337 3338 /* 3339 * Get the next pending MKBP event. 3340 * 3341 * Returns EC_RES_UNAVAILABLE if there is no event pending. 3342 */ 3343 #define EC_CMD_GET_NEXT_EVENT 0x0067 3344 3345 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 3346 3347 /* 3348 * We use the most significant bit of the event type to indicate to the host 3349 * that the EC has more MKBP events available to provide. 3350 */ 3351 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) 3352 3353 /* The mask to apply to get the raw event type */ 3354 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) 3355 3356 enum ec_mkbp_event { 3357 /* Keyboard matrix changed. The event data is the new matrix state. */ 3358 EC_MKBP_EVENT_KEY_MATRIX = 0, 3359 3360 /* New host event. The event data is 4 bytes of host event flags. */ 3361 EC_MKBP_EVENT_HOST_EVENT = 1, 3362 3363 /* New Sensor FIFO data. The event data is fifo_info structure. */ 3364 EC_MKBP_EVENT_SENSOR_FIFO = 2, 3365 3366 /* The state of the non-matrixed buttons have changed. */ 3367 EC_MKBP_EVENT_BUTTON = 3, 3368 3369 /* The state of the switches have changed. */ 3370 EC_MKBP_EVENT_SWITCH = 4, 3371 3372 /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 3373 EC_MKBP_EVENT_FINGERPRINT = 5, 3374 3375 /* 3376 * Sysrq event: send emulated sysrq. The event data is sysrq, 3377 * corresponding to the key to be pressed. 3378 */ 3379 EC_MKBP_EVENT_SYSRQ = 6, 3380 3381 /* 3382 * New 64-bit host event. 3383 * The event data is 8 bytes of host event flags. 3384 */ 3385 EC_MKBP_EVENT_HOST_EVENT64 = 7, 3386 3387 /* Notify the AP that something happened on CEC */ 3388 EC_MKBP_EVENT_CEC_EVENT = 8, 3389 3390 /* Send an incoming CEC message to the AP */ 3391 EC_MKBP_EVENT_CEC_MESSAGE = 9, 3392 3393 /* Peripheral device charger event */ 3394 EC_MKBP_EVENT_PCHG = 12, 3395 3396 /* Number of MKBP events */ 3397 EC_MKBP_EVENT_COUNT, 3398 }; 3399 BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); 3400 3401 union __ec_align_offset1 ec_response_get_next_data { 3402 uint8_t key_matrix[13]; 3403 3404 /* Unaligned */ 3405 uint32_t host_event; 3406 uint64_t host_event64; 3407 3408 struct __ec_todo_unpacked { 3409 /* For aligning the fifo_info */ 3410 uint8_t reserved[3]; 3411 struct ec_response_motion_sense_fifo_info info; 3412 } sensor_fifo; 3413 3414 uint32_t buttons; 3415 3416 uint32_t switches; 3417 3418 uint32_t fp_events; 3419 3420 uint32_t sysrq; 3421 3422 /* CEC events from enum mkbp_cec_event */ 3423 uint32_t cec_events; 3424 }; 3425 3426 union __ec_align_offset1 ec_response_get_next_data_v1 { 3427 uint8_t key_matrix[16]; 3428 3429 /* Unaligned */ 3430 uint32_t host_event; 3431 uint64_t host_event64; 3432 3433 struct __ec_todo_unpacked { 3434 /* For aligning the fifo_info */ 3435 uint8_t reserved[3]; 3436 struct ec_response_motion_sense_fifo_info info; 3437 } sensor_fifo; 3438 3439 uint32_t buttons; 3440 3441 uint32_t switches; 3442 3443 uint32_t fp_events; 3444 3445 uint32_t sysrq; 3446 3447 /* CEC events from enum mkbp_cec_event */ 3448 uint32_t cec_events; 3449 3450 uint8_t cec_message[16]; 3451 }; 3452 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); 3453 3454 struct ec_response_get_next_event { 3455 uint8_t event_type; 3456 /* Followed by event data if any */ 3457 union ec_response_get_next_data data; 3458 } __ec_align1; 3459 3460 struct ec_response_get_next_event_v1 { 3461 uint8_t event_type; 3462 /* Followed by event data if any */ 3463 union ec_response_get_next_data_v1 data; 3464 } __ec_align1; 3465 3466 /* Bit indices for buttons and switches.*/ 3467 /* Buttons */ 3468 #define EC_MKBP_POWER_BUTTON 0 3469 #define EC_MKBP_VOL_UP 1 3470 #define EC_MKBP_VOL_DOWN 2 3471 #define EC_MKBP_RECOVERY 3 3472 3473 /* Switches */ 3474 #define EC_MKBP_LID_OPEN 0 3475 #define EC_MKBP_TABLET_MODE 1 3476 #define EC_MKBP_BASE_ATTACHED 2 3477 #define EC_MKBP_FRONT_PROXIMITY 3 3478 3479 /* Run keyboard factory test scanning */ 3480 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 3481 3482 struct ec_response_keyboard_factory_test { 3483 uint16_t shorted; /* Keyboard pins are shorted */ 3484 } __ec_align2; 3485 3486 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 3487 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 3488 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) 3489 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 3490 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ 3491 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) 3492 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 3493 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 3494 #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ 3495 >> EC_MKBP_FP_MATCH_IDX_OFFSET) 3496 #define EC_MKBP_FP_ENROLL BIT(27) 3497 #define EC_MKBP_FP_MATCH BIT(28) 3498 #define EC_MKBP_FP_FINGER_DOWN BIT(29) 3499 #define EC_MKBP_FP_FINGER_UP BIT(30) 3500 #define EC_MKBP_FP_IMAGE_READY BIT(31) 3501 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ 3502 #define EC_MKBP_FP_ERR_ENROLL_OK 0 3503 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 3504 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 3505 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 3506 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 3507 /* Can be used to detect if image was usable for enrollment or not. */ 3508 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 3509 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ 3510 #define EC_MKBP_FP_ERR_MATCH_NO 0 3511 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 3512 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 3513 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 3514 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 3515 #define EC_MKBP_FP_ERR_MATCH_YES 1 3516 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 3517 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 3518 3519 3520 /*****************************************************************************/ 3521 /* Temperature sensor commands */ 3522 3523 /* Read temperature sensor info */ 3524 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3525 3526 struct ec_params_temp_sensor_get_info { 3527 uint8_t id; 3528 } __ec_align1; 3529 3530 struct ec_response_temp_sensor_get_info { 3531 char sensor_name[32]; 3532 uint8_t sensor_type; 3533 } __ec_align1; 3534 3535 /*****************************************************************************/ 3536 3537 /* 3538 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 3539 * commands accidentally sent to the wrong interface. See the ACPI section 3540 * below. 3541 */ 3542 3543 /*****************************************************************************/ 3544 /* Host event commands */ 3545 3546 3547 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ 3548 /* 3549 * Host event mask params and response structures, shared by all of the host 3550 * event commands below. 3551 */ 3552 struct ec_params_host_event_mask { 3553 uint32_t mask; 3554 } __ec_align4; 3555 3556 struct ec_response_host_event_mask { 3557 uint32_t mask; 3558 } __ec_align4; 3559 3560 /* These all use ec_response_host_event_mask */ 3561 #define EC_CMD_HOST_EVENT_GET_B 0x0087 3562 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 3563 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 3564 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3565 3566 /* These all use ec_params_host_event_mask */ 3567 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 3568 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 3569 #define EC_CMD_HOST_EVENT_CLEAR 0x008C 3570 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 3571 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 3572 3573 /* 3574 * Unified host event programming interface - Should be used by newer versions 3575 * of BIOS/OS to program host events and masks 3576 */ 3577 3578 struct ec_params_host_event { 3579 3580 /* Action requested by host - one of enum ec_host_event_action. */ 3581 uint8_t action; 3582 3583 /* 3584 * Mask type that the host requested the action on - one of 3585 * enum ec_host_event_mask_type. 3586 */ 3587 uint8_t mask_type; 3588 3589 /* Set to 0, ignore on read */ 3590 uint16_t reserved; 3591 3592 /* Value to be used in case of set operations. */ 3593 uint64_t value; 3594 } __ec_align4; 3595 3596 /* 3597 * Response structure returned by EC_CMD_HOST_EVENT. 3598 * Update the value on a GET request. Set to 0 on GET/CLEAR 3599 */ 3600 3601 struct ec_response_host_event { 3602 3603 /* Mask value in case of get operation */ 3604 uint64_t value; 3605 } __ec_align4; 3606 3607 enum ec_host_event_action { 3608 /* 3609 * params.value is ignored. Value of mask_type populated 3610 * in response.value 3611 */ 3612 EC_HOST_EVENT_GET, 3613 3614 /* Bits in params.value are set */ 3615 EC_HOST_EVENT_SET, 3616 3617 /* Bits in params.value are cleared */ 3618 EC_HOST_EVENT_CLEAR, 3619 }; 3620 3621 enum ec_host_event_mask_type { 3622 3623 /* Main host event copy */ 3624 EC_HOST_EVENT_MAIN, 3625 3626 /* Copy B of host events */ 3627 EC_HOST_EVENT_B, 3628 3629 /* SCI Mask */ 3630 EC_HOST_EVENT_SCI_MASK, 3631 3632 /* SMI Mask */ 3633 EC_HOST_EVENT_SMI_MASK, 3634 3635 /* Mask of events that should be always reported in hostevents */ 3636 EC_HOST_EVENT_ALWAYS_REPORT_MASK, 3637 3638 /* Active wake mask */ 3639 EC_HOST_EVENT_ACTIVE_WAKE_MASK, 3640 3641 /* Lazy wake mask for S0ix */ 3642 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 3643 3644 /* Lazy wake mask for S3 */ 3645 EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 3646 3647 /* Lazy wake mask for S5 */ 3648 EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 3649 }; 3650 3651 #define EC_CMD_HOST_EVENT 0x00A4 3652 3653 /*****************************************************************************/ 3654 /* Switch commands */ 3655 3656 /* Enable/disable LCD backlight */ 3657 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3658 3659 struct ec_params_switch_enable_backlight { 3660 uint8_t enabled; 3661 } __ec_align1; 3662 3663 /* Enable/disable WLAN/Bluetooth */ 3664 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3665 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 3666 3667 /* Version 0 params; no response */ 3668 struct ec_params_switch_enable_wireless_v0 { 3669 uint8_t enabled; 3670 } __ec_align1; 3671 3672 /* Version 1 params */ 3673 struct ec_params_switch_enable_wireless_v1 { 3674 /* Flags to enable now */ 3675 uint8_t now_flags; 3676 3677 /* Which flags to copy from now_flags */ 3678 uint8_t now_mask; 3679 3680 /* 3681 * Flags to leave enabled in S3, if they're on at the S0->S3 3682 * transition. (Other flags will be disabled by the S0->S3 3683 * transition.) 3684 */ 3685 uint8_t suspend_flags; 3686 3687 /* Which flags to copy from suspend_flags */ 3688 uint8_t suspend_mask; 3689 } __ec_align1; 3690 3691 /* Version 1 response */ 3692 struct ec_response_switch_enable_wireless_v1 { 3693 /* Flags to enable now */ 3694 uint8_t now_flags; 3695 3696 /* Flags to leave enabled in S3 */ 3697 uint8_t suspend_flags; 3698 } __ec_align1; 3699 3700 /*****************************************************************************/ 3701 /* GPIO commands. Only available on EC if write protect has been disabled. */ 3702 3703 /* Set GPIO output value */ 3704 #define EC_CMD_GPIO_SET 0x0092 3705 3706 struct ec_params_gpio_set { 3707 char name[32]; 3708 uint8_t val; 3709 } __ec_align1; 3710 3711 /* Get GPIO value */ 3712 #define EC_CMD_GPIO_GET 0x0093 3713 3714 /* Version 0 of input params and response */ 3715 struct ec_params_gpio_get { 3716 char name[32]; 3717 } __ec_align1; 3718 3719 struct ec_response_gpio_get { 3720 uint8_t val; 3721 } __ec_align1; 3722 3723 /* Version 1 of input params and response */ 3724 struct ec_params_gpio_get_v1 { 3725 uint8_t subcmd; 3726 union { 3727 struct __ec_align1 { 3728 char name[32]; 3729 } get_value_by_name; 3730 struct __ec_align1 { 3731 uint8_t index; 3732 } get_info; 3733 }; 3734 } __ec_align1; 3735 3736 struct ec_response_gpio_get_v1 { 3737 union { 3738 struct __ec_align1 { 3739 uint8_t val; 3740 } get_value_by_name, get_count; 3741 struct __ec_todo_unpacked { 3742 uint8_t val; 3743 char name[32]; 3744 uint32_t flags; 3745 } get_info; 3746 }; 3747 } __ec_todo_packed; 3748 3749 enum gpio_get_subcmd { 3750 EC_GPIO_GET_BY_NAME = 0, 3751 EC_GPIO_GET_COUNT = 1, 3752 EC_GPIO_GET_INFO = 2, 3753 }; 3754 3755 /*****************************************************************************/ 3756 /* I2C commands. Only available when flash write protect is unlocked. */ 3757 3758 /* 3759 * CAUTION: These commands are deprecated, and are not supported anymore in EC 3760 * builds >= 8398.0.0 (see crosbug.com/p/23570). 3761 * 3762 * Use EC_CMD_I2C_PASSTHRU instead. 3763 */ 3764 3765 /* Read I2C bus */ 3766 #define EC_CMD_I2C_READ 0x0094 3767 3768 struct ec_params_i2c_read { 3769 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3770 uint8_t read_size; /* Either 8 or 16. */ 3771 uint8_t port; 3772 uint8_t offset; 3773 } __ec_align_size1; 3774 3775 struct ec_response_i2c_read { 3776 uint16_t data; 3777 } __ec_align2; 3778 3779 /* Write I2C bus */ 3780 #define EC_CMD_I2C_WRITE 0x0095 3781 3782 struct ec_params_i2c_write { 3783 uint16_t data; 3784 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3785 uint8_t write_size; /* Either 8 or 16. */ 3786 uint8_t port; 3787 uint8_t offset; 3788 } __ec_align_size1; 3789 3790 /*****************************************************************************/ 3791 /* Charge state commands. Only available when flash write protect unlocked. */ 3792 3793 /* Force charge state machine to stop charging the battery or force it to 3794 * discharge the battery. 3795 */ 3796 #define EC_CMD_CHARGE_CONTROL 0x0096 3797 #define EC_VER_CHARGE_CONTROL 1 3798 3799 enum ec_charge_control_mode { 3800 CHARGE_CONTROL_NORMAL = 0, 3801 CHARGE_CONTROL_IDLE, 3802 CHARGE_CONTROL_DISCHARGE, 3803 }; 3804 3805 struct ec_params_charge_control { 3806 uint32_t mode; /* enum charge_control_mode */ 3807 } __ec_align4; 3808 3809 /*****************************************************************************/ 3810 3811 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 3812 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 3813 3814 /* 3815 * Read data from the saved snapshot. If the subcmd parameter is 3816 * CONSOLE_READ_NEXT, this will return data starting from the beginning of 3817 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the 3818 * end of the previous snapshot. 3819 * 3820 * The params are only looked at in version >= 1 of this command. Prior 3821 * versions will just default to CONSOLE_READ_NEXT behavior. 3822 * 3823 * Response is null-terminated string. Empty string, if there is no more 3824 * remaining output. 3825 */ 3826 #define EC_CMD_CONSOLE_READ 0x0098 3827 3828 enum ec_console_read_subcmd { 3829 CONSOLE_READ_NEXT = 0, 3830 CONSOLE_READ_RECENT 3831 }; 3832 3833 struct ec_params_console_read_v1 { 3834 uint8_t subcmd; /* enum ec_console_read_subcmd */ 3835 } __ec_align1; 3836 3837 /*****************************************************************************/ 3838 3839 /* 3840 * Cut off battery power immediately or after the host has shut down. 3841 * 3842 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. 3843 * EC_RES_SUCCESS if the command was successful. 3844 * EC_RES_ERROR if the cut off command failed. 3845 */ 3846 #define EC_CMD_BATTERY_CUT_OFF 0x0099 3847 3848 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) 3849 3850 struct ec_params_battery_cutoff { 3851 uint8_t flags; 3852 } __ec_align1; 3853 3854 /*****************************************************************************/ 3855 /* USB port mux control. */ 3856 3857 /* 3858 * Switch USB mux or return to automatic switching. 3859 */ 3860 #define EC_CMD_USB_MUX 0x009A 3861 3862 struct ec_params_usb_mux { 3863 uint8_t mux; 3864 } __ec_align1; 3865 3866 /*****************************************************************************/ 3867 /* LDOs / FETs control. */ 3868 3869 enum ec_ldo_state { 3870 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 3871 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 3872 }; 3873 3874 /* 3875 * Switch on/off a LDO. 3876 */ 3877 #define EC_CMD_LDO_SET 0x009B 3878 3879 struct ec_params_ldo_set { 3880 uint8_t index; 3881 uint8_t state; 3882 } __ec_align1; 3883 3884 /* 3885 * Get LDO state. 3886 */ 3887 #define EC_CMD_LDO_GET 0x009C 3888 3889 struct ec_params_ldo_get { 3890 uint8_t index; 3891 } __ec_align1; 3892 3893 struct ec_response_ldo_get { 3894 uint8_t state; 3895 } __ec_align1; 3896 3897 /*****************************************************************************/ 3898 /* Power info. */ 3899 3900 /* 3901 * Get power info. 3902 */ 3903 #define EC_CMD_POWER_INFO 0x009D 3904 3905 struct ec_response_power_info { 3906 uint32_t usb_dev_type; 3907 uint16_t voltage_ac; 3908 uint16_t voltage_system; 3909 uint16_t current_system; 3910 uint16_t usb_current_limit; 3911 } __ec_align4; 3912 3913 /*****************************************************************************/ 3914 /* I2C passthru command */ 3915 3916 #define EC_CMD_I2C_PASSTHRU 0x009E 3917 3918 /* Read data; if not present, message is a write */ 3919 #define EC_I2C_FLAG_READ BIT(15) 3920 3921 /* Mask for address */ 3922 #define EC_I2C_ADDR_MASK 0x3ff 3923 3924 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ 3925 #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ 3926 3927 /* Any error */ 3928 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 3929 3930 struct ec_params_i2c_passthru_msg { 3931 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 3932 uint16_t len; /* Number of bytes to read or write */ 3933 } __ec_align2; 3934 3935 struct ec_params_i2c_passthru { 3936 uint8_t port; /* I2C port number */ 3937 uint8_t num_msgs; /* Number of messages */ 3938 struct ec_params_i2c_passthru_msg msg[]; 3939 /* Data to write for all messages is concatenated here */ 3940 } __ec_align2; 3941 3942 struct ec_response_i2c_passthru { 3943 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 3944 uint8_t num_msgs; /* Number of messages processed */ 3945 uint8_t data[]; /* Data read by messages concatenated here */ 3946 } __ec_align1; 3947 3948 /*****************************************************************************/ 3949 /* Power button hang detect */ 3950 3951 #define EC_CMD_HANG_DETECT 0x009F 3952 3953 /* Reasons to start hang detection timer */ 3954 /* Power button pressed */ 3955 #define EC_HANG_START_ON_POWER_PRESS BIT(0) 3956 3957 /* Lid closed */ 3958 #define EC_HANG_START_ON_LID_CLOSE BIT(1) 3959 3960 /* Lid opened */ 3961 #define EC_HANG_START_ON_LID_OPEN BIT(2) 3962 3963 /* Start of AP S3->S0 transition (booting or resuming from suspend) */ 3964 #define EC_HANG_START_ON_RESUME BIT(3) 3965 3966 /* Reasons to cancel hang detection */ 3967 3968 /* Power button released */ 3969 #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8) 3970 3971 /* Any host command from AP received */ 3972 #define EC_HANG_STOP_ON_HOST_COMMAND BIT(9) 3973 3974 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */ 3975 #define EC_HANG_STOP_ON_SUSPEND BIT(10) 3976 3977 /* 3978 * If this flag is set, all the other fields are ignored, and the hang detect 3979 * timer is started. This provides the AP a way to start the hang timer 3980 * without reconfiguring any of the other hang detect settings. Note that 3981 * you must previously have configured the timeouts. 3982 */ 3983 #define EC_HANG_START_NOW BIT(30) 3984 3985 /* 3986 * If this flag is set, all the other fields are ignored (including 3987 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer 3988 * without reconfiguring any of the other hang detect settings. 3989 */ 3990 #define EC_HANG_STOP_NOW BIT(31) 3991 3992 struct ec_params_hang_detect { 3993 /* Flags; see EC_HANG_* */ 3994 uint32_t flags; 3995 3996 /* Timeout in msec before generating host event, if enabled */ 3997 uint16_t host_event_timeout_msec; 3998 3999 /* Timeout in msec before generating warm reboot, if enabled */ 4000 uint16_t warm_reboot_timeout_msec; 4001 } __ec_align4; 4002 4003 /*****************************************************************************/ 4004 /* Commands for battery charging */ 4005 4006 /* 4007 * This is the single catch-all host command to exchange data regarding the 4008 * charge state machine (v2 and up). 4009 */ 4010 #define EC_CMD_CHARGE_STATE 0x00A0 4011 4012 /* Subcommands for this host command */ 4013 enum charge_state_command { 4014 CHARGE_STATE_CMD_GET_STATE, 4015 CHARGE_STATE_CMD_GET_PARAM, 4016 CHARGE_STATE_CMD_SET_PARAM, 4017 CHARGE_STATE_NUM_CMDS 4018 }; 4019 4020 /* 4021 * Known param numbers are defined here. Ranges are reserved for board-specific 4022 * params, which are handled by the particular implementations. 4023 */ 4024 enum charge_state_params { 4025 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ 4026 CS_PARAM_CHG_CURRENT, /* charger current limit */ 4027 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 4028 CS_PARAM_CHG_STATUS, /* charger-specific status */ 4029 CS_PARAM_CHG_OPTION, /* charger-specific options */ 4030 CS_PARAM_LIMIT_POWER, /* 4031 * Check if power is limited due to 4032 * low battery and / or a weak external 4033 * charger. READ ONLY. 4034 */ 4035 /* How many so far? */ 4036 CS_NUM_BASE_PARAMS, 4037 4038 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ 4039 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 4040 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 4041 4042 /* Range for CONFIG_CHARGE_STATE_DEBUG params */ 4043 CS_PARAM_DEBUG_MIN = 0x20000, 4044 CS_PARAM_DEBUG_CTL_MODE = 0x20000, 4045 CS_PARAM_DEBUG_MANUAL_MODE, 4046 CS_PARAM_DEBUG_SEEMS_DEAD, 4047 CS_PARAM_DEBUG_SEEMS_DISCONNECTED, 4048 CS_PARAM_DEBUG_BATT_REMOVED, 4049 CS_PARAM_DEBUG_MANUAL_CURRENT, 4050 CS_PARAM_DEBUG_MANUAL_VOLTAGE, 4051 CS_PARAM_DEBUG_MAX = 0x2ffff, 4052 4053 /* Other custom param ranges go here... */ 4054 }; 4055 4056 struct ec_params_charge_state { 4057 uint8_t cmd; /* enum charge_state_command */ 4058 union { 4059 /* get_state has no args */ 4060 4061 struct __ec_todo_unpacked { 4062 uint32_t param; /* enum charge_state_param */ 4063 } get_param; 4064 4065 struct __ec_todo_unpacked { 4066 uint32_t param; /* param to set */ 4067 uint32_t value; /* value to set */ 4068 } set_param; 4069 }; 4070 } __ec_todo_packed; 4071 4072 struct ec_response_charge_state { 4073 union { 4074 struct __ec_align4 { 4075 int ac; 4076 int chg_voltage; 4077 int chg_current; 4078 int chg_input_current; 4079 int batt_state_of_charge; 4080 } get_state; 4081 4082 struct __ec_align4 { 4083 uint32_t value; 4084 } get_param; 4085 4086 /* set_param returns no args */ 4087 }; 4088 } __ec_align4; 4089 4090 4091 /* 4092 * Set maximum battery charging current. 4093 */ 4094 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 4095 4096 struct ec_params_current_limit { 4097 uint32_t limit; /* in mA */ 4098 } __ec_align4; 4099 4100 /* 4101 * Set maximum external voltage / current. 4102 */ 4103 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 4104 4105 /* Command v0 is used only on Spring and is obsolete + unsupported */ 4106 struct ec_params_external_power_limit_v1 { 4107 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 4108 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 4109 } __ec_align2; 4110 4111 #define EC_POWER_LIMIT_NONE 0xffff 4112 4113 /* 4114 * Set maximum voltage & current of a dedicated charge port 4115 */ 4116 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 4117 4118 struct ec_params_dedicated_charger_limit { 4119 uint16_t current_lim; /* in mA */ 4120 uint16_t voltage_lim; /* in mV */ 4121 } __ec_align2; 4122 4123 /*****************************************************************************/ 4124 /* Hibernate/Deep Sleep Commands */ 4125 4126 /* Set the delay before going into hibernation. */ 4127 #define EC_CMD_HIBERNATION_DELAY 0x00A8 4128 4129 struct ec_params_hibernation_delay { 4130 /* 4131 * Seconds to wait in G3 before hibernate. Pass in 0 to read the 4132 * current settings without changing them. 4133 */ 4134 uint32_t seconds; 4135 } __ec_align4; 4136 4137 struct ec_response_hibernation_delay { 4138 /* 4139 * The current time in seconds in which the system has been in the G3 4140 * state. This value is reset if the EC transitions out of G3. 4141 */ 4142 uint32_t time_g3; 4143 4144 /* 4145 * The current time remaining in seconds until the EC should hibernate. 4146 * This value is also reset if the EC transitions out of G3. 4147 */ 4148 uint32_t time_remaining; 4149 4150 /* 4151 * The current time in seconds that the EC should wait in G3 before 4152 * hibernating. 4153 */ 4154 uint32_t hibernate_delay; 4155 } __ec_align4; 4156 4157 /* Inform the EC when entering a sleep state */ 4158 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 4159 4160 enum host_sleep_event { 4161 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 4162 HOST_SLEEP_EVENT_S3_RESUME = 2, 4163 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 4164 HOST_SLEEP_EVENT_S0IX_RESUME = 4, 4165 /* S3 suspend with additional enabled wake sources */ 4166 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, 4167 }; 4168 4169 struct ec_params_host_sleep_event { 4170 uint8_t sleep_event; 4171 } __ec_align1; 4172 4173 /* 4174 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep 4175 * transition failures 4176 */ 4177 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 4178 4179 /* Disable timeout detection for this sleep transition */ 4180 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF 4181 4182 struct ec_params_host_sleep_event_v1 { 4183 /* The type of sleep being entered or exited. */ 4184 uint8_t sleep_event; 4185 4186 /* Padding */ 4187 uint8_t reserved; 4188 union { 4189 /* Parameters that apply for suspend messages. */ 4190 struct { 4191 /* 4192 * The timeout in milliseconds between when this message 4193 * is received and when the EC will declare sleep 4194 * transition failure if the sleep signal is not 4195 * asserted. 4196 */ 4197 uint16_t sleep_timeout_ms; 4198 } suspend_params; 4199 4200 /* No parameters for non-suspend messages. */ 4201 }; 4202 } __ec_align2; 4203 4204 /* A timeout occurred when this bit is set */ 4205 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 4206 4207 /* 4208 * The mask defining which bits correspond to the number of sleep transitions, 4209 * as well as the maximum number of suspend line transitions that will be 4210 * reported back to the host. 4211 */ 4212 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF 4213 4214 struct ec_response_host_sleep_event_v1 { 4215 union { 4216 /* Response fields that apply for resume messages. */ 4217 struct { 4218 /* 4219 * The number of sleep power signal transitions that 4220 * occurred since the suspend message. The high bit 4221 * indicates a timeout occurred. 4222 */ 4223 uint32_t sleep_transitions; 4224 } resume_response; 4225 4226 /* No response fields for non-resume messages. */ 4227 }; 4228 } __ec_align4; 4229 4230 /*****************************************************************************/ 4231 /* Device events */ 4232 #define EC_CMD_DEVICE_EVENT 0x00AA 4233 4234 enum ec_device_event { 4235 EC_DEVICE_EVENT_TRACKPAD, 4236 EC_DEVICE_EVENT_DSP, 4237 EC_DEVICE_EVENT_WIFI, 4238 EC_DEVICE_EVENT_WLC, 4239 }; 4240 4241 enum ec_device_event_param { 4242 /* Get and clear pending device events */ 4243 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 4244 /* Get device event mask */ 4245 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 4246 /* Set device event mask */ 4247 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 4248 }; 4249 4250 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) 4251 4252 struct ec_params_device_event { 4253 uint32_t event_mask; 4254 uint8_t param; 4255 } __ec_align_size1; 4256 4257 struct ec_response_device_event { 4258 uint32_t event_mask; 4259 } __ec_align4; 4260 4261 /*****************************************************************************/ 4262 /* Smart battery pass-through */ 4263 4264 /* Get / Set 16-bit smart battery registers */ 4265 #define EC_CMD_SB_READ_WORD 0x00B0 4266 #define EC_CMD_SB_WRITE_WORD 0x00B1 4267 4268 /* Get / Set string smart battery parameters 4269 * formatted as SMBUS "block". 4270 */ 4271 #define EC_CMD_SB_READ_BLOCK 0x00B2 4272 #define EC_CMD_SB_WRITE_BLOCK 0x00B3 4273 4274 struct ec_params_sb_rd { 4275 uint8_t reg; 4276 } __ec_align1; 4277 4278 struct ec_response_sb_rd_word { 4279 uint16_t value; 4280 } __ec_align2; 4281 4282 struct ec_params_sb_wr_word { 4283 uint8_t reg; 4284 uint16_t value; 4285 } __ec_align1; 4286 4287 struct ec_response_sb_rd_block { 4288 uint8_t data[32]; 4289 } __ec_align1; 4290 4291 struct ec_params_sb_wr_block { 4292 uint8_t reg; 4293 uint16_t data[32]; 4294 } __ec_align1; 4295 4296 /*****************************************************************************/ 4297 /* Battery vendor parameters 4298 * 4299 * Get or set vendor-specific parameters in the battery. Implementations may 4300 * differ between boards or batteries. On a set operation, the response 4301 * contains the actual value set, which may be rounded or clipped from the 4302 * requested value. 4303 */ 4304 4305 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 4306 4307 enum ec_battery_vendor_param_mode { 4308 BATTERY_VENDOR_PARAM_MODE_GET = 0, 4309 BATTERY_VENDOR_PARAM_MODE_SET, 4310 }; 4311 4312 struct ec_params_battery_vendor_param { 4313 uint32_t param; 4314 uint32_t value; 4315 uint8_t mode; 4316 } __ec_align_size1; 4317 4318 struct ec_response_battery_vendor_param { 4319 uint32_t value; 4320 } __ec_align4; 4321 4322 /*****************************************************************************/ 4323 /* 4324 * Smart Battery Firmware Update Commands 4325 */ 4326 #define EC_CMD_SB_FW_UPDATE 0x00B5 4327 4328 enum ec_sb_fw_update_subcmd { 4329 EC_SB_FW_UPDATE_PREPARE = 0x0, 4330 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 4331 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 4332 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 4333 EC_SB_FW_UPDATE_END = 0x4, 4334 EC_SB_FW_UPDATE_STATUS = 0x5, 4335 EC_SB_FW_UPDATE_PROTECT = 0x6, 4336 EC_SB_FW_UPDATE_MAX = 0x7, 4337 }; 4338 4339 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 4340 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 4341 #define SB_FW_UPDATE_CMD_INFO_SIZE 8 4342 4343 struct ec_sb_fw_update_header { 4344 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 4345 uint16_t fw_id; /* firmware id */ 4346 } __ec_align4; 4347 4348 struct ec_params_sb_fw_update { 4349 struct ec_sb_fw_update_header hdr; 4350 union { 4351 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 4352 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4353 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 4354 /* EC_SB_FW_UPDATE_END = 0x4 */ 4355 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4356 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 4357 /* Those have no args */ 4358 4359 /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 4360 struct __ec_align4 { 4361 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 4362 } write; 4363 }; 4364 } __ec_align4; 4365 4366 struct ec_response_sb_fw_update { 4367 union { 4368 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4369 struct __ec_align1 { 4370 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 4371 } info; 4372 4373 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4374 struct __ec_align1 { 4375 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 4376 } status; 4377 }; 4378 } __ec_align1; 4379 4380 /* 4381 * Entering Verified Boot Mode Command 4382 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 4383 * Valid Modes are: normal, developer, and recovery. 4384 */ 4385 #define EC_CMD_ENTERING_MODE 0x00B6 4386 4387 struct ec_params_entering_mode { 4388 int vboot_mode; 4389 } __ec_align4; 4390 4391 #define VBOOT_MODE_NORMAL 0 4392 #define VBOOT_MODE_DEVELOPER 1 4393 #define VBOOT_MODE_RECOVERY 2 4394 4395 /*****************************************************************************/ 4396 /* 4397 * I2C passthru protection command: Protects I2C tunnels against access on 4398 * certain addresses (board-specific). 4399 */ 4400 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 4401 4402 enum ec_i2c_passthru_protect_subcmd { 4403 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 4404 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 4405 }; 4406 4407 struct ec_params_i2c_passthru_protect { 4408 uint8_t subcmd; 4409 uint8_t port; /* I2C port number */ 4410 } __ec_align1; 4411 4412 struct ec_response_i2c_passthru_protect { 4413 uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 4414 } __ec_align1; 4415 4416 4417 /*****************************************************************************/ 4418 /* 4419 * HDMI CEC commands 4420 * 4421 * These commands are for sending and receiving message via HDMI CEC 4422 */ 4423 4424 #define MAX_CEC_MSG_LEN 16 4425 4426 /* CEC message from the AP to be written on the CEC bus */ 4427 #define EC_CMD_CEC_WRITE_MSG 0x00B8 4428 4429 /** 4430 * struct ec_params_cec_write - Message to write to the CEC bus 4431 * @msg: message content to write to the CEC bus 4432 */ 4433 struct ec_params_cec_write { 4434 uint8_t msg[MAX_CEC_MSG_LEN]; 4435 } __ec_align1; 4436 4437 /* Set various CEC parameters */ 4438 #define EC_CMD_CEC_SET 0x00BA 4439 4440 /** 4441 * struct ec_params_cec_set - CEC parameters set 4442 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4443 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC 4444 * or 1 to enable CEC functionality, in case cmd is 4445 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical 4446 * address between 0 and 15 or 0xff to unregister 4447 */ 4448 struct ec_params_cec_set { 4449 uint8_t cmd; /* enum cec_command */ 4450 uint8_t val; 4451 } __ec_align1; 4452 4453 /* Read various CEC parameters */ 4454 #define EC_CMD_CEC_GET 0x00BB 4455 4456 /** 4457 * struct ec_params_cec_get - CEC parameters get 4458 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4459 */ 4460 struct ec_params_cec_get { 4461 uint8_t cmd; /* enum cec_command */ 4462 } __ec_align1; 4463 4464 /** 4465 * struct ec_response_cec_get - CEC parameters get response 4466 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is 4467 * disabled or 1 if CEC functionality is enabled, 4468 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the 4469 * configured logical address between 0 and 15 or 0xff if unregistered 4470 */ 4471 struct ec_response_cec_get { 4472 uint8_t val; 4473 } __ec_align1; 4474 4475 /* CEC parameters command */ 4476 enum cec_command { 4477 /* CEC reading, writing and events enable */ 4478 CEC_CMD_ENABLE, 4479 /* CEC logical address */ 4480 CEC_CMD_LOGICAL_ADDRESS, 4481 }; 4482 4483 /* Events from CEC to AP */ 4484 enum mkbp_cec_event { 4485 /* Outgoing message was acknowledged by a follower */ 4486 EC_MKBP_CEC_SEND_OK = BIT(0), 4487 /* Outgoing message was not acknowledged */ 4488 EC_MKBP_CEC_SEND_FAILED = BIT(1), 4489 }; 4490 4491 /*****************************************************************************/ 4492 4493 /* Commands for audio codec. */ 4494 #define EC_CMD_EC_CODEC 0x00BC 4495 4496 enum ec_codec_subcmd { 4497 EC_CODEC_GET_CAPABILITIES = 0x0, 4498 EC_CODEC_GET_SHM_ADDR = 0x1, 4499 EC_CODEC_SET_SHM_ADDR = 0x2, 4500 EC_CODEC_SUBCMD_COUNT, 4501 }; 4502 4503 enum ec_codec_cap { 4504 EC_CODEC_CAP_WOV_AUDIO_SHM = 0, 4505 EC_CODEC_CAP_WOV_LANG_SHM = 1, 4506 EC_CODEC_CAP_LAST = 32, 4507 }; 4508 4509 enum ec_codec_shm_id { 4510 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0, 4511 EC_CODEC_SHM_ID_WOV_LANG = 0x1, 4512 EC_CODEC_SHM_ID_LAST, 4513 }; 4514 4515 enum ec_codec_shm_type { 4516 EC_CODEC_SHM_TYPE_EC_RAM = 0x0, 4517 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1, 4518 }; 4519 4520 struct __ec_align1 ec_param_ec_codec_get_shm_addr { 4521 uint8_t shm_id; 4522 uint8_t reserved[3]; 4523 }; 4524 4525 struct __ec_align4 ec_param_ec_codec_set_shm_addr { 4526 uint64_t phys_addr; 4527 uint32_t len; 4528 uint8_t shm_id; 4529 uint8_t reserved[3]; 4530 }; 4531 4532 struct __ec_align4 ec_param_ec_codec { 4533 uint8_t cmd; /* enum ec_codec_subcmd */ 4534 uint8_t reserved[3]; 4535 4536 union { 4537 struct ec_param_ec_codec_get_shm_addr 4538 get_shm_addr_param; 4539 struct ec_param_ec_codec_set_shm_addr 4540 set_shm_addr_param; 4541 }; 4542 }; 4543 4544 struct __ec_align4 ec_response_ec_codec_get_capabilities { 4545 uint32_t capabilities; 4546 }; 4547 4548 struct __ec_align4 ec_response_ec_codec_get_shm_addr { 4549 uint64_t phys_addr; 4550 uint32_t len; 4551 uint8_t type; 4552 uint8_t reserved[3]; 4553 }; 4554 4555 /*****************************************************************************/ 4556 4557 /* Commands for DMIC on audio codec. */ 4558 #define EC_CMD_EC_CODEC_DMIC 0x00BD 4559 4560 enum ec_codec_dmic_subcmd { 4561 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0, 4562 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1, 4563 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2, 4564 EC_CODEC_DMIC_SUBCMD_COUNT, 4565 }; 4566 4567 enum ec_codec_dmic_channel { 4568 EC_CODEC_DMIC_CHANNEL_0 = 0x0, 4569 EC_CODEC_DMIC_CHANNEL_1 = 0x1, 4570 EC_CODEC_DMIC_CHANNEL_2 = 0x2, 4571 EC_CODEC_DMIC_CHANNEL_3 = 0x3, 4572 EC_CODEC_DMIC_CHANNEL_4 = 0x4, 4573 EC_CODEC_DMIC_CHANNEL_5 = 0x5, 4574 EC_CODEC_DMIC_CHANNEL_6 = 0x6, 4575 EC_CODEC_DMIC_CHANNEL_7 = 0x7, 4576 EC_CODEC_DMIC_CHANNEL_COUNT, 4577 }; 4578 4579 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx { 4580 uint8_t channel; /* enum ec_codec_dmic_channel */ 4581 uint8_t gain; 4582 uint8_t reserved[2]; 4583 }; 4584 4585 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx { 4586 uint8_t channel; /* enum ec_codec_dmic_channel */ 4587 uint8_t reserved[3]; 4588 }; 4589 4590 struct __ec_align4 ec_param_ec_codec_dmic { 4591 uint8_t cmd; /* enum ec_codec_dmic_subcmd */ 4592 uint8_t reserved[3]; 4593 4594 union { 4595 struct ec_param_ec_codec_dmic_set_gain_idx 4596 set_gain_idx_param; 4597 struct ec_param_ec_codec_dmic_get_gain_idx 4598 get_gain_idx_param; 4599 }; 4600 }; 4601 4602 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain { 4603 uint8_t max_gain; 4604 }; 4605 4606 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx { 4607 uint8_t gain; 4608 }; 4609 4610 /*****************************************************************************/ 4611 4612 /* Commands for I2S RX on audio codec. */ 4613 4614 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE 4615 4616 enum ec_codec_i2s_rx_subcmd { 4617 EC_CODEC_I2S_RX_ENABLE = 0x0, 4618 EC_CODEC_I2S_RX_DISABLE = 0x1, 4619 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2, 4620 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3, 4621 EC_CODEC_I2S_RX_SET_BCLK = 0x4, 4622 EC_CODEC_I2S_RX_RESET = 0x5, 4623 EC_CODEC_I2S_RX_SUBCMD_COUNT, 4624 }; 4625 4626 enum ec_codec_i2s_rx_sample_depth { 4627 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0, 4628 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1, 4629 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT, 4630 }; 4631 4632 enum ec_codec_i2s_rx_daifmt { 4633 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0, 4634 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1, 4635 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2, 4636 EC_CODEC_I2S_RX_DAIFMT_COUNT, 4637 }; 4638 4639 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth { 4640 uint8_t depth; 4641 uint8_t reserved[3]; 4642 }; 4643 4644 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain { 4645 uint8_t left; 4646 uint8_t right; 4647 uint8_t reserved[2]; 4648 }; 4649 4650 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt { 4651 uint8_t daifmt; 4652 uint8_t reserved[3]; 4653 }; 4654 4655 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk { 4656 uint32_t bclk; 4657 }; 4658 4659 struct __ec_align4 ec_param_ec_codec_i2s_rx { 4660 uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */ 4661 uint8_t reserved[3]; 4662 4663 union { 4664 struct ec_param_ec_codec_i2s_rx_set_sample_depth 4665 set_sample_depth_param; 4666 struct ec_param_ec_codec_i2s_rx_set_daifmt 4667 set_daifmt_param; 4668 struct ec_param_ec_codec_i2s_rx_set_bclk 4669 set_bclk_param; 4670 }; 4671 }; 4672 4673 /*****************************************************************************/ 4674 /* Commands for WoV on audio codec. */ 4675 4676 #define EC_CMD_EC_CODEC_WOV 0x00BF 4677 4678 enum ec_codec_wov_subcmd { 4679 EC_CODEC_WOV_SET_LANG = 0x0, 4680 EC_CODEC_WOV_SET_LANG_SHM = 0x1, 4681 EC_CODEC_WOV_GET_LANG = 0x2, 4682 EC_CODEC_WOV_ENABLE = 0x3, 4683 EC_CODEC_WOV_DISABLE = 0x4, 4684 EC_CODEC_WOV_READ_AUDIO = 0x5, 4685 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6, 4686 EC_CODEC_WOV_SUBCMD_COUNT, 4687 }; 4688 4689 /* 4690 * @hash is SHA256 of the whole language model. 4691 * @total_len indicates the length of whole language model. 4692 * @offset is the cursor from the beginning of the model. 4693 * @buf is the packet buffer. 4694 * @len denotes how many bytes in the buf. 4695 */ 4696 struct __ec_align4 ec_param_ec_codec_wov_set_lang { 4697 uint8_t hash[32]; 4698 uint32_t total_len; 4699 uint32_t offset; 4700 uint8_t buf[128]; 4701 uint32_t len; 4702 }; 4703 4704 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm { 4705 uint8_t hash[32]; 4706 uint32_t total_len; 4707 }; 4708 4709 struct __ec_align4 ec_param_ec_codec_wov { 4710 uint8_t cmd; /* enum ec_codec_wov_subcmd */ 4711 uint8_t reserved[3]; 4712 4713 union { 4714 struct ec_param_ec_codec_wov_set_lang 4715 set_lang_param; 4716 struct ec_param_ec_codec_wov_set_lang_shm 4717 set_lang_shm_param; 4718 }; 4719 }; 4720 4721 struct __ec_align4 ec_response_ec_codec_wov_get_lang { 4722 uint8_t hash[32]; 4723 }; 4724 4725 struct __ec_align4 ec_response_ec_codec_wov_read_audio { 4726 uint8_t buf[128]; 4727 uint32_t len; 4728 }; 4729 4730 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm { 4731 uint32_t offset; 4732 uint32_t len; 4733 }; 4734 4735 /*****************************************************************************/ 4736 /* System commands */ 4737 4738 /* 4739 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 4740 * necessarily reboot the EC. Rename to "image" or something similar? 4741 */ 4742 #define EC_CMD_REBOOT_EC 0x00D2 4743 4744 /* Command */ 4745 enum ec_reboot_cmd { 4746 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 4747 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 4748 EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ 4749 /* (command 3 was jump to RW-B) */ 4750 EC_REBOOT_COLD = 4, /* Cold-reboot */ 4751 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 4752 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 4753 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 4754 EC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */ 4755 }; 4756 4757 /* Flags for ec_params_reboot_ec.reboot_flags */ 4758 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ 4759 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ 4760 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ 4761 4762 struct ec_params_reboot_ec { 4763 uint8_t cmd; /* enum ec_reboot_cmd */ 4764 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 4765 } __ec_align1; 4766 4767 /* 4768 * Get information on last EC panic. 4769 * 4770 * Returns variable-length platform-dependent panic information. See panic.h 4771 * for details. 4772 */ 4773 #define EC_CMD_GET_PANIC_INFO 0x00D3 4774 4775 /*****************************************************************************/ 4776 /* 4777 * Special commands 4778 * 4779 * These do not follow the normal rules for commands. See each command for 4780 * details. 4781 */ 4782 4783 /* 4784 * Reboot NOW 4785 * 4786 * This command will work even when the EC LPC interface is busy, because the 4787 * reboot command is processed at interrupt level. Note that when the EC 4788 * reboots, the host will reboot too, so there is no response to this command. 4789 * 4790 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 4791 */ 4792 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 4793 4794 /* 4795 * Resend last response (not supported on LPC). 4796 * 4797 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 4798 * there was no previous command, or the previous command's response was too 4799 * big to save. 4800 */ 4801 #define EC_CMD_RESEND_RESPONSE 0x00DB 4802 4803 /* 4804 * This header byte on a command indicate version 0. Any header byte less 4805 * than this means that we are talking to an old EC which doesn't support 4806 * versioning. In that case, we assume version 0. 4807 * 4808 * Header bytes greater than this indicate a later version. For example, 4809 * EC_CMD_VERSION0 + 1 means we are using version 1. 4810 * 4811 * The old EC interface must not use commands 0xdc or higher. 4812 */ 4813 #define EC_CMD_VERSION0 0x00DC 4814 4815 /*****************************************************************************/ 4816 /* 4817 * PD commands 4818 * 4819 * These commands are for PD MCU communication. 4820 */ 4821 4822 /* EC to PD MCU exchange status command */ 4823 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 4824 #define EC_VER_PD_EXCHANGE_STATUS 2 4825 4826 enum pd_charge_state { 4827 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 4828 PD_CHARGE_NONE, /* No charging allowed */ 4829 PD_CHARGE_5V, /* 5V charging only */ 4830 PD_CHARGE_MAX /* Charge at max voltage */ 4831 }; 4832 4833 /* Status of EC being sent to PD */ 4834 #define EC_STATUS_HIBERNATING BIT(0) 4835 4836 struct ec_params_pd_status { 4837 uint8_t status; /* EC status */ 4838 int8_t batt_soc; /* battery state of charge */ 4839 uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 4840 } __ec_align1; 4841 4842 /* Status of PD being sent back to EC */ 4843 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ 4844 #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ 4845 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ 4846 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ 4847 #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ 4848 #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ 4849 #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ 4850 #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 4851 PD_STATUS_TCPC_ALERT_1 | \ 4852 PD_STATUS_HOST_EVENT) 4853 struct ec_response_pd_status { 4854 uint32_t curr_lim_ma; /* input current limit */ 4855 uint16_t status; /* PD MCU status */ 4856 int8_t active_charge_port; /* active charging port */ 4857 } __ec_align_size1; 4858 4859 /* AP to PD MCU host event status command, cleared on read */ 4860 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 4861 4862 /* PD MCU host event status bits */ 4863 #define PD_EVENT_UPDATE_DEVICE BIT(0) 4864 #define PD_EVENT_POWER_CHANGE BIT(1) 4865 #define PD_EVENT_IDENTITY_RECEIVED BIT(2) 4866 #define PD_EVENT_DATA_SWAP BIT(3) 4867 struct ec_response_host_event_status { 4868 uint32_t status; /* PD MCU host event status */ 4869 } __ec_align4; 4870 4871 /* Set USB type-C port role and muxes */ 4872 #define EC_CMD_USB_PD_CONTROL 0x0101 4873 4874 enum usb_pd_control_role { 4875 USB_PD_CTRL_ROLE_NO_CHANGE = 0, 4876 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ 4877 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 4878 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 4879 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 4880 USB_PD_CTRL_ROLE_FREEZE = 5, 4881 USB_PD_CTRL_ROLE_COUNT 4882 }; 4883 4884 enum usb_pd_control_mux { 4885 USB_PD_CTRL_MUX_NO_CHANGE = 0, 4886 USB_PD_CTRL_MUX_NONE = 1, 4887 USB_PD_CTRL_MUX_USB = 2, 4888 USB_PD_CTRL_MUX_DP = 3, 4889 USB_PD_CTRL_MUX_DOCK = 4, 4890 USB_PD_CTRL_MUX_AUTO = 5, 4891 USB_PD_CTRL_MUX_COUNT 4892 }; 4893 4894 enum usb_pd_control_swap { 4895 USB_PD_CTRL_SWAP_NONE = 0, 4896 USB_PD_CTRL_SWAP_DATA = 1, 4897 USB_PD_CTRL_SWAP_POWER = 2, 4898 USB_PD_CTRL_SWAP_VCONN = 3, 4899 USB_PD_CTRL_SWAP_COUNT 4900 }; 4901 4902 struct ec_params_usb_pd_control { 4903 uint8_t port; 4904 uint8_t role; 4905 uint8_t mux; 4906 uint8_t swap; 4907 } __ec_align1; 4908 4909 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ 4910 #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ 4911 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ 4912 4913 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ 4914 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ 4915 #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ 4916 #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ 4917 #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ 4918 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ 4919 #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ 4920 4921 struct ec_response_usb_pd_control { 4922 uint8_t enabled; 4923 uint8_t role; 4924 uint8_t polarity; 4925 uint8_t state; 4926 } __ec_align1; 4927 4928 struct ec_response_usb_pd_control_v1 { 4929 uint8_t enabled; 4930 uint8_t role; 4931 uint8_t polarity; 4932 char state[32]; 4933 } __ec_align1; 4934 4935 /* Values representing usbc PD CC state */ 4936 #define USBC_PD_CC_NONE 0 /* No accessory connected */ 4937 #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ 4938 #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ 4939 #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ 4940 #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ 4941 #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ 4942 4943 /* Active/Passive Cable */ 4944 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0) 4945 /* Optical/Non-optical cable */ 4946 #define USB_PD_CTRL_OPTICAL_CABLE BIT(1) 4947 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */ 4948 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2) 4949 /* Active Link Uni-Direction */ 4950 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3) 4951 4952 struct ec_response_usb_pd_control_v2 { 4953 uint8_t enabled; 4954 uint8_t role; 4955 uint8_t polarity; 4956 char state[32]; 4957 uint8_t cc_state; /* enum pd_cc_states representing cc state */ 4958 uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ 4959 uint8_t reserved; /* Reserved for future use */ 4960 uint8_t control_flags; /* USB_PD_CTRL_*flags */ 4961 uint8_t cable_speed; /* TBT_SS_* cable speed */ 4962 uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */ 4963 } __ec_align1; 4964 4965 #define EC_CMD_USB_PD_PORTS 0x0102 4966 4967 /* Maximum number of PD ports on a device, num_ports will be <= this */ 4968 #define EC_USB_PD_MAX_PORTS 8 4969 4970 struct ec_response_usb_pd_ports { 4971 uint8_t num_ports; 4972 } __ec_align1; 4973 4974 #define EC_CMD_USB_PD_POWER_INFO 0x0103 4975 4976 #define PD_POWER_CHARGING_PORT 0xff 4977 struct ec_params_usb_pd_power_info { 4978 uint8_t port; 4979 } __ec_align1; 4980 4981 enum usb_chg_type { 4982 USB_CHG_TYPE_NONE, 4983 USB_CHG_TYPE_PD, 4984 USB_CHG_TYPE_C, 4985 USB_CHG_TYPE_PROPRIETARY, 4986 USB_CHG_TYPE_BC12_DCP, 4987 USB_CHG_TYPE_BC12_CDP, 4988 USB_CHG_TYPE_BC12_SDP, 4989 USB_CHG_TYPE_OTHER, 4990 USB_CHG_TYPE_VBUS, 4991 USB_CHG_TYPE_UNKNOWN, 4992 USB_CHG_TYPE_DEDICATED, 4993 }; 4994 enum usb_power_roles { 4995 USB_PD_PORT_POWER_DISCONNECTED, 4996 USB_PD_PORT_POWER_SOURCE, 4997 USB_PD_PORT_POWER_SINK, 4998 USB_PD_PORT_POWER_SINK_NOT_CHARGING, 4999 }; 5000 5001 struct usb_chg_measures { 5002 uint16_t voltage_max; 5003 uint16_t voltage_now; 5004 uint16_t current_max; 5005 uint16_t current_lim; 5006 } __ec_align2; 5007 5008 struct ec_response_usb_pd_power_info { 5009 uint8_t role; 5010 uint8_t type; 5011 uint8_t dualrole; 5012 uint8_t reserved1; 5013 struct usb_chg_measures meas; 5014 uint32_t max_power; 5015 } __ec_align4; 5016 5017 5018 /* 5019 * This command will return the number of USB PD charge port + the number 5020 * of dedicated port present. 5021 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports 5022 */ 5023 #define EC_CMD_CHARGE_PORT_COUNT 0x0105 5024 struct ec_response_charge_port_count { 5025 uint8_t port_count; 5026 } __ec_align1; 5027 5028 /* Write USB-PD device FW */ 5029 #define EC_CMD_USB_PD_FW_UPDATE 0x0110 5030 5031 enum usb_pd_fw_update_cmds { 5032 USB_PD_FW_REBOOT, 5033 USB_PD_FW_FLASH_ERASE, 5034 USB_PD_FW_FLASH_WRITE, 5035 USB_PD_FW_ERASE_SIG, 5036 }; 5037 5038 struct ec_params_usb_pd_fw_update { 5039 uint16_t dev_id; 5040 uint8_t cmd; 5041 uint8_t port; 5042 uint32_t size; /* Size to write in bytes */ 5043 /* Followed by data to write */ 5044 } __ec_align4; 5045 5046 /* Write USB-PD Accessory RW_HASH table entry */ 5047 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 5048 /* RW hash is first 20 bytes of SHA-256 of RW section */ 5049 #define PD_RW_HASH_SIZE 20 5050 struct ec_params_usb_pd_rw_hash_entry { 5051 uint16_t dev_id; 5052 uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 5053 uint8_t reserved; /* 5054 * For alignment of current_image 5055 * TODO(rspangler) but it's not aligned! 5056 * Should have been reserved[2]. 5057 */ 5058 uint32_t current_image; /* One of ec_current_image */ 5059 } __ec_align1; 5060 5061 /* Read USB-PD Accessory info */ 5062 #define EC_CMD_USB_PD_DEV_INFO 0x0112 5063 5064 struct ec_params_usb_pd_info_request { 5065 uint8_t port; 5066 } __ec_align1; 5067 5068 /* Read USB-PD Device discovery info */ 5069 #define EC_CMD_USB_PD_DISCOVERY 0x0113 5070 struct ec_params_usb_pd_discovery_entry { 5071 uint16_t vid; /* USB-IF VID */ 5072 uint16_t pid; /* USB-IF PID */ 5073 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 5074 } __ec_align_size1; 5075 5076 /* Override default charge behavior */ 5077 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 5078 5079 /* Negative port parameters have special meaning */ 5080 enum usb_pd_override_ports { 5081 OVERRIDE_DONT_CHARGE = -2, 5082 OVERRIDE_OFF = -1, 5083 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ 5084 }; 5085 5086 struct ec_params_charge_port_override { 5087 int16_t override_port; /* Override port# */ 5088 } __ec_align2; 5089 5090 /* 5091 * Read (and delete) one entry of PD event log. 5092 * TODO(crbug.com/751742): Make this host command more generic to accommodate 5093 * future non-PD logs that use the same internal EC event_log. 5094 */ 5095 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 5096 5097 struct ec_response_pd_log { 5098 uint32_t timestamp; /* relative timestamp in milliseconds */ 5099 uint8_t type; /* event type : see PD_EVENT_xx below */ 5100 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 5101 uint16_t data; /* type-defined data payload */ 5102 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */ 5103 } __ec_align4; 5104 5105 /* The timestamp is the microsecond counter shifted to get about a ms. */ 5106 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ 5107 5108 #define PD_LOG_SIZE_MASK 0x1f 5109 #define PD_LOG_PORT_MASK 0xe0 5110 #define PD_LOG_PORT_SHIFT 5 5111 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ 5112 ((size) & PD_LOG_SIZE_MASK)) 5113 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) 5114 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) 5115 5116 /* PD event log : entry types */ 5117 /* PD MCU events */ 5118 #define PD_EVENT_MCU_BASE 0x00 5119 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) 5120 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) 5121 /* Reserved for custom board event */ 5122 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) 5123 /* PD generic accessory events */ 5124 #define PD_EVENT_ACC_BASE 0x20 5125 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) 5126 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) 5127 /* PD power supply events */ 5128 #define PD_EVENT_PS_BASE 0x40 5129 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) 5130 /* PD video dongles events */ 5131 #define PD_EVENT_VIDEO_BASE 0x60 5132 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) 5133 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) 5134 /* Returned in the "type" field, when there is no entry available */ 5135 #define PD_EVENT_NO_ENTRY 0xff 5136 5137 /* 5138 * PD_EVENT_MCU_CHARGE event definition : 5139 * the payload is "struct usb_chg_measures" 5140 * the data field contains the port state flags as defined below : 5141 */ 5142 /* Port partner is a dual role device */ 5143 #define CHARGE_FLAGS_DUAL_ROLE BIT(15) 5144 /* Port is the pending override port */ 5145 #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) 5146 /* Port is the override port */ 5147 #define CHARGE_FLAGS_OVERRIDE BIT(13) 5148 /* Charger type */ 5149 #define CHARGE_FLAGS_TYPE_SHIFT 3 5150 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) 5151 /* Power delivery role */ 5152 #define CHARGE_FLAGS_ROLE_MASK (7 << 0) 5153 5154 /* 5155 * PD_EVENT_PS_FAULT data field flags definition : 5156 */ 5157 #define PS_FAULT_OCP 1 5158 #define PS_FAULT_FAST_OCP 2 5159 #define PS_FAULT_OVP 3 5160 #define PS_FAULT_DISCH 4 5161 5162 /* 5163 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". 5164 */ 5165 struct mcdp_version { 5166 uint8_t major; 5167 uint8_t minor; 5168 uint16_t build; 5169 } __ec_align4; 5170 5171 struct mcdp_info { 5172 uint8_t family[2]; 5173 uint8_t chipid[2]; 5174 struct mcdp_version irom; 5175 struct mcdp_version fw; 5176 } __ec_align4; 5177 5178 /* struct mcdp_info field decoding */ 5179 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 5180 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 5181 5182 /* Get/Set USB-PD Alternate mode info */ 5183 #define EC_CMD_USB_PD_GET_AMODE 0x0116 5184 struct ec_params_usb_pd_get_mode_request { 5185 uint16_t svid_idx; /* SVID index to get */ 5186 uint8_t port; /* port */ 5187 } __ec_align_size1; 5188 5189 struct ec_params_usb_pd_get_mode_response { 5190 uint16_t svid; /* SVID */ 5191 uint16_t opos; /* Object Position */ 5192 uint32_t vdo[6]; /* Mode VDOs */ 5193 } __ec_align4; 5194 5195 #define EC_CMD_USB_PD_SET_AMODE 0x0117 5196 5197 enum pd_mode_cmd { 5198 PD_EXIT_MODE = 0, 5199 PD_ENTER_MODE = 1, 5200 /* Not a command. Do NOT remove. */ 5201 PD_MODE_CMD_COUNT, 5202 }; 5203 5204 struct ec_params_usb_pd_set_mode_request { 5205 uint32_t cmd; /* enum pd_mode_cmd */ 5206 uint16_t svid; /* SVID to set */ 5207 uint8_t opos; /* Object Position */ 5208 uint8_t port; /* port */ 5209 } __ec_align4; 5210 5211 /* Ask the PD MCU to record a log of a requested type */ 5212 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 5213 5214 struct ec_params_pd_write_log_entry { 5215 uint8_t type; /* event type : see PD_EVENT_xx above */ 5216 uint8_t port; /* port#, or 0 for events unrelated to a given port */ 5217 } __ec_align1; 5218 5219 5220 /* Control USB-PD chip */ 5221 #define EC_CMD_PD_CONTROL 0x0119 5222 5223 enum ec_pd_control_cmd { 5224 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 5225 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 5226 PD_RESET, /* Force reset the PD chip */ 5227 PD_CONTROL_DISABLE, /* Disable further calls to this command */ 5228 PD_CHIP_ON, /* Power on the PD chip */ 5229 }; 5230 5231 struct ec_params_pd_control { 5232 uint8_t chip; /* chip id */ 5233 uint8_t subcmd; 5234 } __ec_align1; 5235 5236 /* Get info about USB-C SS muxes */ 5237 #define EC_CMD_USB_PD_MUX_INFO 0x011A 5238 5239 struct ec_params_usb_pd_mux_info { 5240 uint8_t port; /* USB-C port number */ 5241 } __ec_align1; 5242 5243 /* Flags representing mux state */ 5244 #define USB_PD_MUX_NONE 0 /* Open switch */ 5245 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ 5246 #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ 5247 #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ 5248 #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ 5249 #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ 5250 #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ 5251 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ 5252 #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ 5253 5254 struct ec_response_usb_pd_mux_info { 5255 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 5256 } __ec_align1; 5257 5258 #define EC_CMD_PD_CHIP_INFO 0x011B 5259 5260 struct ec_params_pd_chip_info { 5261 uint8_t port; /* USB-C port number */ 5262 uint8_t renew; /* Force renewal */ 5263 } __ec_align1; 5264 5265 struct ec_response_pd_chip_info { 5266 uint16_t vendor_id; 5267 uint16_t product_id; 5268 uint16_t device_id; 5269 union { 5270 uint8_t fw_version_string[8]; 5271 uint64_t fw_version_number; 5272 }; 5273 } __ec_align2; 5274 5275 struct ec_response_pd_chip_info_v1 { 5276 uint16_t vendor_id; 5277 uint16_t product_id; 5278 uint16_t device_id; 5279 union { 5280 uint8_t fw_version_string[8]; 5281 uint64_t fw_version_number; 5282 }; 5283 union { 5284 uint8_t min_req_fw_version_string[8]; 5285 uint64_t min_req_fw_version_number; 5286 }; 5287 } __ec_align2; 5288 5289 /* Run RW signature verification and get status */ 5290 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C 5291 5292 struct ec_response_rwsig_check_status { 5293 uint32_t status; 5294 } __ec_align4; 5295 5296 /* For controlling RWSIG task */ 5297 #define EC_CMD_RWSIG_ACTION 0x011D 5298 5299 enum rwsig_action { 5300 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 5301 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 5302 }; 5303 5304 struct ec_params_rwsig_action { 5305 uint32_t action; 5306 } __ec_align4; 5307 5308 /* Run verification on a slot */ 5309 #define EC_CMD_EFS_VERIFY 0x011E 5310 5311 struct ec_params_efs_verify { 5312 uint8_t region; /* enum ec_flash_region */ 5313 } __ec_align1; 5314 5315 /* 5316 * Retrieve info from Cros Board Info store. Response is based on the data 5317 * type. Integers return a uint32. Strings return a string, using the response 5318 * size to determine how big it is. 5319 */ 5320 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F 5321 /* 5322 * Write info into Cros Board Info on EEPROM. Write fails if the board has 5323 * hardware write-protect enabled. 5324 */ 5325 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 5326 5327 enum cbi_data_tag { 5328 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ 5329 CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ 5330 CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ 5331 CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ 5332 CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ 5333 CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ 5334 CBI_TAG_COUNT, 5335 }; 5336 5337 /* 5338 * Flags to control read operation 5339 * 5340 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 5341 * write was successful without reboot. 5342 */ 5343 #define CBI_GET_RELOAD BIT(0) 5344 5345 struct ec_params_get_cbi { 5346 uint32_t tag; /* enum cbi_data_tag */ 5347 uint32_t flag; /* CBI_GET_* */ 5348 } __ec_align4; 5349 5350 /* 5351 * Flags to control write behavior. 5352 * 5353 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 5354 * useful when writing multiple fields in a row. 5355 * INIT: Need to be set when creating a new CBI from scratch. All fields 5356 * will be initialized to zero first. 5357 */ 5358 #define CBI_SET_NO_SYNC BIT(0) 5359 #define CBI_SET_INIT BIT(1) 5360 5361 struct ec_params_set_cbi { 5362 uint32_t tag; /* enum cbi_data_tag */ 5363 uint32_t flag; /* CBI_SET_* */ 5364 uint32_t size; /* Data size */ 5365 uint8_t data[]; /* For string and raw data */ 5366 } __ec_align1; 5367 5368 /* 5369 * Information about resets of the AP by the EC and the EC's own uptime. 5370 */ 5371 #define EC_CMD_GET_UPTIME_INFO 0x0121 5372 5373 struct ec_response_uptime_info { 5374 /* 5375 * Number of milliseconds since the last EC boot. Sysjump resets 5376 * typically do not restart the EC's time_since_boot epoch. 5377 * 5378 * WARNING: The EC's sense of time is much less accurate than the AP's 5379 * sense of time, in both phase and frequency. This timebase is similar 5380 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. 5381 */ 5382 uint32_t time_since_ec_boot_ms; 5383 5384 /* 5385 * Number of times the AP was reset by the EC since the last EC boot. 5386 * Note that the AP may be held in reset by the EC during the initial 5387 * boot sequence, such that the very first AP boot may count as more 5388 * than one here. 5389 */ 5390 uint32_t ap_resets_since_ec_boot; 5391 5392 /* 5393 * The set of flags which describe the EC's most recent reset. See 5394 * include/system.h RESET_FLAG_* for details. 5395 */ 5396 uint32_t ec_reset_flags; 5397 5398 /* Empty log entries have both the cause and timestamp set to zero. */ 5399 struct ap_reset_log_entry { 5400 /* 5401 * See include/chipset.h: enum chipset_{reset,shutdown}_reason 5402 * for details. 5403 */ 5404 uint16_t reset_cause; 5405 5406 /* Reserved for protocol growth. */ 5407 uint16_t reserved; 5408 5409 /* 5410 * The time of the reset's assertion, in milliseconds since the 5411 * last EC boot, in the same epoch as time_since_ec_boot_ms. 5412 * Set to zero if the log entry is empty. 5413 */ 5414 uint32_t reset_time_ms; 5415 } recent_ap_reset[4]; 5416 } __ec_align4; 5417 5418 /* 5419 * Add entropy to the device secret (stored in the rollback region). 5420 * 5421 * Depending on the chip, the operation may take a long time (e.g. to erase 5422 * flash), so the commands are asynchronous. 5423 */ 5424 #define EC_CMD_ADD_ENTROPY 0x0122 5425 5426 enum add_entropy_action { 5427 /* Add entropy to the current secret. */ 5428 ADD_ENTROPY_ASYNC = 0, 5429 /* 5430 * Add entropy, and also make sure that the previous secret is erased. 5431 * (this can be implemented by adding entropy multiple times until 5432 * all rolback blocks have been overwritten). 5433 */ 5434 ADD_ENTROPY_RESET_ASYNC = 1, 5435 /* Read back result from the previous operation. */ 5436 ADD_ENTROPY_GET_RESULT = 2, 5437 }; 5438 5439 struct ec_params_rollback_add_entropy { 5440 uint8_t action; 5441 } __ec_align1; 5442 5443 /* 5444 * Perform a single read of a given ADC channel. 5445 */ 5446 #define EC_CMD_ADC_READ 0x0123 5447 5448 struct ec_params_adc_read { 5449 uint8_t adc_channel; 5450 } __ec_align1; 5451 5452 struct ec_response_adc_read { 5453 int32_t adc_value; 5454 } __ec_align4; 5455 5456 /* 5457 * Read back rollback info 5458 */ 5459 #define EC_CMD_ROLLBACK_INFO 0x0124 5460 5461 struct ec_response_rollback_info { 5462 int32_t id; /* Incrementing number to indicate which region to use. */ 5463 int32_t rollback_min_version; 5464 int32_t rw_rollback_version; 5465 } __ec_align4; 5466 5467 5468 /* Issue AP reset */ 5469 #define EC_CMD_AP_RESET 0x0125 5470 5471 /** 5472 * Get the number of peripheral charge ports 5473 */ 5474 #define EC_CMD_PCHG_COUNT 0x0134 5475 5476 #define EC_PCHG_MAX_PORTS 8 5477 5478 struct ec_response_pchg_count { 5479 uint8_t port_count; 5480 } __ec_align1; 5481 5482 /** 5483 * Get the status of a peripheral charge port 5484 */ 5485 #define EC_CMD_PCHG 0x0135 5486 5487 struct ec_params_pchg { 5488 uint8_t port; 5489 } __ec_align1; 5490 5491 struct ec_response_pchg { 5492 uint32_t error; /* enum pchg_error */ 5493 uint8_t state; /* enum pchg_state state */ 5494 uint8_t battery_percentage; 5495 uint8_t unused0; 5496 uint8_t unused1; 5497 /* Fields added in version 1 */ 5498 uint32_t fw_version; 5499 uint32_t dropped_event_count; 5500 } __ec_align2; 5501 5502 enum pchg_state { 5503 /* Charger is reset and not initialized. */ 5504 PCHG_STATE_RESET = 0, 5505 /* Charger is initialized or disabled. */ 5506 PCHG_STATE_INITIALIZED, 5507 /* Charger is enabled and ready to detect a device. */ 5508 PCHG_STATE_ENABLED, 5509 /* Device is in proximity. */ 5510 PCHG_STATE_DETECTED, 5511 /* Device is being charged. */ 5512 PCHG_STATE_CHARGING, 5513 /* Device is fully charged. It implies DETECTED (& not charging). */ 5514 PCHG_STATE_FULL, 5515 /* In download (a.k.a. firmware update) mode */ 5516 PCHG_STATE_DOWNLOAD, 5517 /* In download mode. Ready for receiving data. */ 5518 PCHG_STATE_DOWNLOADING, 5519 /* Device is ready for data communication. */ 5520 PCHG_STATE_CONNECTED, 5521 /* Put no more entry below */ 5522 PCHG_STATE_COUNT, 5523 }; 5524 5525 #define EC_PCHG_STATE_TEXT { \ 5526 [PCHG_STATE_RESET] = "RESET", \ 5527 [PCHG_STATE_INITIALIZED] = "INITIALIZED", \ 5528 [PCHG_STATE_ENABLED] = "ENABLED", \ 5529 [PCHG_STATE_DETECTED] = "DETECTED", \ 5530 [PCHG_STATE_CHARGING] = "CHARGING", \ 5531 [PCHG_STATE_FULL] = "FULL", \ 5532 [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \ 5533 [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \ 5534 [PCHG_STATE_CONNECTED] = "CONNECTED", \ 5535 } 5536 5537 /* 5538 * Update firmware of peripheral chip 5539 */ 5540 #define EC_CMD_PCHG_UPDATE 0x0136 5541 5542 /* Port number is encoded in bit[28:31]. */ 5543 #define EC_MKBP_PCHG_PORT_SHIFT 28 5544 /* Utility macro for converting MKBP event to port number. */ 5545 #define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf) 5546 /* Utility macro for extracting event bits. */ 5547 #define EC_MKBP_PCHG_EVENT_MASK(e) ((e) \ 5548 & GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0)) 5549 5550 #define EC_MKBP_PCHG_UPDATE_OPENED BIT(0) 5551 #define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1) 5552 #define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2) 5553 #define EC_MKBP_PCHG_UPDATE_ERROR BIT(3) 5554 #define EC_MKBP_PCHG_DEVICE_EVENT BIT(4) 5555 5556 enum ec_pchg_update_cmd { 5557 /* Reset chip to normal mode. */ 5558 EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0, 5559 /* Reset and put a chip in update (a.k.a. download) mode. */ 5560 EC_PCHG_UPDATE_CMD_OPEN, 5561 /* Write a block of data containing FW image. */ 5562 EC_PCHG_UPDATE_CMD_WRITE, 5563 /* Close update session. */ 5564 EC_PCHG_UPDATE_CMD_CLOSE, 5565 /* End of commands */ 5566 EC_PCHG_UPDATE_CMD_COUNT, 5567 }; 5568 5569 struct ec_params_pchg_update { 5570 /* PCHG port number */ 5571 uint8_t port; 5572 /* enum ec_pchg_update_cmd */ 5573 uint8_t cmd; 5574 /* Padding */ 5575 uint8_t reserved0; 5576 uint8_t reserved1; 5577 /* Version of new firmware */ 5578 uint32_t version; 5579 /* CRC32 of new firmware */ 5580 uint32_t crc32; 5581 /* Address in chip memory where <data> is written to */ 5582 uint32_t addr; 5583 /* Size of <data> */ 5584 uint32_t size; 5585 /* Partial data of new firmware */ 5586 uint8_t data[]; 5587 } __ec_align4; 5588 5589 BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT 5590 < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8)); 5591 5592 struct ec_response_pchg_update { 5593 /* Block size */ 5594 uint32_t block_size; 5595 } __ec_align4; 5596 5597 5598 /*****************************************************************************/ 5599 /* Voltage regulator controls */ 5600 5601 /* 5602 * Get basic info of voltage regulator for given index. 5603 * 5604 * Returns the regulator name and supported voltage list in mV. 5605 */ 5606 #define EC_CMD_REGULATOR_GET_INFO 0x012C 5607 5608 /* Maximum length of regulator name */ 5609 #define EC_REGULATOR_NAME_MAX_LEN 16 5610 5611 /* Maximum length of the supported voltage list. */ 5612 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16 5613 5614 struct ec_params_regulator_get_info { 5615 uint32_t index; 5616 } __ec_align4; 5617 5618 struct ec_response_regulator_get_info { 5619 char name[EC_REGULATOR_NAME_MAX_LEN]; 5620 uint16_t num_voltages; 5621 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT]; 5622 } __ec_align2; 5623 5624 /* 5625 * Configure the regulator as enabled / disabled. 5626 */ 5627 #define EC_CMD_REGULATOR_ENABLE 0x012D 5628 5629 struct ec_params_regulator_enable { 5630 uint32_t index; 5631 uint8_t enable; 5632 } __ec_align4; 5633 5634 /* 5635 * Query if the regulator is enabled. 5636 * 5637 * Returns 1 if the regulator is enabled, 0 if not. 5638 */ 5639 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E 5640 5641 struct ec_params_regulator_is_enabled { 5642 uint32_t index; 5643 } __ec_align4; 5644 5645 struct ec_response_regulator_is_enabled { 5646 uint8_t enabled; 5647 } __ec_align1; 5648 5649 /* 5650 * Set voltage for the voltage regulator within the range specified. 5651 * 5652 * The driver should select the voltage in range closest to min_mv. 5653 * 5654 * Also note that this might be called before the regulator is enabled, and the 5655 * setting should be in effect after the regulator is enabled. 5656 */ 5657 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F 5658 5659 struct ec_params_regulator_set_voltage { 5660 uint32_t index; 5661 uint32_t min_mv; 5662 uint32_t max_mv; 5663 } __ec_align4; 5664 5665 /* 5666 * Get the currently configured voltage for the voltage regulator. 5667 * 5668 * Note that this might be called before the regulator is enabled, and this 5669 * should return the configured output voltage if the regulator is enabled. 5670 */ 5671 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130 5672 5673 struct ec_params_regulator_get_voltage { 5674 uint32_t index; 5675 } __ec_align4; 5676 5677 struct ec_response_regulator_get_voltage { 5678 uint32_t voltage_mv; 5679 } __ec_align4; 5680 5681 /* 5682 * Gather all discovery information for the given port and partner type. 5683 * 5684 * Note that if discovery has not yet completed, only the currently completed 5685 * responses will be filled in. If the discovery data structures are changed 5686 * in the process of the command running, BUSY will be returned. 5687 * 5688 * VDO field sizes are set to the maximum possible number of VDOs a VDM may 5689 * contain, while the number of SVIDs here is selected to fit within the PROTO2 5690 * maximum parameter size. 5691 */ 5692 #define EC_CMD_TYPEC_DISCOVERY 0x0131 5693 5694 enum typec_partner_type { 5695 TYPEC_PARTNER_SOP = 0, 5696 TYPEC_PARTNER_SOP_PRIME = 1, 5697 }; 5698 5699 struct ec_params_typec_discovery { 5700 uint8_t port; 5701 uint8_t partner_type; /* enum typec_partner_type */ 5702 } __ec_align1; 5703 5704 struct svid_mode_info { 5705 uint16_t svid; 5706 uint16_t mode_count; /* Number of modes partner sent */ 5707 uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5708 }; 5709 5710 struct ec_response_typec_discovery { 5711 uint8_t identity_count; /* Number of identity VDOs partner sent */ 5712 uint8_t svid_count; /* Number of SVIDs partner sent */ 5713 uint16_t reserved; 5714 uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5715 struct svid_mode_info svids[]; 5716 } __ec_align1; 5717 5718 /* USB Type-C commands for AP-controlled device policy. */ 5719 #define EC_CMD_TYPEC_CONTROL 0x0132 5720 5721 enum typec_control_command { 5722 TYPEC_CONTROL_COMMAND_EXIT_MODES, 5723 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, 5724 TYPEC_CONTROL_COMMAND_ENTER_MODE, 5725 }; 5726 5727 struct ec_params_typec_control { 5728 uint8_t port; 5729 uint8_t command; /* enum typec_control_command */ 5730 uint16_t reserved; 5731 5732 /* 5733 * This section will be interpreted based on |command|. Define a 5734 * placeholder structure to avoid having to increase the size and bump 5735 * the command version when adding new sub-commands. 5736 */ 5737 union { 5738 uint32_t clear_events_mask; 5739 uint8_t mode_to_enter; /* enum typec_mode */ 5740 uint8_t placeholder[128]; 5741 }; 5742 } __ec_align1; 5743 5744 /* 5745 * Gather all status information for a port. 5746 * 5747 * Note: this covers many of the return fields from the deprecated 5748 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the 5749 * discovery data. The "enum pd_cc_states" is defined with the deprecated 5750 * EC_CMD_USB_PD_CONTROL command. 5751 * 5752 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags. 5753 */ 5754 #define EC_CMD_TYPEC_STATUS 0x0133 5755 5756 /* 5757 * Power role. 5758 * 5759 * Note this is also used for PD header creation, and values align to those in 5760 * the Power Delivery Specification Revision 3.0 (See 5761 * 6.2.1.1.4 Port Power Role). 5762 */ 5763 enum pd_power_role { 5764 PD_ROLE_SINK = 0, 5765 PD_ROLE_SOURCE = 1 5766 }; 5767 5768 /* 5769 * Data role. 5770 * 5771 * Note this is also used for PD header creation, and the first two values 5772 * align to those in the Power Delivery Specification Revision 3.0 (See 5773 * 6.2.1.1.6 Port Data Role). 5774 */ 5775 enum pd_data_role { 5776 PD_ROLE_UFP = 0, 5777 PD_ROLE_DFP = 1, 5778 PD_ROLE_DISCONNECTED = 2, 5779 }; 5780 5781 enum pd_vconn_role { 5782 PD_ROLE_VCONN_OFF = 0, 5783 PD_ROLE_VCONN_SRC = 1, 5784 }; 5785 5786 /* 5787 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2, 5788 * regardless of whether a debug accessory is connected. 5789 */ 5790 enum tcpc_cc_polarity { 5791 /* 5792 * _CCx: is used to indicate the polarity while not connected to 5793 * a Debug Accessory. Only one CC line will assert a resistor and 5794 * the other will be open. 5795 */ 5796 POLARITY_CC1 = 0, 5797 POLARITY_CC2 = 1, 5798 5799 /* 5800 * _CCx_DTS is used to indicate the polarity while connected to a 5801 * SRC Debug Accessory. Assert resistors on both lines. 5802 */ 5803 POLARITY_CC1_DTS = 2, 5804 POLARITY_CC2_DTS = 3, 5805 5806 /* 5807 * The current TCPC code relies on these specific POLARITY values. 5808 * Adding in a check to verify if the list grows for any reason 5809 * that this will give a hint that other places need to be 5810 * adjusted. 5811 */ 5812 POLARITY_COUNT 5813 }; 5814 5815 #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) 5816 #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) 5817 #define PD_STATUS_EVENT_HARD_RESET BIT(2) 5818 5819 struct ec_params_typec_status { 5820 uint8_t port; 5821 } __ec_align1; 5822 5823 struct ec_response_typec_status { 5824 uint8_t pd_enabled; /* PD communication enabled - bool */ 5825 uint8_t dev_connected; /* Device connected - bool */ 5826 uint8_t sop_connected; /* Device is SOP PD capable - bool */ 5827 uint8_t source_cap_count; /* Number of Source Cap PDOs */ 5828 5829 uint8_t power_role; /* enum pd_power_role */ 5830 uint8_t data_role; /* enum pd_data_role */ 5831 uint8_t vconn_role; /* enum pd_vconn_role */ 5832 uint8_t sink_cap_count; /* Number of Sink Cap PDOs */ 5833 5834 uint8_t polarity; /* enum tcpc_cc_polarity */ 5835 uint8_t cc_state; /* enum pd_cc_states */ 5836 uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */ 5837 uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */ 5838 5839 char tc_state[32]; /* TC state name */ 5840 5841 uint32_t events; /* PD_STATUS_EVENT bitmask */ 5842 5843 /* 5844 * BCD PD revisions for partners 5845 * 5846 * The format has the PD major reversion in the upper nibble, and PD 5847 * minor version in the next nibble. Following two nibbles are 5848 * currently 0. 5849 * ex. PD 3.2 would map to 0x3200 5850 * 5851 * PD major/minor will be 0 if no PD device is connected. 5852 */ 5853 uint16_t sop_revision; 5854 uint16_t sop_prime_revision; 5855 5856 uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */ 5857 5858 uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ 5859 } __ec_align1; 5860 5861 /*****************************************************************************/ 5862 /* The command range 0x200-0x2FF is reserved for Rotor. */ 5863 5864 /*****************************************************************************/ 5865 /* 5866 * Reserve a range of host commands for the CR51 firmware. 5867 */ 5868 #define EC_CMD_CR51_BASE 0x0300 5869 #define EC_CMD_CR51_LAST 0x03FF 5870 5871 /*****************************************************************************/ 5872 /* Fingerprint MCU commands: range 0x0400-0x040x */ 5873 5874 /* Fingerprint SPI sensor passthru command: prototyping ONLY */ 5875 #define EC_CMD_FP_PASSTHRU 0x0400 5876 5877 #define EC_FP_FLAG_NOT_COMPLETE 0x1 5878 5879 struct ec_params_fp_passthru { 5880 uint16_t len; /* Number of bytes to write then read */ 5881 uint16_t flags; /* EC_FP_FLAG_xxx */ 5882 uint8_t data[]; /* Data to send */ 5883 } __ec_align2; 5884 5885 /* Configure the Fingerprint MCU behavior */ 5886 #define EC_CMD_FP_MODE 0x0402 5887 5888 /* Put the sensor in its lowest power mode */ 5889 #define FP_MODE_DEEPSLEEP BIT(0) 5890 /* Wait to see a finger on the sensor */ 5891 #define FP_MODE_FINGER_DOWN BIT(1) 5892 /* Poll until the finger has left the sensor */ 5893 #define FP_MODE_FINGER_UP BIT(2) 5894 /* Capture the current finger image */ 5895 #define FP_MODE_CAPTURE BIT(3) 5896 /* Finger enrollment session on-going */ 5897 #define FP_MODE_ENROLL_SESSION BIT(4) 5898 /* Enroll the current finger image */ 5899 #define FP_MODE_ENROLL_IMAGE BIT(5) 5900 /* Try to match the current finger image */ 5901 #define FP_MODE_MATCH BIT(6) 5902 /* Reset and re-initialize the sensor. */ 5903 #define FP_MODE_RESET_SENSOR BIT(7) 5904 /* special value: don't change anything just read back current mode */ 5905 #define FP_MODE_DONT_CHANGE BIT(31) 5906 5907 #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ 5908 FP_MODE_FINGER_DOWN | \ 5909 FP_MODE_FINGER_UP | \ 5910 FP_MODE_CAPTURE | \ 5911 FP_MODE_ENROLL_SESSION | \ 5912 FP_MODE_ENROLL_IMAGE | \ 5913 FP_MODE_MATCH | \ 5914 FP_MODE_RESET_SENSOR | \ 5915 FP_MODE_DONT_CHANGE) 5916 5917 /* Capture types defined in bits [30..28] */ 5918 #define FP_MODE_CAPTURE_TYPE_SHIFT 28 5919 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) 5920 /* 5921 * This enum must remain ordered, if you add new values you must ensure that 5922 * FP_CAPTURE_TYPE_MAX is still the last one. 5923 */ 5924 enum fp_capture_type { 5925 /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ 5926 FP_CAPTURE_VENDOR_FORMAT = 0, 5927 /* Simple raw image capture (produces width x height x bpp bits) */ 5928 FP_CAPTURE_SIMPLE_IMAGE = 1, 5929 /* Self test pattern (e.g. checkerboard) */ 5930 FP_CAPTURE_PATTERN0 = 2, 5931 /* Self test pattern (e.g. inverted checkerboard) */ 5932 FP_CAPTURE_PATTERN1 = 3, 5933 /* Capture for Quality test with fixed contrast */ 5934 FP_CAPTURE_QUALITY_TEST = 4, 5935 /* Capture for pixel reset value test */ 5936 FP_CAPTURE_RESET_TEST = 5, 5937 FP_CAPTURE_TYPE_MAX, 5938 }; 5939 /* Extracts the capture type from the sensor 'mode' word */ 5940 #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ 5941 >> FP_MODE_CAPTURE_TYPE_SHIFT) 5942 5943 struct ec_params_fp_mode { 5944 uint32_t mode; /* as defined by FP_MODE_ constants */ 5945 } __ec_align4; 5946 5947 struct ec_response_fp_mode { 5948 uint32_t mode; /* as defined by FP_MODE_ constants */ 5949 } __ec_align4; 5950 5951 /* Retrieve Fingerprint sensor information */ 5952 #define EC_CMD_FP_INFO 0x0403 5953 5954 /* Number of dead pixels detected on the last maintenance */ 5955 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) 5956 /* Unknown number of dead pixels detected on the last maintenance */ 5957 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) 5958 /* No interrupt from the sensor */ 5959 #define FP_ERROR_NO_IRQ BIT(12) 5960 /* SPI communication error */ 5961 #define FP_ERROR_SPI_COMM BIT(13) 5962 /* Invalid sensor Hardware ID */ 5963 #define FP_ERROR_BAD_HWID BIT(14) 5964 /* Sensor initialization failed */ 5965 #define FP_ERROR_INIT_FAIL BIT(15) 5966 5967 struct ec_response_fp_info_v0 { 5968 /* Sensor identification */ 5969 uint32_t vendor_id; 5970 uint32_t product_id; 5971 uint32_t model_id; 5972 uint32_t version; 5973 /* Image frame characteristics */ 5974 uint32_t frame_size; 5975 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 5976 uint16_t width; 5977 uint16_t height; 5978 uint16_t bpp; 5979 uint16_t errors; /* see FP_ERROR_ flags above */ 5980 } __ec_align4; 5981 5982 struct ec_response_fp_info { 5983 /* Sensor identification */ 5984 uint32_t vendor_id; 5985 uint32_t product_id; 5986 uint32_t model_id; 5987 uint32_t version; 5988 /* Image frame characteristics */ 5989 uint32_t frame_size; 5990 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 5991 uint16_t width; 5992 uint16_t height; 5993 uint16_t bpp; 5994 uint16_t errors; /* see FP_ERROR_ flags above */ 5995 /* Template/finger current information */ 5996 uint32_t template_size; /* max template size in bytes */ 5997 uint16_t template_max; /* maximum number of fingers/templates */ 5998 uint16_t template_valid; /* number of valid fingers/templates */ 5999 uint32_t template_dirty; /* bitmap of templates with MCU side changes */ 6000 uint32_t template_version; /* version of the template format */ 6001 } __ec_align4; 6002 6003 /* Get the last captured finger frame or a template content */ 6004 #define EC_CMD_FP_FRAME 0x0404 6005 6006 /* constants defining the 'offset' field which also contains the frame index */ 6007 #define FP_FRAME_INDEX_SHIFT 28 6008 /* Frame buffer where the captured image is stored */ 6009 #define FP_FRAME_INDEX_RAW_IMAGE 0 6010 /* First frame buffer holding a template */ 6011 #define FP_FRAME_INDEX_TEMPLATE 1 6012 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) 6013 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF 6014 6015 /* Version of the format of the encrypted templates. */ 6016 #define FP_TEMPLATE_FORMAT_VERSION 3 6017 6018 /* Constants for encryption parameters */ 6019 #define FP_CONTEXT_NONCE_BYTES 12 6020 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) 6021 #define FP_CONTEXT_TAG_BYTES 16 6022 #define FP_CONTEXT_SALT_BYTES 16 6023 #define FP_CONTEXT_TPM_BYTES 32 6024 6025 struct ec_fp_template_encryption_metadata { 6026 /* 6027 * Version of the structure format (N=3). 6028 */ 6029 uint16_t struct_version; 6030 /* Reserved bytes, set to 0. */ 6031 uint16_t reserved; 6032 /* 6033 * The salt is *only* ever used for key derivation. The nonce is unique, 6034 * a different one is used for every message. 6035 */ 6036 uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; 6037 uint8_t salt[FP_CONTEXT_SALT_BYTES]; 6038 uint8_t tag[FP_CONTEXT_TAG_BYTES]; 6039 }; 6040 6041 struct ec_params_fp_frame { 6042 /* 6043 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE 6044 * in the high nibble, and the real offset within the frame in 6045 * FP_FRAME_OFFSET_MASK. 6046 */ 6047 uint32_t offset; 6048 uint32_t size; 6049 } __ec_align4; 6050 6051 /* Load a template into the MCU */ 6052 #define EC_CMD_FP_TEMPLATE 0x0405 6053 6054 /* Flag in the 'size' field indicating that the full template has been sent */ 6055 #define FP_TEMPLATE_COMMIT 0x80000000 6056 6057 struct ec_params_fp_template { 6058 uint32_t offset; 6059 uint32_t size; 6060 uint8_t data[]; 6061 } __ec_align4; 6062 6063 /* Clear the current fingerprint user context and set a new one */ 6064 #define EC_CMD_FP_CONTEXT 0x0406 6065 6066 struct ec_params_fp_context { 6067 uint32_t userid[FP_CONTEXT_USERID_WORDS]; 6068 } __ec_align4; 6069 6070 #define EC_CMD_FP_STATS 0x0407 6071 6072 #define FPSTATS_CAPTURE_INV BIT(0) 6073 #define FPSTATS_MATCHING_INV BIT(1) 6074 6075 struct ec_response_fp_stats { 6076 uint32_t capture_time_us; 6077 uint32_t matching_time_us; 6078 uint32_t overall_time_us; 6079 struct { 6080 uint32_t lo; 6081 uint32_t hi; 6082 } overall_t0; 6083 uint8_t timestamps_invalid; 6084 int8_t template_matched; 6085 } __ec_align2; 6086 6087 #define EC_CMD_FP_SEED 0x0408 6088 struct ec_params_fp_seed { 6089 /* 6090 * Version of the structure format (N=3). 6091 */ 6092 uint16_t struct_version; 6093 /* Reserved bytes, set to 0. */ 6094 uint16_t reserved; 6095 /* Seed from the TPM. */ 6096 uint8_t seed[FP_CONTEXT_TPM_BYTES]; 6097 } __ec_align4; 6098 6099 #define EC_CMD_FP_ENC_STATUS 0x0409 6100 6101 /* FP TPM seed has been set or not */ 6102 #define FP_ENC_STATUS_SEED_SET BIT(0) 6103 6104 struct ec_response_fp_encryption_status { 6105 /* Used bits in encryption engine status */ 6106 uint32_t valid_flags; 6107 /* Encryption engine status */ 6108 uint32_t status; 6109 } __ec_align4; 6110 6111 /*****************************************************************************/ 6112 /* Touchpad MCU commands: range 0x0500-0x05FF */ 6113 6114 /* Perform touchpad self test */ 6115 #define EC_CMD_TP_SELF_TEST 0x0500 6116 6117 /* Get number of frame types, and the size of each type */ 6118 #define EC_CMD_TP_FRAME_INFO 0x0501 6119 6120 struct ec_response_tp_frame_info { 6121 uint32_t n_frames; 6122 uint32_t frame_sizes[]; 6123 } __ec_align4; 6124 6125 /* Create a snapshot of current frame readings */ 6126 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 6127 6128 /* Read the frame */ 6129 #define EC_CMD_TP_FRAME_GET 0x0503 6130 6131 struct ec_params_tp_frame_get { 6132 uint32_t frame_index; 6133 uint32_t offset; 6134 uint32_t size; 6135 } __ec_align4; 6136 6137 /*****************************************************************************/ 6138 /* EC-EC communication commands: range 0x0600-0x06FF */ 6139 6140 #define EC_COMM_TEXT_MAX 8 6141 6142 /* 6143 * Get battery static information, i.e. information that never changes, or 6144 * very infrequently. 6145 */ 6146 #define EC_CMD_BATTERY_GET_STATIC 0x0600 6147 6148 /** 6149 * struct ec_params_battery_static_info - Battery static info parameters 6150 * @index: Battery index. 6151 */ 6152 struct ec_params_battery_static_info { 6153 uint8_t index; 6154 } __ec_align_size1; 6155 6156 /** 6157 * struct ec_response_battery_static_info - Battery static info response 6158 * @design_capacity: Battery Design Capacity (mAh) 6159 * @design_voltage: Battery Design Voltage (mV) 6160 * @manufacturer: Battery Manufacturer String 6161 * @model: Battery Model Number String 6162 * @serial: Battery Serial Number String 6163 * @type: Battery Type String 6164 * @cycle_count: Battery Cycle Count 6165 */ 6166 struct ec_response_battery_static_info { 6167 uint16_t design_capacity; 6168 uint16_t design_voltage; 6169 char manufacturer[EC_COMM_TEXT_MAX]; 6170 char model[EC_COMM_TEXT_MAX]; 6171 char serial[EC_COMM_TEXT_MAX]; 6172 char type[EC_COMM_TEXT_MAX]; 6173 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ 6174 uint32_t cycle_count; 6175 } __ec_align4; 6176 6177 /* 6178 * Get battery dynamic information, i.e. information that is likely to change 6179 * every time it is read. 6180 */ 6181 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 6182 6183 /** 6184 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters 6185 * @index: Battery index. 6186 */ 6187 struct ec_params_battery_dynamic_info { 6188 uint8_t index; 6189 } __ec_align_size1; 6190 6191 /** 6192 * struct ec_response_battery_dynamic_info - Battery dynamic info response 6193 * @actual_voltage: Battery voltage (mV) 6194 * @actual_current: Battery current (mA); negative=discharging 6195 * @remaining_capacity: Remaining capacity (mAh) 6196 * @full_capacity: Capacity (mAh, might change occasionally) 6197 * @flags: Flags, see EC_BATT_FLAG_* 6198 * @desired_voltage: Charging voltage desired by battery (mV) 6199 * @desired_current: Charging current desired by battery (mA) 6200 */ 6201 struct ec_response_battery_dynamic_info { 6202 int16_t actual_voltage; 6203 int16_t actual_current; 6204 int16_t remaining_capacity; 6205 int16_t full_capacity; 6206 int16_t flags; 6207 int16_t desired_voltage; 6208 int16_t desired_current; 6209 } __ec_align2; 6210 6211 /* 6212 * Control charger chip. Used to control charger chip on the slave. 6213 */ 6214 #define EC_CMD_CHARGER_CONTROL 0x0602 6215 6216 /** 6217 * struct ec_params_charger_control - Charger control parameters 6218 * @max_current: Charger current (mA). Positive to allow base to draw up to 6219 * max_current and (possibly) charge battery, negative to request current 6220 * from base (OTG). 6221 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is 6222 * >= 0. 6223 * @allow_charging: Allow base battery charging (only makes sense if 6224 * max_current > 0). 6225 */ 6226 struct ec_params_charger_control { 6227 int16_t max_current; 6228 uint16_t otg_voltage; 6229 uint8_t allow_charging; 6230 } __ec_align_size1; 6231 6232 /* Get ACK from the USB-C SS muxes */ 6233 #define EC_CMD_USB_PD_MUX_ACK 0x0603 6234 6235 struct ec_params_usb_pd_mux_ack { 6236 uint8_t port; /* USB-C port number */ 6237 } __ec_align1; 6238 6239 /*****************************************************************************/ 6240 /* 6241 * Reserve a range of host commands for board-specific, experimental, or 6242 * special purpose features. These can be (re)used without updating this file. 6243 * 6244 * CAUTION: Don't go nuts with this. Shipping products should document ALL 6245 * their EC commands for easier development, testing, debugging, and support. 6246 * 6247 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 6248 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 6249 * 6250 * In your experimental code, you may want to do something like this: 6251 * 6252 * #define EC_CMD_MAGIC_FOO 0x0000 6253 * #define EC_CMD_MAGIC_BAR 0x0001 6254 * #define EC_CMD_MAGIC_HEY 0x0002 6255 * 6256 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 6257 * EC_VER_MASK(0); 6258 * 6259 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 6260 * EC_VER_MASK(0); 6261 * 6262 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 6263 * EC_VER_MASK(0); 6264 */ 6265 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 6266 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 6267 6268 /* 6269 * Given the private host command offset, calculate the true private host 6270 * command value. 6271 */ 6272 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 6273 (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 6274 6275 /*****************************************************************************/ 6276 /* 6277 * Passthru commands 6278 * 6279 * Some platforms have sub-processors chained to each other. For example. 6280 * 6281 * AP <--> EC <--> PD MCU 6282 * 6283 * The top 2 bits of the command number are used to indicate which device the 6284 * command is intended for. Device 0 is always the device receiving the 6285 * command; other device mapping is board-specific. 6286 * 6287 * When a device receives a command to be passed to a sub-processor, it passes 6288 * it on with the device number set back to 0. This allows the sub-processor 6289 * to remain blissfully unaware of whether the command originated on the next 6290 * device up the chain, or was passed through from the AP. 6291 * 6292 * In the above example, if the AP wants to send command 0x0002 to the PD MCU, 6293 * AP sends command 0x4002 to the EC 6294 * EC sends command 0x0002 to the PD MCU 6295 * EC forwards PD MCU response back to the AP 6296 */ 6297 6298 /* Offset and max command number for sub-device n */ 6299 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) 6300 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) 6301 6302 /*****************************************************************************/ 6303 /* 6304 * Deprecated constants. These constants have been renamed for clarity. The 6305 * meaning and size has not changed. Programs that use the old names should 6306 * switch to the new names soon, as the old names may not be carried forward 6307 * forever. 6308 */ 6309 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 6310 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 6311 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 6312 6313 6314 6315 #endif /* __CROS_EC_COMMANDS_H */ 6316