1# SPDX-License-Identifier: GPL-2.0-only
2menu "IRQ subsystem"
3# Options selectable by the architecture code
4
5# Make sparse irq Kconfig switch below available
6config MAY_HAVE_SPARSE_IRQ
7       bool
8
9# Legacy support, required for itanic
10config GENERIC_IRQ_LEGACY
11       bool
12
13# Enable the generic irq autoprobe mechanism
14config GENERIC_IRQ_PROBE
15	bool
16
17# Use the generic /proc/interrupts implementation
18config GENERIC_IRQ_SHOW
19       bool
20
21# Print level/edge extra information
22config GENERIC_IRQ_SHOW_LEVEL
23       bool
24
25# Supports effective affinity mask
26config GENERIC_IRQ_EFFECTIVE_AFF_MASK
27       bool
28
29# Support for delayed migration from interrupt context
30config GENERIC_PENDING_IRQ
31	bool
32
33# Support for generic irq migrating off cpu before the cpu is offline.
34config GENERIC_IRQ_MIGRATION
35	bool
36
37# Alpha specific irq affinity mechanism
38config AUTO_IRQ_AFFINITY
39       bool
40
41# Interrupt injection mechanism
42config GENERIC_IRQ_INJECTION
43	bool
44
45# Tasklet based software resend for pending interrupts on enable_irq()
46config HARDIRQS_SW_RESEND
47       bool
48
49# Edge style eoi based handler (cell)
50config IRQ_EDGE_EOI_HANDLER
51       bool
52
53# Generic configurable interrupt chip implementation
54config GENERIC_IRQ_CHIP
55       bool
56       select IRQ_DOMAIN
57
58# Generic irq_domain hw <--> linux irq number translation
59config IRQ_DOMAIN
60	bool
61
62# Support for simulated interrupts
63config IRQ_SIM
64	bool
65	select IRQ_WORK
66	select IRQ_DOMAIN
67
68# Support for hierarchical irq domains
69config IRQ_DOMAIN_HIERARCHY
70	bool
71	select IRQ_DOMAIN
72
73# Support for obsolete non-mapping irq domains
74config IRQ_DOMAIN_NOMAP
75	bool
76	select IRQ_DOMAIN
77
78# Support for hierarchical fasteoi+edge and fasteoi+level handlers
79config IRQ_FASTEOI_HIERARCHY_HANDLERS
80	bool
81
82# Generic IRQ IPI support
83config GENERIC_IRQ_IPI
84	bool
85	depends on SMP
86	select IRQ_DOMAIN_HIERARCHY
87
88# Generic MSI interrupt support
89config GENERIC_MSI_IRQ
90	bool
91
92# Generic MSI hierarchical interrupt domain support
93config GENERIC_MSI_IRQ_DOMAIN
94	bool
95	select IRQ_DOMAIN_HIERARCHY
96	select GENERIC_MSI_IRQ
97
98config IRQ_MSI_IOMMU
99	bool
100
101config IRQ_TIMINGS
102	bool
103
104config GENERIC_IRQ_MATRIX_ALLOCATOR
105	bool
106
107config GENERIC_IRQ_RESERVATION_MODE
108	bool
109
110# Support forced irq threading
111config IRQ_FORCED_THREADING
112       bool
113
114config SPARSE_IRQ
115	bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
116	help
117
118	  Sparse irq numbering is useful for distro kernels that want
119	  to define a high CONFIG_NR_CPUS value but still want to have
120	  low kernel memory footprint on smaller machines.
121
122	  ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
123	    out the interrupt descriptors in a more NUMA-friendly way. )
124
125	  If you don't know what to do here, say N.
126
127config GENERIC_IRQ_DEBUGFS
128	bool "Expose irq internals in debugfs"
129	depends on DEBUG_FS
130	select GENERIC_IRQ_INJECTION
131	default n
132	help
133
134	  Exposes internal state information through debugfs. Mostly for
135	  developers and debugging of hard to diagnose interrupt problems.
136
137	  If you don't know what to do here, say N.
138
139endmenu
140
141config GENERIC_IRQ_MULTI_HANDLER
142	bool
143	help
144	  Allow to specify the low level IRQ handler at run time.
145
146# Cavium Octeon is the last system to use this deprecated option
147# Do not even think of enabling this on any new platform
148config DEPRECATED_IRQ_CPU_ONOFFLINE
149	bool
150	depends on CAVIUM_OCTEON_SOC
151	default CAVIUM_OCTEON_SOC
152