1 /*
2 * arch/arm/mach-ixp4xx/ixdp425-setup.c
3 *
4 * IXDP425/IXCDP1100 board-setup
5 *
6 * Copyright (C) 2003-2005 MontaVista Software, Inc.
7 *
8 * Author: Deepak Saxena <dsaxena@plexity.net>
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/serial.h>
15 #include <linux/tty.h>
16 #include <linux/serial_8250.h>
17 #include <linux/i2c-gpio.h>
18 #include <linux/io.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/partitions.h>
22 #include <linux/delay.h>
23 #include <asm/types.h>
24 #include <asm/setup.h>
25 #include <asm/memory.h>
26 #include <mach/hardware.h>
27 #include <asm/mach-types.h>
28 #include <asm/irq.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/flash.h>
31
32 #define IXDP425_SDA_PIN 7
33 #define IXDP425_SCL_PIN 6
34
35 /* NAND Flash pins */
36 #define IXDP425_NAND_NCE_PIN 12
37
38 #define IXDP425_NAND_CMD_BYTE 0x01
39 #define IXDP425_NAND_ADDR_BYTE 0x02
40
41 static struct flash_platform_data ixdp425_flash_data = {
42 .map_name = "cfi_probe",
43 .width = 2,
44 };
45
46 static struct resource ixdp425_flash_resource = {
47 .flags = IORESOURCE_MEM,
48 };
49
50 static struct platform_device ixdp425_flash = {
51 .name = "IXP4XX-Flash",
52 .id = 0,
53 .dev = {
54 .platform_data = &ixdp425_flash_data,
55 },
56 .num_resources = 1,
57 .resource = &ixdp425_flash_resource,
58 };
59
60 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
61 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
62
63 const char *part_probes[] = { "cmdlinepart", NULL };
64
65 static struct mtd_partition ixdp425_partitions[] = {
66 {
67 .name = "ixp400 NAND FS 0",
68 .offset = 0,
69 .size = SZ_8M
70 }, {
71 .name = "ixp400 NAND FS 1",
72 .offset = MTDPART_OFS_APPEND,
73 .size = MTDPART_SIZ_FULL
74 },
75 };
76
77 static void
ixdp425_flash_nand_cmd_ctrl(struct mtd_info * mtd,int cmd,unsigned int ctrl)78 ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
79 {
80 struct nand_chip *this = mtd->priv;
81 int offset = (int)this->priv;
82
83 if (ctrl & NAND_CTRL_CHANGE) {
84 if (ctrl & NAND_NCE) {
85 gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_LOW);
86 udelay(5);
87 } else
88 gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_HIGH);
89
90 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
91 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
92 this->priv = (void *)offset;
93 }
94
95 if (cmd != NAND_CMD_NONE)
96 writeb(cmd, this->IO_ADDR_W + offset);
97 }
98
99 static struct platform_nand_data ixdp425_flash_nand_data = {
100 .chip = {
101 .nr_chips = 1,
102 .chip_delay = 30,
103 .options = NAND_NO_AUTOINCR,
104 .part_probe_types = part_probes,
105 .partitions = ixdp425_partitions,
106 .nr_partitions = ARRAY_SIZE(ixdp425_partitions),
107 },
108 .ctrl = {
109 .cmd_ctrl = ixdp425_flash_nand_cmd_ctrl
110 }
111 };
112
113 static struct resource ixdp425_flash_nand_resource = {
114 .flags = IORESOURCE_MEM,
115 };
116
117 static struct platform_device ixdp425_flash_nand = {
118 .name = "gen_nand",
119 .id = -1,
120 .dev = {
121 .platform_data = &ixdp425_flash_nand_data,
122 },
123 .num_resources = 1,
124 .resource = &ixdp425_flash_nand_resource,
125 };
126 #endif /* CONFIG_MTD_NAND_PLATFORM */
127
128 static struct i2c_gpio_platform_data ixdp425_i2c_gpio_data = {
129 .sda_pin = IXDP425_SDA_PIN,
130 .scl_pin = IXDP425_SCL_PIN,
131 };
132
133 static struct platform_device ixdp425_i2c_gpio = {
134 .name = "i2c-gpio",
135 .id = 0,
136 .dev = {
137 .platform_data = &ixdp425_i2c_gpio_data,
138 },
139 };
140
141 static struct resource ixdp425_uart_resources[] = {
142 {
143 .start = IXP4XX_UART1_BASE_PHYS,
144 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
145 .flags = IORESOURCE_MEM
146 },
147 {
148 .start = IXP4XX_UART2_BASE_PHYS,
149 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
150 .flags = IORESOURCE_MEM
151 }
152 };
153
154 static struct plat_serial8250_port ixdp425_uart_data[] = {
155 {
156 .mapbase = IXP4XX_UART1_BASE_PHYS,
157 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
158 .irq = IRQ_IXP4XX_UART1,
159 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
160 .iotype = UPIO_MEM,
161 .regshift = 2,
162 .uartclk = IXP4XX_UART_XTAL,
163 },
164 {
165 .mapbase = IXP4XX_UART2_BASE_PHYS,
166 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
167 .irq = IRQ_IXP4XX_UART2,
168 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
169 .iotype = UPIO_MEM,
170 .regshift = 2,
171 .uartclk = IXP4XX_UART_XTAL,
172 },
173 { },
174 };
175
176 static struct platform_device ixdp425_uart = {
177 .name = "serial8250",
178 .id = PLAT8250_DEV_PLATFORM,
179 .dev.platform_data = ixdp425_uart_data,
180 .num_resources = 2,
181 .resource = ixdp425_uart_resources
182 };
183
184 /* Built-in 10/100 Ethernet MAC interfaces */
185 static struct eth_plat_info ixdp425_plat_eth[] = {
186 {
187 .phy = 0,
188 .rxq = 3,
189 .txreadyq = 20,
190 }, {
191 .phy = 1,
192 .rxq = 4,
193 .txreadyq = 21,
194 }
195 };
196
197 static struct platform_device ixdp425_eth[] = {
198 {
199 .name = "ixp4xx_eth",
200 .id = IXP4XX_ETH_NPEB,
201 .dev.platform_data = ixdp425_plat_eth,
202 }, {
203 .name = "ixp4xx_eth",
204 .id = IXP4XX_ETH_NPEC,
205 .dev.platform_data = ixdp425_plat_eth + 1,
206 }
207 };
208
209 static struct platform_device *ixdp425_devices[] __initdata = {
210 &ixdp425_i2c_gpio,
211 &ixdp425_flash,
212 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
213 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
214 &ixdp425_flash_nand,
215 #endif
216 &ixdp425_uart,
217 &ixdp425_eth[0],
218 &ixdp425_eth[1],
219 };
220
ixdp425_init(void)221 static void __init ixdp425_init(void)
222 {
223 ixp4xx_sys_init();
224
225 ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
226 ixdp425_flash_resource.end =
227 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
228
229 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
230 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
231 ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
232 ixdp425_flash_nand_resource.end = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
233
234 gpio_line_config(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_OUT);
235
236 /* Configure expansion bus for NAND Flash */
237 *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
238 IXP4XX_EXP_BUS_STROBE_T(1) | /* extend by 1 clock */
239 IXP4XX_EXP_BUS_CYCLES(0) | /* Intel cycles */
240 IXP4XX_EXP_BUS_SIZE(0) | /* 512bytes addr space*/
241 IXP4XX_EXP_BUS_WR_EN |
242 IXP4XX_EXP_BUS_BYTE_EN; /* 8 bit data bus */
243 #endif
244
245 if (cpu_is_ixp43x()) {
246 ixdp425_uart.num_resources = 1;
247 ixdp425_uart_data[1].flags = 0;
248 }
249
250 platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
251 }
252
253 #ifdef CONFIG_ARCH_IXDP425
254 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
255 /* Maintainer: MontaVista Software, Inc. */
256 .map_io = ixp4xx_map_io,
257 .init_early = ixp4xx_init_early,
258 .init_irq = ixp4xx_init_irq,
259 .timer = &ixp4xx_timer,
260 .atag_offset = 0x100,
261 .init_machine = ixdp425_init,
262 #if defined(CONFIG_PCI)
263 .dma_zone_size = SZ_64M,
264 #endif
265 .restart = ixp4xx_restart,
266 MACHINE_END
267 #endif
268
269 #ifdef CONFIG_MACH_IXDP465
270 MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
271 /* Maintainer: MontaVista Software, Inc. */
272 .map_io = ixp4xx_map_io,
273 .init_early = ixp4xx_init_early,
274 .init_irq = ixp4xx_init_irq,
275 .timer = &ixp4xx_timer,
276 .atag_offset = 0x100,
277 .init_machine = ixdp425_init,
278 #if defined(CONFIG_PCI)
279 .dma_zone_size = SZ_64M,
280 #endif
281 MACHINE_END
282 #endif
283
284 #ifdef CONFIG_ARCH_PRPMC1100
285 MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
286 /* Maintainer: MontaVista Software, Inc. */
287 .map_io = ixp4xx_map_io,
288 .init_early = ixp4xx_init_early,
289 .init_irq = ixp4xx_init_irq,
290 .timer = &ixp4xx_timer,
291 .atag_offset = 0x100,
292 .init_machine = ixdp425_init,
293 #if defined(CONFIG_PCI)
294 .dma_zone_size = SZ_64M,
295 #endif
296 MACHINE_END
297 #endif
298
299 #ifdef CONFIG_MACH_KIXRP435
300 MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
301 /* Maintainer: MontaVista Software, Inc. */
302 .map_io = ixp4xx_map_io,
303 .init_early = ixp4xx_init_early,
304 .init_irq = ixp4xx_init_irq,
305 .timer = &ixp4xx_timer,
306 .atag_offset = 0x100,
307 .init_machine = ixdp425_init,
308 #if defined(CONFIG_PCI)
309 .dma_zone_size = SZ_64M,
310 #endif
311 MACHINE_END
312 #endif
313