1 /* 2 * linux/include/asm-i386/timex.h 3 * 4 * i386 architecture timex specifications 5 */ 6 #ifndef _ASMi386_TIMEX_H 7 #define _ASMi386_TIMEX_H 8 9 #include <linux/config.h> 10 #include <asm/msr.h> 11 12 #ifdef CONFIG_MELAN 13 # define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */ 14 #else 15 # define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ 16 #endif 17 18 #define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */ 19 #define FINETUNE ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \ 20 (1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \ 21 << (SHIFT_SCALE-SHIFT_HZ)) / HZ) 22 23 /* 24 * Standard way to access the cycle counter on i586+ CPUs. 25 * Currently only used on SMP. 26 * 27 * If you really have a SMP machine with i486 chips or older, 28 * compile for that, and this will just always return zero. 29 * That's ok, it just means that the nicer scheduling heuristics 30 * won't work for you. 31 * 32 * We only use the low 32 bits, and we'd simply better make sure 33 * that we reschedule before that wraps. Scheduling at least every 34 * four billion cycles just basically sounds like a good idea, 35 * regardless of how fast the machine is. 36 */ 37 typedef unsigned long long cycles_t; 38 39 extern cycles_t cacheflush_time; 40 get_cycles(void)41static inline cycles_t get_cycles (void) 42 { 43 #ifndef CONFIG_X86_TSC 44 return 0; 45 #else 46 unsigned long long ret; 47 48 rdtscll(ret); 49 return ret; 50 #endif 51 } 52 53 extern unsigned long cpu_khz; 54 55 #define vxtime_lock() do {} while (0) 56 #define vxtime_unlock() do {} while (0) 57 58 #endif 59