1 /* gamma.c -- 3dlabs GMX 2000 driver -*- linux-c -*- 2 * Created: Mon Jan 4 08:58:31 1999 by gareth@valinux.com 3 * 4 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 5 * All Rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the next 15 * paragraph) shall be included in all copies or substantial portions of the 16 * Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 24 * DEALINGS IN THE SOFTWARE. 25 * 26 * Authors: 27 * Gareth Hughes <gareth@valinux.com> 28 */ 29 30 #ifndef __GAMMA_H__ 31 #define __GAMMA_H__ 32 33 /* This remains constant for all DRM template files. 34 */ 35 #define DRM(x) gamma_##x 36 37 /* General customization: 38 */ 39 #define __HAVE_MTRR 1 40 41 #define DRIVER_AUTHOR "VA Linux Systems Inc." 42 43 #define DRIVER_NAME "gamma" 44 #define DRIVER_DESC "3DLabs gamma" 45 #define DRIVER_DATE "20010624" 46 47 #define DRIVER_MAJOR 2 48 #define DRIVER_MINOR 0 49 #define DRIVER_PATCHLEVEL 0 50 51 #define DRIVER_IOCTLS \ 52 [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { gamma_dma, 1, 0 }, \ 53 [DRM_IOCTL_NR(DRM_IOCTL_GAMMA_INIT)] = { gamma_dma_init, 1, 1 }, \ 54 [DRM_IOCTL_NR(DRM_IOCTL_GAMMA_COPY)] = { gamma_dma_copy, 1, 1 } 55 56 #define IOCTL_TABLE_NAME DRM(ioctls) 57 #define IOCTL_FUNC_NAME DRM(ioctl) 58 59 #define __HAVE_COUNTERS 5 60 #define __HAVE_COUNTER6 _DRM_STAT_IRQ 61 #define __HAVE_COUNTER7 _DRM_STAT_DMA 62 #define __HAVE_COUNTER8 _DRM_STAT_PRIMARY 63 #define __HAVE_COUNTER9 _DRM_STAT_SPECIAL 64 #define __HAVE_COUNTER10 _DRM_STAT_MISSED 65 66 /* DMA customization: 67 */ 68 #define __HAVE_DMA 1 69 #define __HAVE_AGP 1 70 #define __MUST_HAVE_AGP 0 71 #define __HAVE_OLD_DMA 1 72 #define __HAVE_PCI_DMA 1 73 74 #define __HAVE_MULTIPLE_DMA_QUEUES 1 75 #define __HAVE_DMA_WAITQUEUE 1 76 77 #define __HAVE_DMA_WAITLIST 1 78 #define __HAVE_DMA_FREELIST 1 79 80 #define __HAVE_DMA_FLUSH 1 81 #define __HAVE_DMA_SCHEDULE 1 82 83 #define __HAVE_DMA_READY 1 84 #define DRIVER_DMA_READY() do { \ 85 gamma_dma_ready(dev); \ 86 } while (0) 87 88 #define __HAVE_DMA_QUIESCENT 1 89 #define DRIVER_DMA_QUIESCENT() do { \ 90 /* FIXME ! */ \ 91 gamma_dma_quiescent_single(dev); \ 92 return 0; \ 93 } while (0) 94 95 #define __HAVE_DMA_IRQ 1 96 #define __HAVE_DMA_IRQ_BH 1 97 98 #if 1 99 #define DRIVER_PREINSTALL() do { \ 100 drm_gamma_private_t *dev_priv = \ 101 (drm_gamma_private_t *)dev->dev_private;\ 102 while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ 103 GAMMA_WRITE( GAMMA_GCOMMANDMODE, 0x00000004 ); \ 104 GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 ); \ 105 } while (0) 106 #define DRIVER_POSTINSTALL() do { \ 107 drm_gamma_private_t *dev_priv = \ 108 (drm_gamma_private_t *)dev->dev_private;\ 109 while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ 110 while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3) cpu_relax(); \ 111 GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002001 ); \ 112 GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000008 ); \ 113 GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00039090 ); \ 114 } while (0) 115 #else 116 #define DRIVER_POSTINSTALL() do { \ 117 drm_gamma_private_t *dev_priv = \ 118 (drm_gamma_private_t *)dev->dev_private;\ 119 while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ 120 while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ 121 GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002000 ); \ 122 GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000004 ); \ 123 } while (0) 124 125 #define DRIVER_PREINSTALL() do { \ 126 drm_gamma_private_t *dev_priv = \ 127 (drm_gamma_private_t *)dev->dev_private;\ 128 while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ 129 while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ 130 GAMMA_WRITE( GAMMA_GCOMMANDMODE, GAMMA_QUEUED_DMA_MODE );\ 131 GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 );\ 132 } while (0) 133 #endif 134 135 #define DRIVER_UNINSTALL() do { \ 136 drm_gamma_private_t *dev_priv = \ 137 (drm_gamma_private_t *)dev->dev_private;\ 138 while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2) cpu_relax(); \ 139 while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3) cpu_relax(); \ 140 GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00000000 ); \ 141 GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000000 ); \ 142 GAMMA_WRITE( GAMMA_GINTENABLE, 0x00000000 ); \ 143 } while (0) 144 145 #define DRIVER_AGP_BUFFERS_MAP( dev ) \ 146 ((drm_gamma_private_t *)((dev)->dev_private))->buffers 147 148 #endif /* __GAMMA_H__ */ 149