1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2019 Mellanox Technologies. */
3 
4 #ifndef __MLX5_EN_PARAMS_H__
5 #define __MLX5_EN_PARAMS_H__
6 
7 #include "en.h"
8 
9 struct mlx5e_xsk_param {
10 	u16 headroom;
11 	u16 chunk_size;
12 	bool unaligned;
13 };
14 
15 struct mlx5e_cq_param {
16 	u32                        cqc[MLX5_ST_SZ_DW(cqc)];
17 	struct mlx5_wq_param       wq;
18 	u16                        eq_ix;
19 	u8                         cq_period_mode;
20 };
21 
22 struct mlx5e_rq_param {
23 	struct mlx5e_cq_param      cqp;
24 	u32                        rqc[MLX5_ST_SZ_DW(rqc)];
25 	struct mlx5_wq_param       wq;
26 	struct mlx5e_rq_frags_info frags_info;
27 	u32                        xdp_frag_size;
28 };
29 
30 struct mlx5e_sq_param {
31 	struct mlx5e_cq_param      cqp;
32 	u32                        sqc[MLX5_ST_SZ_DW(sqc)];
33 	struct mlx5_wq_param       wq;
34 	bool                       is_mpw;
35 	bool                       is_tls;
36 	bool                       is_xdp_mb;
37 	u16                        stop_room;
38 };
39 
40 struct mlx5e_channel_param {
41 	struct mlx5e_rq_param      rq;
42 	struct mlx5e_sq_param      txq_sq;
43 	struct mlx5e_sq_param      xdp_sq;
44 	struct mlx5e_sq_param      icosq;
45 	struct mlx5e_sq_param      async_icosq;
46 };
47 
48 struct mlx5e_create_sq_param {
49 	struct mlx5_wq_ctrl        *wq_ctrl;
50 	u32                         cqn;
51 	u32                         ts_cqe_to_dest_cqn;
52 	u32                         tisn;
53 	u8                          tis_lst_sz;
54 	u8                          min_inline_mode;
55 };
56 
57 /* Striding RQ dynamic parameters */
58 
59 u8 mlx5e_mpwrq_page_shift(struct mlx5_core_dev *mdev, struct mlx5e_xsk_param *xsk);
60 enum mlx5e_mpwrq_umr_mode
61 mlx5e_mpwrq_umr_mode(struct mlx5_core_dev *mdev, struct mlx5e_xsk_param *xsk);
62 u8 mlx5e_mpwrq_umr_entry_size(enum mlx5e_mpwrq_umr_mode mode);
63 u8 mlx5e_mpwrq_log_wqe_sz(struct mlx5_core_dev *mdev, u8 page_shift,
64 			  enum mlx5e_mpwrq_umr_mode umr_mode);
65 u8 mlx5e_mpwrq_pages_per_wqe(struct mlx5_core_dev *mdev, u8 page_shift,
66 			     enum mlx5e_mpwrq_umr_mode umr_mode);
67 u16 mlx5e_mpwrq_umr_wqe_sz(struct mlx5_core_dev *mdev, u8 page_shift,
68 			   enum mlx5e_mpwrq_umr_mode umr_mode);
69 u8 mlx5e_mpwrq_umr_wqebbs(struct mlx5_core_dev *mdev, u8 page_shift,
70 			  enum mlx5e_mpwrq_umr_mode umr_mode);
71 u8 mlx5e_mpwrq_mtts_per_wqe(struct mlx5_core_dev *mdev, u8 page_shift,
72 			    enum mlx5e_mpwrq_umr_mode umr_mode);
73 u32 mlx5e_mpwrq_max_num_entries(struct mlx5_core_dev *mdev,
74 				enum mlx5e_mpwrq_umr_mode umr_mode);
75 u8 mlx5e_mpwrq_max_log_rq_pkts(struct mlx5_core_dev *mdev, u8 page_shift,
76 			       enum mlx5e_mpwrq_umr_mode umr_mode);
77 
78 /* Parameter calculations */
79 
80 void mlx5e_reset_tx_moderation(struct mlx5e_params *params, u8 cq_period_mode);
81 void mlx5e_reset_rx_moderation(struct mlx5e_params *params, u8 cq_period_mode);
82 void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode);
83 void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode);
84 
85 bool slow_pci_heuristic(struct mlx5_core_dev *mdev);
86 int mlx5e_mpwrq_validate_regular(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
87 int mlx5e_mpwrq_validate_xsk(struct mlx5_core_dev *mdev, struct mlx5e_params *params,
88 			     struct mlx5e_xsk_param *xsk);
89 void mlx5e_build_rq_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
90 void mlx5e_set_rq_type(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
91 void mlx5e_init_rq_type_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
92 
93 u16 mlx5e_get_linear_rq_headroom(struct mlx5e_params *params,
94 				 struct mlx5e_xsk_param *xsk);
95 bool mlx5e_rx_is_linear_skb(struct mlx5_core_dev *mdev,
96 			    struct mlx5e_params *params,
97 			    struct mlx5e_xsk_param *xsk);
98 bool mlx5e_rx_mpwqe_is_linear_skb(struct mlx5_core_dev *mdev,
99 				  struct mlx5e_params *params,
100 				  struct mlx5e_xsk_param *xsk);
101 u8 mlx5e_mpwqe_get_log_rq_size(struct mlx5_core_dev *mdev,
102 			       struct mlx5e_params *params,
103 			       struct mlx5e_xsk_param *xsk);
104 u8 mlx5e_shampo_get_log_hd_entry_size(struct mlx5_core_dev *mdev,
105 				      struct mlx5e_params *params);
106 u8 mlx5e_shampo_get_log_rsrv_size(struct mlx5_core_dev *mdev,
107 				  struct mlx5e_params *params);
108 u8 mlx5e_shampo_get_log_pkt_per_rsrv(struct mlx5_core_dev *mdev,
109 				     struct mlx5e_params *params);
110 u32 mlx5e_shampo_hd_per_wqe(struct mlx5_core_dev *mdev,
111 			    struct mlx5e_params *params,
112 			    struct mlx5e_rq_param *rq_param);
113 u32 mlx5e_shampo_hd_per_wq(struct mlx5_core_dev *mdev,
114 			   struct mlx5e_params *params,
115 			   struct mlx5e_rq_param *rq_param);
116 u8 mlx5e_mpwqe_get_log_stride_size(struct mlx5_core_dev *mdev,
117 				   struct mlx5e_params *params,
118 				   struct mlx5e_xsk_param *xsk);
119 u8 mlx5e_mpwqe_get_log_num_strides(struct mlx5_core_dev *mdev,
120 				   struct mlx5e_params *params,
121 				   struct mlx5e_xsk_param *xsk);
122 u8 mlx5e_mpwqe_get_min_wqe_bulk(unsigned int wq_sz);
123 u16 mlx5e_get_rq_headroom(struct mlx5_core_dev *mdev,
124 			  struct mlx5e_params *params,
125 			  struct mlx5e_xsk_param *xsk);
126 
127 /* Build queue parameters */
128 
129 void mlx5e_build_create_cq_param(struct mlx5e_create_cq_param *ccp, struct mlx5e_channel *c);
130 int mlx5e_build_rq_param(struct mlx5_core_dev *mdev,
131 			 struct mlx5e_params *params,
132 			 struct mlx5e_xsk_param *xsk,
133 			 u16 q_counter,
134 			 struct mlx5e_rq_param *param);
135 void mlx5e_build_drop_rq_param(struct mlx5_core_dev *mdev,
136 			       u16 q_counter,
137 			       struct mlx5e_rq_param *param);
138 void mlx5e_build_sq_param_common(struct mlx5_core_dev *mdev,
139 				 struct mlx5e_sq_param *param);
140 void mlx5e_build_sq_param(struct mlx5_core_dev *mdev,
141 			  struct mlx5e_params *params,
142 			  struct mlx5e_sq_param *param);
143 void mlx5e_build_tx_cq_param(struct mlx5_core_dev *mdev,
144 			     struct mlx5e_params *params,
145 			     struct mlx5e_cq_param *param);
146 void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev,
147 			     struct mlx5e_params *params,
148 			     struct mlx5e_xsk_param *xsk,
149 			     struct mlx5e_sq_param *param);
150 int mlx5e_build_channel_param(struct mlx5_core_dev *mdev,
151 			      struct mlx5e_params *params,
152 			      u16 q_counter,
153 			      struct mlx5e_channel_param *cparam);
154 
155 u16 mlx5e_calc_sq_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
156 int mlx5e_validate_params(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
157 bool mlx5e_verify_params_rx_mpwqe_strides(struct mlx5_core_dev *mdev,
158 					  struct mlx5e_params *params,
159 					  struct mlx5e_xsk_param *xsk);
160 
mlx5e_params_print_info(struct mlx5_core_dev * mdev,struct mlx5e_params * params)161 static inline void mlx5e_params_print_info(struct mlx5_core_dev *mdev,
162 					   struct mlx5e_params *params)
163 {
164 	mlx5_core_info(mdev, "MLX5E: StrdRq(%d) RqSz(%ld) StrdSz(%ld) RxCqeCmprss(%d %s)\n",
165 		       params->rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ,
166 		       params->rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ ?
167 		       BIT(mlx5e_mpwqe_get_log_rq_size(mdev, params, NULL)) :
168 		       BIT(params->log_rq_mtu_frames),
169 		       BIT(mlx5e_mpwqe_get_log_stride_size(mdev, params, NULL)),
170 		       MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_CQE_COMPRESS),
171 		       MLX5_CAP_GEN(mdev, enhanced_cqe_compression) ?
172 				       "enhanced" : "basic");
173 };
174 
175 #endif /* __MLX5_EN_PARAMS_H__ */
176