1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (c) 2013 Broadcom
4 * Copyright (C) 2020 Rafał Miłecki <rafal@milecki.pl>
5 */
6
7 #include <dt-bindings/soc/bcm-pmb.h>
8 #include <linux/io.h>
9 #include <linux/module.h>
10 #include <linux/of.h>
11 #include <linux/of_device.h>
12 #include <linux/platform_device.h>
13 #include <linux/pm_domain.h>
14 #include <linux/reset/bcm63xx_pmb.h>
15
16 #define BPCM_ID_REG 0x00
17 #define BPCM_CAPABILITIES 0x04
18 #define BPCM_CAP_NUM_ZONES 0x000000ff
19 #define BPCM_CAP_SR_REG_BITS 0x0000ff00
20 #define BPCM_CAP_PLLTYPE 0x00030000
21 #define BPCM_CAP_UBUS 0x00080000
22 #define BPCM_CONTROL 0x08
23 #define BPCM_STATUS 0x0c
24 #define BPCM_ROSC_CONTROL 0x10
25 #define BPCM_ROSC_THRESH_H 0x14
26 #define BPCM_ROSC_THRESHOLD_BCM6838 0x14
27 #define BPCM_ROSC_THRESH_S 0x18
28 #define BPCM_ROSC_COUNT_BCM6838 0x18
29 #define BPCM_ROSC_COUNT 0x1c
30 #define BPCM_PWD_CONTROL_BCM6838 0x1c
31 #define BPCM_PWD_CONTROL 0x20
32 #define BPCM_SR_CONTROL_BCM6838 0x20
33 #define BPCM_PWD_ACCUM_CONTROL 0x24
34 #define BPCM_SR_CONTROL 0x28
35 #define BPCM_GLOBAL_CONTROL 0x2c
36 #define BPCM_MISC_CONTROL 0x30
37 #define BPCM_MISC_CONTROL2 0x34
38 #define BPCM_SGPHY_CNTL 0x38
39 #define BPCM_SGPHY_STATUS 0x3c
40 #define BPCM_ZONE0 0x40
41 #define BPCM_ZONE_CONTROL 0x00
42 #define BPCM_ZONE_CONTROL_MANUAL_CLK_EN 0x00000001
43 #define BPCM_ZONE_CONTROL_MANUAL_RESET_CTL 0x00000002
44 #define BPCM_ZONE_CONTROL_FREQ_SCALE_USED 0x00000004 /* R/O */
45 #define BPCM_ZONE_CONTROL_DPG_CAPABLE 0x00000008 /* R/O */
46 #define BPCM_ZONE_CONTROL_MANUAL_MEM_PWR 0x00000030
47 #define BPCM_ZONE_CONTROL_MANUAL_ISO_CTL 0x00000040
48 #define BPCM_ZONE_CONTROL_MANUAL_CTL 0x00000080
49 #define BPCM_ZONE_CONTROL_DPG_CTL_EN 0x00000100
50 #define BPCM_ZONE_CONTROL_PWR_DN_REQ 0x00000200
51 #define BPCM_ZONE_CONTROL_PWR_UP_REQ 0x00000400
52 #define BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN 0x00000800
53 #define BPCM_ZONE_CONTROL_BLK_RESET_ASSERT 0x00001000
54 #define BPCM_ZONE_CONTROL_MEM_STBY 0x00002000
55 #define BPCM_ZONE_CONTROL_RESERVED 0x0007c000
56 #define BPCM_ZONE_CONTROL_PWR_CNTL_STATE 0x00f80000
57 #define BPCM_ZONE_CONTROL_FREQ_SCALAR_DYN_SEL 0x01000000 /* R/O */
58 #define BPCM_ZONE_CONTROL_PWR_OFF_STATE 0x02000000 /* R/O */
59 #define BPCM_ZONE_CONTROL_PWR_ON_STATE 0x04000000 /* R/O */
60 #define BPCM_ZONE_CONTROL_PWR_GOOD 0x08000000 /* R/O */
61 #define BPCM_ZONE_CONTROL_DPG_PWR_STATE 0x10000000 /* R/O */
62 #define BPCM_ZONE_CONTROL_MEM_PWR_STATE 0x20000000 /* R/O */
63 #define BPCM_ZONE_CONTROL_ISO_STATE 0x40000000 /* R/O */
64 #define BPCM_ZONE_CONTROL_RESET_STATE 0x80000000 /* R/O */
65 #define BPCM_ZONE_CONFIG1 0x04
66 #define BPCM_ZONE_CONFIG2 0x08
67 #define BPCM_ZONE_FREQ_SCALAR_CONTROL 0x0c
68 #define BPCM_ZONE_SIZE 0x10
69
70 struct bcm_pmb {
71 struct device *dev;
72 void __iomem *base;
73 spinlock_t lock;
74 bool little_endian;
75 struct genpd_onecell_data genpd_onecell_data;
76 };
77
78 struct bcm_pmb_pd_data {
79 const char * const name;
80 int id;
81 u8 bus;
82 u8 device;
83 };
84
85 struct bcm_pmb_pm_domain {
86 struct bcm_pmb *pmb;
87 const struct bcm_pmb_pd_data *data;
88 struct generic_pm_domain genpd;
89 };
90
bcm_pmb_bpcm_read(struct bcm_pmb * pmb,int bus,u8 device,int offset,u32 * val)91 static int bcm_pmb_bpcm_read(struct bcm_pmb *pmb, int bus, u8 device,
92 int offset, u32 *val)
93 {
94 void __iomem *base = pmb->base + bus * 0x20;
95 unsigned long flags;
96 int err;
97
98 spin_lock_irqsave(&pmb->lock, flags);
99 err = bpcm_rd(base, device, offset, val);
100 spin_unlock_irqrestore(&pmb->lock, flags);
101
102 if (!err)
103 *val = pmb->little_endian ? le32_to_cpu(*val) : be32_to_cpu(*val);
104
105 return err;
106 }
107
bcm_pmb_bpcm_write(struct bcm_pmb * pmb,int bus,u8 device,int offset,u32 val)108 static int bcm_pmb_bpcm_write(struct bcm_pmb *pmb, int bus, u8 device,
109 int offset, u32 val)
110 {
111 void __iomem *base = pmb->base + bus * 0x20;
112 unsigned long flags;
113 int err;
114
115 val = pmb->little_endian ? cpu_to_le32(val) : cpu_to_be32(val);
116
117 spin_lock_irqsave(&pmb->lock, flags);
118 err = bpcm_wr(base, device, offset, val);
119 spin_unlock_irqrestore(&pmb->lock, flags);
120
121 return err;
122 }
123
bcm_pmb_power_off_zone(struct bcm_pmb * pmb,int bus,u8 device,int zone)124 static int bcm_pmb_power_off_zone(struct bcm_pmb *pmb, int bus, u8 device,
125 int zone)
126 {
127 int offset;
128 u32 val;
129 int err;
130
131 offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL;
132
133 err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
134 if (err)
135 return err;
136
137 val |= BPCM_ZONE_CONTROL_PWR_DN_REQ;
138 val &= ~BPCM_ZONE_CONTROL_PWR_UP_REQ;
139
140 err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
141
142 return err;
143 }
144
bcm_pmb_power_on_zone(struct bcm_pmb * pmb,int bus,u8 device,int zone)145 static int bcm_pmb_power_on_zone(struct bcm_pmb *pmb, int bus, u8 device,
146 int zone)
147 {
148 int offset;
149 u32 val;
150 int err;
151
152 offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL;
153
154 err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
155 if (err)
156 return err;
157
158 if (!(val & BPCM_ZONE_CONTROL_PWR_ON_STATE)) {
159 val &= ~BPCM_ZONE_CONTROL_PWR_DN_REQ;
160 val |= BPCM_ZONE_CONTROL_DPG_CTL_EN;
161 val |= BPCM_ZONE_CONTROL_PWR_UP_REQ;
162 val |= BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN;
163 val |= BPCM_ZONE_CONTROL_BLK_RESET_ASSERT;
164
165 err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
166 }
167
168 return err;
169 }
170
bcm_pmb_power_off_device(struct bcm_pmb * pmb,int bus,u8 device)171 static int bcm_pmb_power_off_device(struct bcm_pmb *pmb, int bus, u8 device)
172 {
173 int offset;
174 u32 val;
175 int err;
176
177 /* Entire device can be powered off by powering off the 0th zone */
178 offset = BPCM_ZONE0 + BPCM_ZONE_CONTROL;
179
180 err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
181 if (err)
182 return err;
183
184 if (!(val & BPCM_ZONE_CONTROL_PWR_OFF_STATE)) {
185 val = BPCM_ZONE_CONTROL_PWR_DN_REQ;
186
187 err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
188 }
189
190 return err;
191 }
192
bcm_pmb_power_on_device(struct bcm_pmb * pmb,int bus,u8 device)193 static int bcm_pmb_power_on_device(struct bcm_pmb *pmb, int bus, u8 device)
194 {
195 u32 val;
196 int err;
197 int i;
198
199 err = bcm_pmb_bpcm_read(pmb, bus, device, BPCM_CAPABILITIES, &val);
200 if (err)
201 return err;
202
203 for (i = 0; i < (val & BPCM_CAP_NUM_ZONES); i++) {
204 err = bcm_pmb_power_on_zone(pmb, bus, device, i);
205 if (err)
206 return err;
207 }
208
209 return err;
210 }
211
bcm_pmb_power_on_sata(struct bcm_pmb * pmb,int bus,u8 device)212 static int bcm_pmb_power_on_sata(struct bcm_pmb *pmb, int bus, u8 device)
213 {
214 int err;
215
216 err = bcm_pmb_power_on_zone(pmb, bus, device, 0);
217 if (err)
218 return err;
219
220 /* Does not apply to the BCM963158 */
221 err = bcm_pmb_bpcm_write(pmb, bus, device, BPCM_MISC_CONTROL, 0);
222 if (err)
223 return err;
224
225 err = bcm_pmb_bpcm_write(pmb, bus, device, BPCM_SR_CONTROL, 0xffffffff);
226 if (err)
227 return err;
228
229 err = bcm_pmb_bpcm_write(pmb, bus, device, BPCM_SR_CONTROL, 0);
230
231 return err;
232 }
233
bcm_pmb_power_on(struct generic_pm_domain * genpd)234 static int bcm_pmb_power_on(struct generic_pm_domain *genpd)
235 {
236 struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd);
237 const struct bcm_pmb_pd_data *data = pd->data;
238 struct bcm_pmb *pmb = pd->pmb;
239
240 switch (data->id) {
241 case BCM_PMB_PCIE0:
242 case BCM_PMB_PCIE1:
243 case BCM_PMB_PCIE2:
244 return bcm_pmb_power_on_zone(pmb, data->bus, data->device, 0);
245 case BCM_PMB_HOST_USB:
246 return bcm_pmb_power_on_device(pmb, data->bus, data->device);
247 case BCM_PMB_SATA:
248 return bcm_pmb_power_on_sata(pmb, data->bus, data->device);
249 default:
250 dev_err(pmb->dev, "unsupported device id: %d\n", data->id);
251 return -EINVAL;
252 }
253 }
254
bcm_pmb_power_off(struct generic_pm_domain * genpd)255 static int bcm_pmb_power_off(struct generic_pm_domain *genpd)
256 {
257 struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd);
258 const struct bcm_pmb_pd_data *data = pd->data;
259 struct bcm_pmb *pmb = pd->pmb;
260
261 switch (data->id) {
262 case BCM_PMB_PCIE0:
263 case BCM_PMB_PCIE1:
264 case BCM_PMB_PCIE2:
265 return bcm_pmb_power_off_zone(pmb, data->bus, data->device, 0);
266 case BCM_PMB_HOST_USB:
267 return bcm_pmb_power_off_device(pmb, data->bus, data->device);
268 default:
269 dev_err(pmb->dev, "unsupported device id: %d\n", data->id);
270 return -EINVAL;
271 }
272 }
273
bcm_pmb_probe(struct platform_device * pdev)274 static int bcm_pmb_probe(struct platform_device *pdev)
275 {
276 struct device *dev = &pdev->dev;
277 const struct bcm_pmb_pd_data *table;
278 const struct bcm_pmb_pd_data *e;
279 struct bcm_pmb *pmb;
280 int max_id;
281 int err;
282
283 pmb = devm_kzalloc(dev, sizeof(*pmb), GFP_KERNEL);
284 if (!pmb)
285 return -ENOMEM;
286
287 pmb->dev = dev;
288
289 pmb->base = devm_platform_ioremap_resource(pdev, 0);
290 if (IS_ERR(pmb->base))
291 return PTR_ERR(pmb->base);
292
293 spin_lock_init(&pmb->lock);
294
295 pmb->little_endian = !of_device_is_big_endian(dev->of_node);
296
297 table = of_device_get_match_data(dev);
298 if (!table)
299 return -EINVAL;
300
301 max_id = 0;
302 for (e = table; e->name; e++)
303 max_id = max(max_id, e->id);
304
305 pmb->genpd_onecell_data.num_domains = max_id + 1;
306 pmb->genpd_onecell_data.domains =
307 devm_kcalloc(dev, pmb->genpd_onecell_data.num_domains,
308 sizeof(struct generic_pm_domain *), GFP_KERNEL);
309 if (!pmb->genpd_onecell_data.domains)
310 return -ENOMEM;
311
312 for (e = table; e->name; e++) {
313 struct bcm_pmb_pm_domain *pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
314
315 if (!pd)
316 return -ENOMEM;
317
318 pd->pmb = pmb;
319 pd->data = e;
320 pd->genpd.name = e->name;
321 pd->genpd.power_on = bcm_pmb_power_on;
322 pd->genpd.power_off = bcm_pmb_power_off;
323
324 pm_genpd_init(&pd->genpd, NULL, true);
325 pmb->genpd_onecell_data.domains[e->id] = &pd->genpd;
326 }
327
328 err = of_genpd_add_provider_onecell(dev->of_node, &pmb->genpd_onecell_data);
329 if (err) {
330 dev_err(dev, "failed to add genpd provider: %d\n", err);
331 return err;
332 }
333
334 return 0;
335 }
336
337 static const struct bcm_pmb_pd_data bcm_pmb_bcm4908_data[] = {
338 { .name = "pcie2", .id = BCM_PMB_PCIE2, .bus = 0, .device = 2, },
339 { .name = "pcie0", .id = BCM_PMB_PCIE0, .bus = 1, .device = 14, },
340 { .name = "pcie1", .id = BCM_PMB_PCIE1, .bus = 1, .device = 15, },
341 { .name = "usb", .id = BCM_PMB_HOST_USB, .bus = 1, .device = 17, },
342 { },
343 };
344
345 static const struct bcm_pmb_pd_data bcm_pmb_bcm63138_data[] = {
346 { .name = "sata", .id = BCM_PMB_SATA, .bus = 0, .device = 3, },
347 { },
348 };
349
350 static const struct of_device_id bcm_pmb_of_match[] = {
351 { .compatible = "brcm,bcm4908-pmb", .data = &bcm_pmb_bcm4908_data, },
352 { .compatible = "brcm,bcm63138-pmb", .data = &bcm_pmb_bcm63138_data, },
353 { },
354 };
355
356 static struct platform_driver bcm_pmb_driver = {
357 .driver = {
358 .name = "bcm-pmb",
359 .of_match_table = bcm_pmb_of_match,
360 },
361 .probe = bcm_pmb_probe,
362 };
363
364 builtin_platform_driver(bcm_pmb_driver);
365