1# SPDX-License-Identifier: GPL-2.0-only
2#
3# Phy drivers for Qualcomm and Atheros platforms
4#
5config PHY_ATH79_USB
6	tristate "Atheros AR71XX/9XXX USB PHY driver"
7	depends on OF && (ATH79 || COMPILE_TEST)
8	default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM
9	select RESET_CONTROLLER
10	select GENERIC_PHY
11	help
12	  Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
13
14config PHY_QCOM_APQ8064_SATA
15	tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
16	depends on ARCH_QCOM
17	depends on HAS_IOMEM
18	depends on OF
19	select GENERIC_PHY
20
21config PHY_QCOM_EDP
22	tristate "Qualcomm eDP PHY driver"
23	depends on ARCH_QCOM || COMPILE_TEST
24	depends on OF
25	depends on COMMON_CLK
26	select GENERIC_PHY
27	help
28	  Enable this driver to support the Qualcomm eDP PHY found in various
29	  Qualcomm chipsets.
30
31config PHY_QCOM_IPQ4019_USB
32	tristate "Qualcomm IPQ4019 USB PHY driver"
33	depends on OF && (ARCH_QCOM || COMPILE_TEST)
34	select GENERIC_PHY
35	help
36	  Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
37
38config PHY_QCOM_IPQ806X_SATA
39	tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
40	depends on ARCH_QCOM
41	depends on HAS_IOMEM
42	depends on OF
43	select GENERIC_PHY
44
45config PHY_QCOM_PCIE2
46	tristate "Qualcomm PCIe Gen2 PHY Driver"
47	depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
48	select GENERIC_PHY
49	help
50	  Enable this to support the Qualcomm PCIe PHY, used with the Synopsys
51	  based PCIe controller.
52
53config PHY_QCOM_QMP
54	tristate "Qualcomm QMP PHY Driver"
55	depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
56	select GENERIC_PHY
57	help
58	  Enable this to support the QMP PHY transceiver that is used
59	  with controllers such as PCIe, UFS, and USB on Qualcomm chips.
60
61config PHY_QCOM_QUSB2
62	tristate "Qualcomm QUSB2 PHY Driver"
63	depends on OF && (ARCH_QCOM || COMPILE_TEST)
64	depends on NVMEM || !NVMEM
65	select GENERIC_PHY
66	help
67	  Enable this to support the HighSpeed QUSB2 PHY transceiver for USB
68	  controllers on Qualcomm chips. This driver supports the high-speed
69	  PHY which is usually paired with either the ChipIdea or Synopsys DWC3
70	  USB IPs on MSM SOCs.
71
72config PHY_QCOM_USB_HS
73	tristate "Qualcomm USB HS PHY module"
74	depends on USB_ULPI_BUS
75	depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
76	select GENERIC_PHY
77	help
78	  Support for the USB high-speed ULPI compliant phy on Qualcomm
79	  chipsets.
80
81config PHY_QCOM_USB_SNPS_FEMTO_V2
82	tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module"
83	depends on OF && (ARCH_QCOM || COMPILE_TEST)
84	select GENERIC_PHY
85	help
86	  Enable support for the USB high-speed SNPS Femto phy on Qualcomm
87	  chipsets.  This PHY has differences in the register map compared
88	  to the V1 variants.  The PHY is paired with a Synopsys DWC3 USB
89	  controller on Qualcomm SOCs.
90
91config PHY_QCOM_USB_HSIC
92	tristate "Qualcomm USB HSIC ULPI PHY module"
93	depends on USB_ULPI_BUS
94	select GENERIC_PHY
95	help
96	  Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
97
98config PHY_QCOM_USB_HS_28NM
99	tristate "Qualcomm 28nm High-Speed PHY"
100	depends on OF && (ARCH_QCOM || COMPILE_TEST)
101	depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
102	select GENERIC_PHY
103	help
104	  Enable this to support the Qualcomm Synopsys DesignWare Core 28nm
105	  High-Speed PHY driver. This driver supports the Hi-Speed PHY which
106	  is usually paired with either the ChipIdea or Synopsys DWC3 USB
107	  IPs on MSM SOCs.
108
109config PHY_QCOM_USB_SS
110	tristate "Qualcomm USB Super-Speed PHY driver"
111	depends on OF && (ARCH_QCOM || COMPILE_TEST)
112	depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
113	select GENERIC_PHY
114	help
115	  Enable this to support the Super-Speed USB transceiver on various
116	  Qualcomm chipsets.
117
118config PHY_QCOM_IPQ806X_USB
119	tristate "Qualcomm IPQ806x DWC3 USB PHY driver"
120	depends on HAS_IOMEM
121	depends on OF && (ARCH_QCOM || COMPILE_TEST)
122	select GENERIC_PHY
123	help
124	  This option enables support for the Synopsis PHYs present inside the
125	  Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports
126	  both HS and SS PHY controllers.
127