1 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */
2 /*
3 Copyright (c) 2001, 2002 by D-Link Corporation
4 Copyright (c) 2003 by Alpha Networks
5 Written by Edward Peng.<edward_peng@alphanetworks.com>
6 Created 03-May-2001, base on Linux' sundance.c.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12 */
13 /*
14 Rev Date Description
15 ==========================================================================
16 0.01 2001/05/03 Created DL2000-based linux driver
17 0.02 2001/05/21 Added VLAN and hardware checksum support.
18 1.00 2001/06/26 Added jumbo frame support.
19 1.01 2001/08/21 Added two parameters, rx_coalesce and rx_timeout.
20 1.02 2001/10/08 Supported fiber media.
21 Added flow control parameters.
22 1.03 2001/10/12 Changed the default media to 1000mbps_fd for
23 the fiber devices.
24 1.04 2001/11/08 Fixed Tx stopped when tx very busy.
25 1.05 2001/11/22 Fixed Tx stopped when unidirectional tx busy.
26 1.06 2001/12/13 Fixed disconnect bug at 10Mbps mode.
27 Fixed tx_full flag incorrect.
28 Added tx_coalesce paramter.
29 1.07 2002/01/03 Fixed miscount of RX frame error.
30 1.08 2002/01/17 Fixed the multicast bug.
31 1.09 2002/03/07 Move rx-poll-now to re-fill loop.
32 Added rio_timer() to watch rx buffers.
33 1.10 2002/04/16 Fixed miscount of carrier error.
34 1.11 2002/05/23 Added ISR schedule scheme
35 Fixed miscount of rx frame error for DGE-550SX.
36 Fixed VLAN bug.
37 1.12 2002/06/13 Lock tx_coalesce=1 on 10/100Mbps mode.
38 1.13 2002/08/13 1. Fix disconnection (many tx:carrier/rx:frame
39 errs) with some mainboards.
40 2. Use definition "DRV_NAME" "DRV_VERSION"
41 "DRV_RELDATE" for flexibility.
42 1.14 2002/08/14 Support ethtool.
43 1.15 2002/08/27 Changed the default media to Auto-Negotiation
44 for the fiber devices.
45 1.16 2002/09/04 More power down time for fiber devices auto-
46 negotiation.
47 Fix disconnect bug after ifup and ifdown.
48 1.17 2002/10/03 Fix RMON statistics overflow.
49 Always use I/O mapping to access eeprom,
50 avoid system freezing with some chipsets.
51 1.18 2002/11/07 New tx scheme, adaptive tx_coalesce.
52 Remove tx_coalesce option.
53 1.19 2003/12/16 Fix problem parsing the eeprom on big endian
54 systems. (philt@4bridgeworks.com)
55
56 */
57 #define DRV_NAME "D-Link DL2000-based linux driver"
58 #define DRV_VERSION "v1.19"
59 #define DRV_RELDATE "2003/12/16"
60 #include "dl2k.h"
61 #include <linux/version.h>
62
63 static char version[] __devinitdata =
64 KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n";
65 #define MAX_UNITS 8
66 static int mtu[MAX_UNITS];
67 static int vlan[MAX_UNITS];
68 static int jumbo[MAX_UNITS];
69 static char *media[MAX_UNITS];
70 static int tx_flow=-1;
71 static int rx_flow=-1;
72 static int copy_thresh;
73 static int rx_coalesce=0; /* Rx frame count each interrupt */
74 static int rx_timeout=200; /* Rx DMA wait time in 640ns increments */
75
76
77 MODULE_AUTHOR ("Edward Peng");
78 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
79 MODULE_LICENSE("GPL");
80 MODULE_PARM (mtu, "1-" __MODULE_STRING (MAX_UNITS) "i");
81 MODULE_PARM (media, "1-" __MODULE_STRING (MAX_UNITS) "s");
82 MODULE_PARM (vlan, "1-" __MODULE_STRING (MAX_UNITS) "i");
83 MODULE_PARM (jumbo, "1-" __MODULE_STRING (MAX_UNITS) "i");
84 MODULE_PARM (tx_flow, "i");
85 MODULE_PARM (rx_flow, "i");
86 MODULE_PARM (copy_thresh, "i");
87 MODULE_PARM (rx_coalesce, "i"); /* Rx frame count each interrupt */
88 MODULE_PARM (rx_timeout, "i"); /* Rx DMA wait time in 64ns increments */
89
90
91 /* Enable the default interrupts */
92 #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
93 UpdateStats | LinkEvent|TxComplete)
94 #define EnableInt() \
95 writew(DEFAULT_INTR, ioaddr + IntEnable)
96
97 static int max_intrloop = 50;
98 static int multicast_filter_limit = 0x40;
99
100 static int rio_open (struct net_device *dev);
101 static void rio_timer (unsigned long data);
102 static void rio_tx_timeout (struct net_device *dev);
103 static void alloc_list (struct net_device *dev);
104 static void tx_poll (unsigned long data);
105 static int start_xmit (struct sk_buff *skb, struct net_device *dev);
106 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,69)
107 static irqreturn_t
108 rio_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
109 #else
110 static void
111 rio_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
112 #endif
113 static void rio_free_tx (struct net_device *dev);
114 static void tx_error (struct net_device *dev, int tx_status);
115 static void rx_poll (unsigned long data);
116 static void refill_rx (struct net_device *dev);
117 static void rio_error (struct net_device *dev, int int_status);
118 static int change_mtu (struct net_device *dev, int new_mtu);
119 static void set_multicast (struct net_device *dev);
120 static struct net_device_stats *get_stats (struct net_device *dev);
121 static int clear_stats (struct net_device *dev);
122 static int rio_ethtool_ioctl (struct net_device *dev, void *useraddr);
123 static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
124 static int rio_close (struct net_device *dev);
125 static int find_miiphy (struct net_device *dev);
126 static int parse_eeprom (struct net_device *dev);
127 static int read_eeprom (long ioaddr, int eep_addr);
128 static int mii_wait_link (struct net_device *dev, int wait);
129 static int mii_set_media (struct net_device *dev);
130 static int mii_get_media (struct net_device *dev);
131 static int mii_set_media_pcs (struct net_device *dev);
132 static int mii_get_media_pcs (struct net_device *dev);
133 static int mii_read (struct net_device *dev, int phy_addr, int reg_num);
134 static int mii_write (struct net_device *dev, int phy_addr, int reg_num,
135 u16 data);
136
137 static int __devinit
rio_probe1(struct pci_dev * pdev,const struct pci_device_id * ent)138 rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
139 {
140 struct net_device *dev;
141 struct netdev_private *np;
142 static int card_idx;
143 int chip_idx = ent->driver_data;
144 int err, irq;
145 long ioaddr;
146 static int version_printed;
147 void *ring_space;
148 dma_addr_t ring_dma;
149
150 if (!version_printed++)
151 printk ("%s", version);
152
153 err = pci_enable_device (pdev);
154 if (err)
155 return err;
156
157 irq = pdev->irq;
158 err = pci_request_regions (pdev, "dl2k");
159 if (err)
160 goto err_out_disable;
161
162 pci_set_master (pdev);
163 dev = alloc_etherdev (sizeof (*np));
164 if (!dev) {
165 err = -ENOMEM;
166 goto err_out_res;
167 }
168 SET_MODULE_OWNER (dev);
169
170 #ifdef MEM_MAPPING
171 ioaddr = pci_resource_start (pdev, 1);
172 ioaddr = (long) ioremap (ioaddr, RIO_IO_SIZE);
173 if (!ioaddr) {
174 err = -ENOMEM;
175 goto err_out_dev;
176 }
177 #else
178 ioaddr = pci_resource_start (pdev, 0);
179 #endif
180 dev->base_addr = ioaddr;
181 dev->irq = irq;
182 np = dev->priv;
183 np->chip_id = chip_idx;
184 np->pdev = pdev;
185 spin_lock_init (&np->tx_lock);
186 spin_lock_init (&np->rx_lock);
187 tasklet_init(&np->tx_tasklet, tx_poll, (unsigned long) dev);
188 tasklet_init(&np->rx_tasklet, rx_poll, (unsigned long) dev);
189
190 /* Parse manual configuration */
191 np->an_enable = 1;
192 if (card_idx < MAX_UNITS) {
193 if (media[card_idx] != NULL) {
194 np->an_enable = 0;
195 if (strcmp (media[card_idx], "auto") == 0 ||
196 strcmp (media[card_idx], "autosense") == 0 ||
197 strcmp (media[card_idx], "0") == 0 ) {
198 np->an_enable = 2;
199 } else if (strcmp (media[card_idx], "100mbps_fd") == 0 ||
200 strcmp (media[card_idx], "4") == 0) {
201 np->speed = 100;
202 np->full_duplex = 1;
203 } else if (strcmp (media[card_idx], "100mbps_hd") == 0
204 || strcmp (media[card_idx], "3") == 0) {
205 np->speed = 100;
206 np->full_duplex = 0;
207 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||
208 strcmp (media[card_idx], "2") == 0) {
209 np->speed = 10;
210 np->full_duplex = 1;
211 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||
212 strcmp (media[card_idx], "1") == 0) {
213 np->speed = 10;
214 np->full_duplex = 0;
215 } else if (strcmp (media[card_idx], "1000mbps_fd") == 0 ||
216 strcmp (media[card_idx], "6") == 0) {
217 np->speed=1000;
218 np->full_duplex=1;
219 } else if (strcmp (media[card_idx], "1000mbps_hd") == 0 ||
220 strcmp (media[card_idx], "5") == 0) {
221 np->speed = 1000;
222 np->full_duplex = 0;
223 } else {
224 np->an_enable = 1;
225 }
226 }
227 if (jumbo[card_idx] != 0) {
228 np->jumbo = 1;
229 dev->mtu = MAX_JUMBO;
230 } else {
231 np->jumbo = 0;
232 if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE)
233 dev->mtu = mtu[card_idx];
234 }
235 np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ?
236 vlan[card_idx] : 0;
237 if (rx_coalesce > 0 && rx_timeout > 0) {
238 np->rx_coalesce = rx_coalesce;
239 np->rx_timeout = rx_timeout;
240 np->coalesce = 1;
241 }
242 np->tx_flow = (tx_flow == 0) ? 0 : 1;
243 np->rx_flow = (rx_flow == 0) ? 0 : 1;
244
245 }
246 dev->open = &rio_open;
247 dev->hard_start_xmit = &start_xmit;
248 dev->stop = &rio_close;
249 dev->get_stats = &get_stats;
250 dev->set_multicast_list = &set_multicast;
251 dev->do_ioctl = &rio_ioctl;
252 dev->tx_timeout = &rio_tx_timeout;
253 dev->watchdog_timeo = TX_TIMEOUT;
254 dev->change_mtu = &change_mtu;
255 #if 0
256 dev->features = NETIF_F_IP_CSUM;
257 #endif
258 pci_set_drvdata (pdev, dev);
259
260 ring_space = pci_alloc_consistent (pdev, TX_TOTAL_SIZE, &ring_dma);
261 if (!ring_space)
262 goto err_out_iounmap;
263 np->tx_ring = (struct netdev_desc *) ring_space;
264 np->tx_ring_dma = ring_dma;
265
266 ring_space = pci_alloc_consistent (pdev, RX_TOTAL_SIZE, &ring_dma);
267 if (!ring_space)
268 goto err_out_unmap_tx;
269 np->rx_ring = (struct netdev_desc *) ring_space;
270 np->rx_ring_dma = ring_dma;
271
272 /* Parse eeprom data */
273 parse_eeprom (dev);
274
275 /* Find PHY address */
276 err = find_miiphy (dev);
277 if (err)
278 goto err_out_unmap_rx;
279
280 /* Fiber device? */
281 np->phy_media = (readw(ioaddr + ASICCtrl) & PhyMedia) ? 1 : 0;
282 np->link_status = 0;
283 /* Set media and reset PHY */
284 if (np->phy_media) {
285 /* default Auto-Negotiation for fiber deivices */
286 if (np->an_enable == 2) {
287 np->an_enable = 1;
288 }
289 mii_set_media_pcs (dev);
290 } else {
291 /* Auto-Negotiation is mandatory for 1000BASE-T,
292 IEEE 802.3ab Annex 28D page 14 */
293 if (np->speed == 1000)
294 np->an_enable = 1;
295 mii_set_media (dev);
296 }
297 pci_read_config_byte(pdev, PCI_REVISION_ID, &np->pci_rev_id);
298
299 err = register_netdev (dev);
300 if (err)
301 goto err_out_unmap_rx;
302
303 card_idx++;
304
305 printk (KERN_INFO "%s: %s, %02x:%02x:%02x:%02x:%02x:%02x, IRQ %d\n",
306 dev->name, np->name,
307 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
308 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5], irq);
309 if (np->coalesce)
310 printk(KERN_INFO "rx_coalesce:\t%d packets\n"
311 KERN_INFO "rx_timeout: \t%d ns\n",
312 np->rx_coalesce, np->rx_timeout*640);
313 if (np->vlan)
314 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan);
315 return 0;
316
317 err_out_unmap_rx:
318 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
319 err_out_unmap_tx:
320 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
321 err_out_iounmap:
322 #ifdef MEM_MAPPING
323 iounmap ((void *) ioaddr);
324
325 err_out_dev:
326 #endif
327 kfree (dev);
328
329 err_out_res:
330 pci_release_regions (pdev);
331
332 err_out_disable:
333 pci_disable_device (pdev);
334 return err;
335 }
336
337 int
find_miiphy(struct net_device * dev)338 find_miiphy (struct net_device *dev)
339 {
340 int i, phy_found = 0;
341 struct netdev_private *np;
342 long ioaddr;
343 np = dev->priv;
344 ioaddr = dev->base_addr;
345 np->phy_addr = 1;
346
347 for (i = 31; i >= 0; i--) {
348 int mii_status = mii_read (dev, i, 1);
349 if (mii_status != 0xffff && mii_status != 0x0000) {
350 np->phy_addr = i;
351 phy_found++;
352 }
353 }
354 if (!phy_found) {
355 printk (KERN_ERR "%s: No MII PHY found!\n", dev->name);
356 return -ENODEV;
357 }
358 return 0;
359 }
360
361 int
parse_eeprom(struct net_device * dev)362 parse_eeprom (struct net_device *dev)
363 {
364 int i, j;
365 long ioaddr = dev->base_addr;
366 u8 sromdata[256];
367 u8 *psib;
368 u32 crc;
369 PSROM_t psrom = (PSROM_t) sromdata;
370 struct netdev_private *np = dev->priv;
371
372 int cid, next;
373
374 #ifdef MEM_MAPPING
375 ioaddr = pci_resource_start (np->pdev, 0);
376 #endif
377 /* Read eeprom */
378 for (i = 0; i < 128; i++) {
379 ((u16 *) sromdata)[i] = cpu_to_le16 (read_eeprom (ioaddr, i));
380 }
381 psrom->crc = le32_to_cpu(psrom->crc);
382 #ifdef MEM_MAPPING
383 ioaddr = dev->base_addr;
384 #endif
385 /* Check CRC */
386 crc = ~ether_crc_le (256 - 4, sromdata);
387 if (psrom->crc != crc) {
388 printk (KERN_ERR "%s: EEPROM data CRC error.\n", dev->name);
389 return -1;
390 }
391
392 /* Set MAC address */
393 for (i = 0; i < 6; i++)
394 dev->dev_addr[i] = psrom->mac_addr[i];
395
396 /* Parse Software Infomation Block */
397 i = 0x30;
398 psib = (u8 *) sromdata;
399 do {
400 cid = psib[i++];
401 next = psib[i++];
402 if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) {
403 printk (KERN_ERR "Cell data error\n");
404 return -1;
405 }
406 switch (cid) {
407 case 0: /* Format version */
408 break;
409 case 1: /* End of cell */
410 return 0;
411 case 2: /* Duplex Polarity */
412 np->duplex_polarity = psib[i];
413 writeb (readb (ioaddr + PhyCtrl) | psib[i],
414 ioaddr + PhyCtrl);
415 break;
416 case 3: /* Wake Polarity */
417 np->wake_polarity = psib[i];
418 break;
419 case 9: /* Adapter description */
420 j = (next - i > 255) ? 255 : next - i;
421 memcpy (np->name, &(psib[i]), j);
422 break;
423 case 4:
424 case 5:
425 case 6:
426 case 7:
427 case 8: /* Reversed */
428 break;
429 default: /* Unknown cell */
430 return -1;
431 }
432 i = next;
433 } while (1);
434
435 return 0;
436 }
437
438 static int
rio_open(struct net_device * dev)439 rio_open (struct net_device *dev)
440 {
441 struct netdev_private *np = dev->priv;
442 long ioaddr = dev->base_addr;
443 int i;
444 u16 macctrl;
445
446 i = request_irq (dev->irq, &rio_interrupt, SA_SHIRQ, dev->name, dev);
447 if (i)
448 return i;
449
450 /* Reset all logic functions */
451 writew (GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset,
452 ioaddr + ASICCtrl + 2);
453 mdelay(10);
454
455 /* DebugCtrl bit 4, 5, 9 must set */
456 writel (readl (ioaddr + DebugCtrl) | 0x0230, ioaddr + DebugCtrl);
457
458 /* Jumbo frame */
459 if (np->jumbo != 0)
460 writew (MAX_JUMBO+14, ioaddr + MaxFrameSize);
461
462 alloc_list (dev);
463
464 /* Get station address */
465 for (i = 0; i < 6; i++)
466 writeb (dev->dev_addr[i], ioaddr + StationAddr0 + i);
467
468 set_multicast (dev);
469 if (np->coalesce) {
470 writel (np->rx_coalesce | np->rx_timeout << 16,
471 ioaddr + RxDMAIntCtrl);
472 }
473 /* Set RIO to poll every N*320nsec. */
474 writeb (0x20, ioaddr + RxDMAPollPeriod);
475 writeb (0xff, ioaddr + TxDMAPollPeriod);
476 writeb (0x30, ioaddr + RxDMABurstThresh);
477 writeb (0x30, ioaddr + RxDMAUrgentThresh);
478 writel (0x0007ffff, ioaddr + RmonStatMask);
479
480 /* clear statistics */
481 clear_stats (dev);
482
483 atomic_set(&np->tx_desc_lock, 0);
484
485 /* VLAN supported */
486 if (np->vlan) {
487 /* priority field in RxDMAIntCtrl */
488 writel (readl(ioaddr + RxDMAIntCtrl) | 0x7 << 10,
489 ioaddr + RxDMAIntCtrl);
490 /* VLANId */
491 writew (np->vlan, ioaddr + VLANId);
492 /* Length/Type should be 0x8100 */
493 writel (0x8100 << 16 | np->vlan, ioaddr + VLANTag);
494 /* Enable AutoVLANuntagging, but disable AutoVLANtagging.
495 VLAN information tagged by TFC' VID, CFI fields. */
496 writel (readl (ioaddr + MACCtrl) | AutoVLANuntagging,
497 ioaddr + MACCtrl);
498 }
499
500 init_timer (&np->timer);
501 np->timer.expires = jiffies + 1*HZ;
502 np->timer.data = (unsigned long) dev;
503 np->timer.function = &rio_timer;
504 add_timer (&np->timer);
505
506 /* Start Tx/Rx */
507 writel (readl (ioaddr + MACCtrl) | StatsEnable | RxEnable | TxEnable,
508 ioaddr + MACCtrl);
509
510 macctrl = 0;
511 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
512 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
513 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0;
514 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0;
515 writew(macctrl, ioaddr + MACCtrl);
516
517 netif_start_queue (dev);
518
519 /* Enable default interrupts */
520 EnableInt ();
521 return 0;
522 }
523
524 static void
rio_timer(unsigned long data)525 rio_timer (unsigned long data)
526 {
527 struct net_device *dev = (struct net_device *)data;
528 struct netdev_private *np = dev->priv;
529 unsigned int entry;
530 int next_tick = 1*HZ;
531 unsigned long flags;
532
533 spin_lock_irqsave(&np->rx_lock, flags);
534 /* Recover rx ring exhausted error */
535 if (np->cur_rx - np->old_rx >= RX_RING_SIZE) {
536 printk(KERN_INFO "Try to recover rx ring exhausted...\n");
537 /* Re-allocate skbuffs to fill the descriptor ring */
538 for (; np->cur_rx - np->old_rx > 0; np->old_rx++) {
539 struct sk_buff *skb;
540 entry = np->old_rx % RX_RING_SIZE;
541 /* Dropped packets don't need to re-allocate */
542 if (np->rx_skbuff[entry] == NULL) {
543 skb = dev_alloc_skb (np->rx_buf_sz);
544 if (skb == NULL) {
545 np->rx_ring[entry].fraginfo = 0;
546 printk (KERN_INFO
547 "%s: Still unable to re-allocate Rx skbuff.#%d\n",
548 dev->name, entry);
549 break;
550 }
551 np->rx_skbuff[entry] = skb;
552 skb->dev = dev;
553 /* 16 byte align the IP header */
554 skb_reserve (skb, 2);
555 np->rx_ring[entry].fraginfo =
556 cpu_to_le64 (pci_map_single
557 (np->pdev, skb->tail, np->rx_buf_sz,
558 PCI_DMA_FROMDEVICE));
559 }
560 np->rx_ring[entry].fraginfo |=
561 cpu_to_le64 (np->rx_buf_sz) << 48;
562 np->rx_ring[entry].status = 0;
563 } /* end for */
564 } /* end if */
565 spin_unlock_irqrestore (&np->rx_lock, flags);
566 np->timer.expires = jiffies + next_tick;
567 add_timer(&np->timer);
568 }
569
570 static void
rio_tx_timeout(struct net_device * dev)571 rio_tx_timeout (struct net_device *dev)
572 {
573 struct netdev_private *np = dev->priv;
574 long ioaddr = dev->base_addr;
575
576 printk (KERN_INFO "%s: Tx timed out (%4.4x), "
577 "clean up tx queue to restart..\n",
578 dev->name, readl (ioaddr + TxStatus));
579 printk (KERN_INFO "%s: cur_tx=%lx cur_task=%lx old_tx=%lx "
580 "TFDListPtr=%08x tx_full=%d",
581 dev->name, np->cur_tx, np->cur_task, np->old_tx,
582 readl(ioaddr + TFDListPtr0),
583 netif_queue_stopped(dev));
584 writew(0, ioaddr + IntEnable);
585 writew(0, ioaddr + TFDListPtr0);
586 writew(0, ioaddr + TFDListPtr1);
587 tasklet_disable(&np->tx_tasklet);
588 rio_free_tx(dev);
589 dev->if_port = 0;
590 dev->trans_start = jiffies;
591 tasklet_enable(&np->tx_tasklet);
592 writew(DEFAULT_INTR, ioaddr + IntEnable);
593 return;
594 }
595
596 /* allocate and initialize Tx and Rx descriptors */
597 static void
alloc_list(struct net_device * dev)598 alloc_list (struct net_device *dev)
599 {
600 struct netdev_private *np = dev->priv;
601 int i;
602
603 np->cur_rx = np->cur_tx = 0;
604 np->old_rx = np->old_tx = 0;
605 np->cur_task = 0;
606 np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32);
607
608 /* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */
609 for (i = 0; i < TX_RING_SIZE; i++) {
610 np->tx_skbuff[i] = 0;
611 np->tx_ring[i].status = cpu_to_le64 (TFDDone);
612 np->tx_ring[i].next_desc = cpu_to_le64 (np->tx_ring_dma +
613 ((i+1)%TX_RING_SIZE) *
614 sizeof (struct netdev_desc));
615 }
616
617 /* Initialize Rx descriptors */
618 for (i = 0; i < RX_RING_SIZE; i++) {
619 np->rx_ring[i].next_desc = cpu_to_le64 (np->rx_ring_dma +
620 ((i + 1) % RX_RING_SIZE) *
621 sizeof (struct netdev_desc));
622 np->rx_ring[i].status = 0;
623 np->rx_ring[i].fraginfo = 0;
624 np->rx_skbuff[i] = 0;
625 }
626
627 /* Allocate the rx buffers */
628 for (i = 0; i < RX_RING_SIZE; i++) {
629 /* Allocated fixed size of skbuff */
630 struct sk_buff *skb = dev_alloc_skb (np->rx_buf_sz);
631 np->rx_skbuff[i] = skb;
632 if (skb == NULL) {
633 printk (KERN_ERR
634 "%s: alloc_list: allocate Rx buffer error! ",
635 dev->name);
636 break;
637 }
638 skb->dev = dev; /* Mark as being used by this device. */
639 skb_reserve (skb, 2); /* 16 byte align the IP header. */
640 /* Rubicon now supports 40 bits of addressing space. */
641 np->rx_ring[i].fraginfo =
642 cpu_to_le64 ( pci_map_single (
643 np->pdev, skb->tail, np->rx_buf_sz,
644 PCI_DMA_FROMDEVICE));
645 np->rx_ring[i].fraginfo |= cpu_to_le64 (np->rx_buf_sz) << 48;
646 }
647
648 /* Set RFDListPtr */
649 writel (cpu_to_le32 (np->rx_ring_dma), dev->base_addr + RFDListPtr0);
650 writel (0, dev->base_addr + RFDListPtr1);
651
652 return;
653 }
654
tx_poll(unsigned long data)655 static void tx_poll (unsigned long data)
656 {
657 struct net_device *dev = (struct net_device*) data;
658 struct netdev_private *np = dev->priv;
659 unsigned head = np->cur_task % TX_RING_SIZE;
660 struct netdev_desc *txdesc =
661 &np->tx_ring[(np->cur_tx + TX_RING_SIZE - 1) % TX_RING_SIZE];
662
663 /* Indicate the latest descriptor of tx ring */
664 txdesc->status |= cpu_to_le64 (TxDMAIndicate);
665
666 while ((np->cur_task + TX_RING_SIZE - np->cur_tx) % TX_RING_SIZE > 0) {
667 txdesc = &np->tx_ring[np->cur_task];
668 txdesc->status &= cpu_to_le64 (~TFDDone);
669 np->cur_task = (np->cur_task + 1) % TX_RING_SIZE;
670 }
671
672 if (readl (dev->base_addr + TFDListPtr0) == 0) {
673 writel (np->tx_ring_dma + head * sizeof (struct netdev_desc),
674 dev->base_addr + TFDListPtr0);
675 writel (0, dev->base_addr + TFDListPtr1);
676 }
677
678 return;
679 }
680 static int
start_xmit(struct sk_buff * skb,struct net_device * dev)681 start_xmit (struct sk_buff *skb, struct net_device *dev)
682 {
683 struct netdev_private *np = dev->priv;
684 struct netdev_desc *txdesc;
685 unsigned entry;
686 u32 ioaddr;
687 u64 tfc_vlan_tag = 0;
688
689 if (np->link_status == 0) { /* Link Down */
690 dev_kfree_skb(skb);
691 return 0;
692 }
693 ioaddr = dev->base_addr;
694 entry = np->cur_tx % TX_RING_SIZE;
695 np->tx_skbuff[entry] = skb;
696 txdesc = &np->tx_ring[entry];
697
698 #if 0
699 if (skb->ip_summed == CHECKSUM_HW) {
700 txdesc->status |=
701 cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable |
702 IPChecksumEnable);
703 }
704 #endif
705 if (np->vlan) {
706 tfc_vlan_tag =
707 cpu_to_le64 (VLANTagInsert) |
708 (cpu_to_le64 (np->vlan) << 32) |
709 (cpu_to_le64 (skb->priority) << 45);
710 }
711 txdesc->fraginfo = cpu_to_le64 (pci_map_single (np->pdev, skb->data,
712 skb->len,
713 PCI_DMA_TODEVICE));
714 txdesc->fraginfo |= cpu_to_le64 (skb->len) << 48;
715
716 /* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode
717 * Work around: Always use 1 descriptor in 10Mbps mode */
718 if (np->speed == 10) {
719 /* Note the order! Stop queue before hardware processing
720 * this descriptor */
721 netif_stop_queue (dev);
722 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
723 WordAlignDisable |
724 TxDMAIndicate | TxComplete |
725 (1 << FragCountShift));
726 /* TxDMAPollNow */
727 writel(readl(ioaddr + DMACtrl) | 0x00001000, ioaddr + DMACtrl);
728 if (readl (dev->base_addr + TFDListPtr0) == 0) {
729 writel (np->tx_ring_dma +
730 entry * sizeof (struct netdev_desc),
731 dev->base_addr + TFDListPtr0);
732 writel (0, dev->base_addr + TFDListPtr1);
733 }
734 np->cur_tx = np->cur_task = (np->cur_tx + 1) % TX_RING_SIZE;
735 } else {
736 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE;
737 mb();
738 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag | TFDDone |
739 WordAlignDisable |
740 (1 << FragCountShift));
741 tasklet_schedule (&np->tx_tasklet);
742 /* Schedule ISR */
743 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
744 < TX_QUEUE_LEN - 1) {
745 /* do nothing */
746 } else if (!netif_queue_stopped(dev)) {
747 netif_stop_queue (dev);
748 }
749 }
750
751
752 /* NETDEV WATCHDOG timer */
753 dev->trans_start = jiffies;
754 return 0;
755 }
756 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,69))
757 static irqreturn_t
rio_interrupt(int irq,void * dev_instance,struct pt_regs * rgs)758 rio_interrupt (int irq, void *dev_instance, struct pt_regs *rgs)
759 #else
760 static void
761 rio_interrupt (int irq, void *dev_instance, struct pt_regs *rgs)
762 #endif
763 {
764 struct net_device *dev = dev_instance;
765 struct netdev_private *np;
766 unsigned int_status;
767 long ioaddr;
768 int cnt = max_intrloop;
769 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,69))
770 int handled = 0;
771 #endif
772
773 ioaddr = dev->base_addr;
774 np = dev->priv;
775 while (1) {
776 int_status = readw (ioaddr + IntStatus);
777 writew (int_status, ioaddr + IntStatus);
778 int_status &= DEFAULT_INTR;
779 if (int_status == 0 || --cnt < 0)
780 break;
781 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,69))
782 handled = 1;
783 #endif
784 /* Processing received packets */
785 if (int_status & RxDMAComplete) {
786 writew(DEFAULT_INTR & ~(RxDMAComplete | RxComplete),
787 ioaddr + IntEnable);
788 if (np->budget < 0) {
789 np->budget = RX_BUDGET;
790 }
791 tasklet_schedule (&np->rx_tasklet);
792 }
793 /* TxDMAComplete interrupt */
794 if ((int_status & (TxDMAComplete|IntRequested|TxComplete))) {
795 int tx_status;
796 tx_status = readl (ioaddr + TxStatus);
797 if (tx_status & 0x01)
798 tx_error (dev, tx_status);
799 /* Free used tx skbuffs */
800 rio_free_tx (dev);
801 }
802
803 /* Handle uncommon events */
804 if (int_status &
805 (HostError | LinkEvent | UpdateStats))
806 rio_error (dev, int_status);
807 }
808 writel(5000, ioaddr + CountDown);
809 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,69))
810 return IRQ_RETVAL(handled);
811 #endif
812 }
813
814 static void
rio_free_tx(struct net_device * dev)815 rio_free_tx (struct net_device *dev)
816 {
817 struct netdev_private *np = (struct netdev_private *) dev->priv;
818 int entry = np->old_tx % TX_RING_SIZE;
819 unsigned long flag = 0;
820 int irq = in_interrupt();
821
822 if (atomic_read(&np->tx_desc_lock))
823 return;
824 atomic_inc(&np->tx_desc_lock);
825
826 if (irq)
827 spin_lock(&np->tx_lock);
828 else
829 spin_lock_irqsave(&np->tx_lock, flag);
830 /* Free used tx skbuffs */
831 while (entry != np->cur_task) {
832 struct sk_buff *skb;
833
834 if (!(np->tx_ring[entry].status & TFDDone))
835 break;
836 skb = np->tx_skbuff[entry];
837 pci_unmap_single (np->pdev,
838 np->tx_ring[entry].fraginfo,
839 skb->len, PCI_DMA_TODEVICE);
840 if (irq)
841 dev_kfree_skb_irq (skb);
842 else
843 dev_kfree_skb (skb);
844
845 np->tx_skbuff[entry] = 0;
846 entry = (entry + 1) % TX_RING_SIZE;
847 }
848
849 if (irq)
850 spin_unlock(&np->tx_lock);
851 else
852 spin_unlock_irqrestore(&np->tx_lock, flag);
853 np->old_tx = entry;
854
855 /* If the ring is no longer full, clear tx_full and
856 call netif_wake_queue() */
857 if (np->speed != 10) {
858 if (netif_queue_stopped(dev) &&
859 ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
860 < TX_QUEUE_LEN - 1)) {
861 netif_wake_queue (dev);
862 }
863 }
864 else {
865 if (netif_queue_stopped(dev) &&
866 np->cur_tx == np->old_tx)
867 netif_wake_queue(dev);
868 }
869 atomic_dec(&np->tx_desc_lock);
870 }
871
872 static void
tx_error(struct net_device * dev,int tx_status)873 tx_error (struct net_device *dev, int tx_status)
874 {
875 struct netdev_private *np;
876 long ioaddr = dev->base_addr;
877 int frame_id;
878 int i;
879
880 np = dev->priv;
881
882 frame_id = (tx_status & 0xffff0000);
883 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
884 dev->name, tx_status, frame_id);
885 np->stats.tx_errors++;
886 /* Ttransmit Underrun */
887 if (tx_status & 0x10) {
888 np->stats.tx_fifo_errors++;
889 writew (readw (ioaddr + TxStartThresh) + 0x10,
890 ioaddr + TxStartThresh);
891 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
892 writew (TxReset | DMAReset | FIFOReset | NetworkReset,
893 ioaddr + ASICCtrl + 2);
894 /* Wait for ResetBusy bit clear */
895 for (i = 50; i > 0; i--) {
896 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
897 break;
898 mdelay (1);
899 }
900 rio_free_tx (dev);
901 /* Reset TFDListPtr */
902 writel (np->tx_ring_dma +
903 np->old_tx * sizeof (struct netdev_desc),
904 dev->base_addr + TFDListPtr0);
905 writel (0, dev->base_addr + TFDListPtr1);
906
907 /* Let TxStartThresh stay default value */
908 }
909 /* Late Collision */
910 if (tx_status & 0x04) {
911 np->stats.tx_fifo_errors++;
912 /* TxReset and clear FIFO */
913 writew (TxReset | FIFOReset, ioaddr + ASICCtrl + 2);
914 /* Wait reset done */
915 for (i = 50; i > 0; i--) {
916 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
917 break;
918 mdelay (1);
919 }
920 /* Let TxStartThresh stay default value */
921 }
922 /* Maximum Collisions */
923 #ifdef ETHER_STATS
924 if (tx_status & 0x08)
925 np->stats.collisions16++;
926 #else
927 if (tx_status & 0x08)
928 np->stats.collisions++;
929 #endif
930 /* Restart the Tx */
931 writel (readw (dev->base_addr + MACCtrl) | TxEnable, ioaddr + MACCtrl);
932 }
933
rx_poll(unsigned long data)934 static void rx_poll (unsigned long data)
935 {
936 struct net_device *dev = (struct net_device*) data;
937 struct netdev_private *np = (struct netdev_private *) dev->priv;
938 int entry = np->cur_rx % RX_RING_SIZE;
939 int cnt = np->budget;
940 long ioaddr = dev->base_addr;
941 int received = 0;
942 /* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */
943 while (1) {
944 struct netdev_desc *desc = &np->rx_ring[entry];
945 int pkt_len;
946 u64 frame_status;
947
948 if (--cnt < 0) {
949 np->cur_rx = entry;
950 goto not_done;
951 }
952
953 /* Chip omits the CRC. */
954 pkt_len = le64_to_cpu (desc->status & 0xffff);
955 frame_status = le64_to_cpu (desc->status);
956
957 if (!(desc->status & RFDDone) ||
958 !(desc->status & FrameStart) || !(desc->status & FrameEnd))
959 break;
960
961
962 pci_dma_sync_single (np->pdev, desc->fraginfo, np->rx_buf_sz,
963 PCI_DMA_FROMDEVICE);
964 /* Update rx error statistics, drop packet. */
965 if (frame_status & RFS_Errors) {
966 np->stats.rx_errors++;
967 if (frame_status & (RxRuntFrame | RxLengthError))
968 np->stats.rx_length_errors++;
969 if (frame_status & RxFCSError)
970 np->stats.rx_crc_errors++;
971 if (frame_status & RxAlignmentError && np->speed != 1000)
972 np->stats.rx_frame_errors++;
973 if (frame_status & RxFIFOOverrun)
974 np->stats.rx_fifo_errors++;
975 } else {
976 struct sk_buff *skb;
977
978 /* Small skbuffs for short packets */
979 if (pkt_len > copy_thresh) {
980 pci_unmap_single (np->pdev, desc->fraginfo,
981 np->rx_buf_sz,
982 PCI_DMA_FROMDEVICE);
983 skb_put (skb = np->rx_skbuff[entry], pkt_len);
984 np->rx_skbuff[entry] = NULL;
985 } else if ((skb = dev_alloc_skb (pkt_len + 2)) != NULL) {
986 skb->dev = dev;
987 /* 16 byte align the IP header */
988 skb_reserve (skb, 2);
989 eth_copy_and_sum (skb,
990 np->rx_skbuff[entry]->tail,
991 pkt_len, 0);
992 skb_put (skb, pkt_len);
993 }
994 skb->protocol = eth_type_trans (skb, dev);
995 #if 0
996 /* Checksum done by hw, but csum value unavailable. */
997 if (np->pci_rev_id >= 0x0c &&
998 !(frame_status & (TCPError | UDPError | IPError))) {
999 skb->ip_summed = CHECKSUM_UNNECESSARY;
1000 }
1001 #endif
1002 netif_rx (skb);
1003 dev->last_rx = jiffies;
1004 }
1005 entry = (entry + 1) % RX_RING_SIZE;
1006 received++;
1007 }
1008 np->cur_rx = entry;
1009 refill_rx (dev);
1010 np->budget -= received;
1011 writew (DEFAULT_INTR, ioaddr + IntEnable);
1012 return;
1013
1014 not_done:
1015 refill_rx (dev);
1016 if (!received)
1017 received = 1;
1018 np->budget -= received;
1019 if (np->budget <= 0)
1020 np->budget = RX_BUDGET;
1021 tasklet_schedule (&np->rx_tasklet);
1022 return;
1023 }
1024
refill_rx(struct net_device * dev)1025 static void refill_rx (struct net_device *dev)
1026 {
1027 struct netdev_private *np = dev->priv;
1028 int entry;
1029 int irq = in_interrupt();
1030 unsigned long flag = 0;
1031
1032 if (irq)
1033 spin_lock(&np->rx_lock);
1034 else
1035 spin_lock_irqsave(&np->rx_lock, flag);
1036
1037 /* Re-allocate skbuffs to fill the descriptor ring */
1038 entry = np->old_rx;
1039 while (entry != np->cur_rx) {
1040 struct sk_buff *skb;
1041 /* Dropped packets don't need to re-allocate */
1042 if (np->rx_skbuff[entry] == NULL) {
1043 skb = dev_alloc_skb (np->rx_buf_sz);
1044 if (skb == NULL) {
1045 np->rx_ring[entry].fraginfo = 0;
1046 printk (KERN_INFO
1047 "%s: receive_packet: "
1048 "Unable to re-allocate Rx skbuff.#%d\n",
1049 dev->name, entry);
1050 break;
1051 }
1052 np->rx_skbuff[entry] = skb;
1053 skb->dev = dev;
1054 /* 16 byte align the IP header */
1055 skb_reserve (skb, 2);
1056 np->rx_ring[entry].fraginfo =
1057 cpu_to_le64 (pci_map_single
1058 (np->pdev, skb->tail, np->rx_buf_sz,
1059 PCI_DMA_FROMDEVICE));
1060 }
1061 np->rx_ring[entry].fraginfo |=
1062 cpu_to_le64 (np->rx_buf_sz) << 48;
1063 np->rx_ring[entry].status = 0;
1064 entry = (entry + 1) % RX_RING_SIZE;
1065 }
1066 np->old_rx = entry;
1067
1068 if (irq)
1069 spin_unlock(&np->rx_lock);
1070 else
1071 spin_unlock_irqrestore(&np->rx_lock, flag);
1072 return;
1073 }
1074
1075 static void
rio_error(struct net_device * dev,int int_status)1076 rio_error (struct net_device *dev, int int_status)
1077 {
1078 long ioaddr = dev->base_addr;
1079 struct netdev_private *np = dev->priv;
1080 u16 macctrl;
1081
1082 /* Link change event */
1083 if (int_status & LinkEvent) {
1084 if (mii_wait_link (dev, 10) == 0) {
1085 printk (KERN_INFO "%s: Link up\n", dev->name);
1086 if (np->phy_media)
1087 mii_get_media_pcs (dev);
1088 else
1089 mii_get_media (dev);
1090 macctrl = 0;
1091 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
1092 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
1093 macctrl |= (np->tx_flow) ?
1094 TxFlowControlEnable : 0;
1095 macctrl |= (np->rx_flow) ?
1096 RxFlowControlEnable : 0;
1097 writew(macctrl, ioaddr + MACCtrl);
1098 np->link_status = 1;
1099 netif_carrier_on(dev);
1100 } else {
1101 printk (KERN_INFO "%s: Link off\n", dev->name);
1102 np->link_status = 0;
1103 netif_carrier_off(dev);
1104 }
1105 }
1106
1107 /* UpdateStats statistics registers */
1108 if (int_status & UpdateStats) {
1109 get_stats (dev);
1110 }
1111
1112 /* PCI Error, a catastronphic error related to the bus interface
1113 occurs, set GlobalReset and HostReset to reset. */
1114 if (int_status & HostError) {
1115 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",
1116 dev->name, int_status);
1117 writew (GlobalReset | HostReset, ioaddr + ASICCtrl + 2);
1118 mdelay (500);
1119 }
1120 }
1121
1122 static struct net_device_stats *
get_stats(struct net_device * dev)1123 get_stats (struct net_device *dev)
1124 {
1125 long ioaddr = dev->base_addr;
1126 struct netdev_private *np = dev->priv;
1127 unsigned int stat_reg;
1128 #ifdef MEM_MAPPING
1129 int i;
1130 #endif
1131
1132 /* All statistics registers need to be acknowledged,
1133 else statistic overflow could cause problems */
1134
1135 np->stats.rx_packets += readl (ioaddr + FramesRcvOk);
1136 np->stats.tx_packets += readl (ioaddr + FramesXmtOk);
1137 np->stats.rx_bytes += readl (ioaddr + OctetRcvOk);
1138 np->stats.tx_bytes += readl (ioaddr + OctetXmtOk);
1139
1140 np->stats.multicast = readl (ioaddr + McstFramesRcvdOk);
1141 np->stats.collisions += readl (ioaddr + SingleColFrames)
1142 + readl (ioaddr + MultiColFrames);
1143
1144 /* detailed tx errors */
1145 stat_reg = readw (ioaddr + FramesAbortXSColls);
1146 np->stats.tx_aborted_errors += stat_reg;
1147 np->stats.tx_errors += stat_reg;
1148
1149 stat_reg = readw (ioaddr + CarrierSenseErrors);
1150 np->stats.tx_carrier_errors += stat_reg;
1151 np->stats.tx_errors += stat_reg;
1152
1153 /* Clear all other statistic register. */
1154 readl (ioaddr + McstOctetXmtOk);
1155 readw (ioaddr + BcstFramesXmtdOk);
1156 readl (ioaddr + McstFramesXmtdOk);
1157 readw (ioaddr + BcstFramesRcvdOk);
1158 readw (ioaddr + MacControlFramesRcvd);
1159 readw (ioaddr + FrameTooLongErrors);
1160 readw (ioaddr + InRangeLengthErrors);
1161 readw (ioaddr + FramesCheckSeqErrors);
1162 readw (ioaddr + FramesLostRxErrors);
1163 readl (ioaddr + McstOctetXmtOk);
1164 readl (ioaddr + BcstOctetXmtOk);
1165 readl (ioaddr + McstFramesXmtdOk);
1166 readl (ioaddr + FramesWDeferredXmt);
1167 readl (ioaddr + LateCollisions);
1168 readw (ioaddr + BcstFramesXmtdOk);
1169 readw (ioaddr + MacControlFramesXmtd);
1170 readw (ioaddr + FramesWEXDeferal);
1171 #ifdef MEM_MAPPING
1172 for (i = 0x100; i <= 0x150; i += 4)
1173 readl (ioaddr + i);
1174 #endif
1175 readw (ioaddr + TxJumboFrames);
1176 readw (ioaddr + RxJumboFrames);
1177 readw (ioaddr + TCPCheckSumErrors);
1178 readw (ioaddr + UDPCheckSumErrors);
1179 readw (ioaddr + IPCheckSumErrors);
1180 return &np->stats;
1181 }
1182
1183 static int
clear_stats(struct net_device * dev)1184 clear_stats (struct net_device *dev)
1185 {
1186 long ioaddr = dev->base_addr;
1187 #ifdef MEM_MAPPING
1188 int i;
1189 #endif
1190
1191 /* All statistics registers need to be acknowledged,
1192 else statistic overflow could cause problems */
1193 readl (ioaddr + FramesRcvOk);
1194 readl (ioaddr + FramesXmtOk);
1195 readl (ioaddr + OctetRcvOk);
1196 readl (ioaddr + OctetXmtOk);
1197
1198 readl (ioaddr + McstFramesRcvdOk);
1199 readl (ioaddr + SingleColFrames);
1200 readl (ioaddr + MultiColFrames);
1201 readl (ioaddr + LateCollisions);
1202 /* detailed rx errors */
1203 readw (ioaddr + FrameTooLongErrors);
1204 readw (ioaddr + InRangeLengthErrors);
1205 readw (ioaddr + FramesCheckSeqErrors);
1206 readw (ioaddr + FramesLostRxErrors);
1207
1208 /* detailed tx errors */
1209 readw (ioaddr + FramesAbortXSColls);
1210 readw (ioaddr + CarrierSenseErrors);
1211
1212 /* Clear all other statistic register. */
1213 readl (ioaddr + McstOctetXmtOk);
1214 readw (ioaddr + BcstFramesXmtdOk);
1215 readl (ioaddr + McstFramesXmtdOk);
1216 readw (ioaddr + BcstFramesRcvdOk);
1217 readw (ioaddr + MacControlFramesRcvd);
1218 readl (ioaddr + McstOctetXmtOk);
1219 readl (ioaddr + BcstOctetXmtOk);
1220 readl (ioaddr + McstFramesXmtdOk);
1221 readl (ioaddr + FramesWDeferredXmt);
1222 readw (ioaddr + BcstFramesXmtdOk);
1223 readw (ioaddr + MacControlFramesXmtd);
1224 readw (ioaddr + FramesWEXDeferal);
1225 #ifdef MEM_MAPPING
1226 for (i = 0x100; i <= 0x150; i += 4)
1227 readl (ioaddr + i);
1228 #endif
1229 readw (ioaddr + TxJumboFrames);
1230 readw (ioaddr + RxJumboFrames);
1231 readw (ioaddr + TCPCheckSumErrors);
1232 readw (ioaddr + UDPCheckSumErrors);
1233 readw (ioaddr + IPCheckSumErrors);
1234 return 0;
1235 }
1236
1237
1238 int
change_mtu(struct net_device * dev,int new_mtu)1239 change_mtu (struct net_device *dev, int new_mtu)
1240 {
1241 struct netdev_private *np = dev->priv;
1242 int max = (np->jumbo) ? MAX_JUMBO : 1536;
1243
1244 if ((new_mtu < 68) || (new_mtu > max)) {
1245 return -EINVAL;
1246 }
1247
1248 dev->mtu = new_mtu;
1249
1250 return 0;
1251 }
1252
1253 static void
set_multicast(struct net_device * dev)1254 set_multicast (struct net_device *dev)
1255 {
1256 long ioaddr = dev->base_addr;
1257 u32 hash_table[2];
1258 u16 rx_mode = 0;
1259 struct netdev_private *np = dev->priv;
1260
1261 hash_table[0] = hash_table[1] = 0;
1262 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */
1263 hash_table[1] |= cpu_to_le32(0x02000000);
1264 if (dev->flags & IFF_PROMISC) {
1265 /* Receive all frames promiscuously. */
1266 rx_mode = ReceiveAllFrames;
1267 } else if ((dev->flags & IFF_ALLMULTI) ||
1268 (dev->mc_count > multicast_filter_limit)) {
1269 /* Receive broadcast and multicast frames */
1270 rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast;
1271 } else if (dev->mc_count > 0) {
1272 int i;
1273 struct dev_mc_list *mclist;
1274 /* Receive broadcast frames and multicast frames filtering
1275 by Hashtable */
1276 rx_mode =
1277 ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast;
1278 for (i=0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1279 i++, mclist=mclist->next)
1280 {
1281 int bit, index = 0;
1282 int crc = ether_crc_le (ETH_ALEN, mclist->dmi_addr);
1283 /* The inverted high significant 6 bits of CRC are
1284 used as an index to hashtable */
1285 for (bit = 0; bit < 6; bit++)
1286 if (crc & (1 << (31 - bit)))
1287 index |= (1 << bit);
1288 hash_table[index / 32] |= (1 << (index % 32));
1289 }
1290 } else {
1291 rx_mode = ReceiveBroadcast | ReceiveUnicast;
1292 }
1293 if (np->vlan) {
1294 /* ReceiveVLANMatch field in ReceiveMode */
1295 rx_mode |= ReceiveVLANMatch;
1296 }
1297
1298 writel (hash_table[0], ioaddr + HashTable0);
1299 writel (hash_table[1], ioaddr + HashTable1);
1300 writew (rx_mode, ioaddr + ReceiveMode);
1301 }
1302
1303 static int
rio_ethtool_ioctl(struct net_device * dev,void * useraddr)1304 rio_ethtool_ioctl (struct net_device *dev, void *useraddr)
1305 {
1306 struct netdev_private *np = dev->priv;
1307 u32 ethcmd;
1308
1309 if (copy_from_user (ðcmd, useraddr, sizeof (ethcmd)))
1310 return -EFAULT;
1311 switch (ethcmd) {
1312 case ETHTOOL_GDRVINFO: {
1313 struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
1314 strcpy(info.driver, "DL2K");
1315 strcpy(info.version, DRV_VERSION);
1316 strcpy(info.bus_info, np->pdev->slot_name);
1317 memset(&info.fw_version, 0, sizeof(info.fw_version));
1318 if (copy_to_user(useraddr, &info, sizeof(info)))
1319 return -EFAULT;
1320 return 0;
1321 }
1322
1323 case ETHTOOL_GSET: {
1324 struct ethtool_cmd cmd = { ETHTOOL_GSET };
1325 if (np->phy_media) {
1326 /* fiber device */
1327 cmd.supported = SUPPORTED_Autoneg |
1328 SUPPORTED_FIBRE;
1329 cmd.advertising= ADVERTISED_Autoneg |
1330 ADVERTISED_FIBRE;
1331 cmd.port = PORT_FIBRE;
1332 cmd.transceiver = XCVR_INTERNAL;
1333 } else {
1334 /* copper device */
1335 cmd.supported = SUPPORTED_10baseT_Half |
1336 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half
1337 | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full |
1338 SUPPORTED_Autoneg | SUPPORTED_MII;
1339 cmd.advertising = ADVERTISED_10baseT_Half |
1340 ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half |
1341 ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full|
1342 ADVERTISED_Autoneg | ADVERTISED_MII;
1343 cmd.port = PORT_MII;
1344 cmd.transceiver = XCVR_INTERNAL;
1345 }
1346 if ( np->link_status ) {
1347 cmd.speed = np->speed;
1348 cmd.duplex = np->full_duplex ?
1349 DUPLEX_FULL : DUPLEX_HALF;
1350 } else {
1351 cmd.speed = -1;
1352 cmd.duplex = -1;
1353 }
1354 if ( np->an_enable)
1355 cmd.autoneg = AUTONEG_ENABLE;
1356 else
1357 cmd.autoneg = AUTONEG_DISABLE;
1358
1359 cmd.phy_address = np->phy_addr;
1360
1361 if (copy_to_user(useraddr, &cmd,
1362 sizeof(cmd)))
1363 return -EFAULT;
1364 return 0;
1365 }
1366 case ETHTOOL_SSET: {
1367 struct ethtool_cmd cmd;
1368 if (copy_from_user(&cmd, useraddr, sizeof(cmd)))
1369 return -EFAULT;
1370 netif_carrier_off(dev);
1371 if (cmd.autoneg == AUTONEG_ENABLE) {
1372 if (np->an_enable)
1373 return 0;
1374 else {
1375 np->an_enable = 1;
1376 mii_set_media(dev);
1377 return 0;
1378 }
1379 } else {
1380 np->an_enable = 0;
1381 if (np->speed == 1000){
1382 cmd.speed = SPEED_100;
1383 cmd.duplex = DUPLEX_FULL;
1384 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manul 100Mbps, Full duplex.\n");
1385 }
1386 switch(cmd.speed + cmd.duplex){
1387
1388 case SPEED_10 + DUPLEX_HALF:
1389 np->speed = 10;
1390 np->full_duplex = 0;
1391 break;
1392
1393 case SPEED_10 + DUPLEX_FULL:
1394 np->speed = 10;
1395 np->full_duplex = 1;
1396 break;
1397 case SPEED_100 + DUPLEX_HALF:
1398 np->speed = 100;
1399 np->full_duplex = 0;
1400 break;
1401 case SPEED_100 + DUPLEX_FULL:
1402 np->speed = 100;
1403 np->full_duplex = 1;
1404 break;
1405 case SPEED_1000 + DUPLEX_HALF:/* not supported */
1406 case SPEED_1000 + DUPLEX_FULL:/* not supported */
1407 default:
1408 return -EINVAL;
1409 }
1410 mii_set_media(dev);
1411 }
1412 return 0;
1413 }
1414 #ifdef ETHTOOL_GLINK
1415 case ETHTOOL_GLINK:{
1416 struct ethtool_value link = { ETHTOOL_GLINK };
1417 link.data = np->link_status;
1418 if (copy_to_user(useraddr, &link, sizeof(link)))
1419 return -EFAULT;
1420 return 0;
1421 }
1422 #endif
1423 default:
1424 return -EOPNOTSUPP;
1425 }
1426 }
1427
1428
1429 static int
rio_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)1430 rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1431 {
1432 int phy_addr;
1433 struct netdev_private *np = dev->priv;
1434 struct mii_data *miidata = (struct mii_data *) &rq->ifr_data;
1435
1436 struct netdev_desc *desc;
1437 int i;
1438
1439 phy_addr = np->phy_addr;
1440 switch (cmd) {
1441 case SIOCETHTOOL:
1442 return rio_ethtool_ioctl (dev, (void *) rq->ifr_data);
1443 case SIOCDEVPRIVATE:
1444 break;
1445
1446 case SIOCDEVPRIVATE + 1:
1447 miidata->out_value = mii_read (dev, phy_addr, miidata->reg_num);
1448 break;
1449 case SIOCDEVPRIVATE + 2:
1450 mii_write (dev, phy_addr, miidata->reg_num, miidata->in_value);
1451 break;
1452 case SIOCDEVPRIVATE + 3:
1453 break;
1454 case SIOCDEVPRIVATE + 4:
1455 break;
1456 case SIOCDEVPRIVATE + 5:
1457 netif_stop_queue (dev);
1458 break;
1459 case SIOCDEVPRIVATE + 6:
1460 netif_wake_queue (dev);
1461 break;
1462 case SIOCDEVPRIVATE + 7:
1463 printk
1464 ("tx_full=%x cur_tx=%lx old_tx=%lx cur_rx=%lx old_rx=%lx\n",
1465 netif_queue_stopped(dev), np->cur_tx, np->old_tx, np->cur_rx,
1466 np->old_rx);
1467 break;
1468 case SIOCDEVPRIVATE + 8:
1469 printk("TX ring:\n");
1470 for (i = 0; i < TX_RING_SIZE; i++) {
1471 desc = &np->tx_ring[i];
1472 printk
1473 ("%02x:cur:%08x next:%08x status:%08x frag1:%08x frag0:%08x",
1474 i,
1475 (u32) (np->tx_ring_dma + i * sizeof (*desc)),
1476 (u32) desc->next_desc,
1477 (u32) desc->status, (u32) (desc->fraginfo >> 32),
1478 (u32) desc->fraginfo);
1479 printk ("\n");
1480 }
1481 printk ("\n");
1482 break;
1483
1484 default:
1485 return -EOPNOTSUPP;
1486 }
1487 return 0;
1488 }
1489
1490 #define EEP_READ 0x0200
1491 #define EEP_BUSY 0x8000
1492 /* Read the EEPROM word */
1493 /* We use I/O instruction to read/write eeprom to avoid fail on some machines */
1494 int
read_eeprom(long ioaddr,int eep_addr)1495 read_eeprom (long ioaddr, int eep_addr)
1496 {
1497 int i = 1000;
1498 outw (EEP_READ | (eep_addr & 0xff), ioaddr + EepromCtrl);
1499 while (i-- > 0) {
1500 if (!(inw (ioaddr + EepromCtrl) & EEP_BUSY)) {
1501 return inw (ioaddr + EepromData);
1502 }
1503 }
1504 return 0;
1505 }
1506
1507 enum phy_ctrl_bits {
1508 MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04,
1509 MII_DUPLEX = 0x08,
1510 };
1511
1512 #define mii_delay() readb(ioaddr)
1513 static void
mii_sendbit(struct net_device * dev,u32 data)1514 mii_sendbit (struct net_device *dev, u32 data)
1515 {
1516 long ioaddr = dev->base_addr + PhyCtrl;
1517 data = (data) ? MII_DATA1 : 0;
1518 data |= MII_WRITE;
1519 data |= (readb (ioaddr) & 0xf8) | MII_WRITE;
1520 writeb (data, ioaddr);
1521 mii_delay ();
1522 writeb (data | MII_CLK, ioaddr);
1523 mii_delay ();
1524 }
1525
1526 static int
mii_getbit(struct net_device * dev)1527 mii_getbit (struct net_device *dev)
1528 {
1529 long ioaddr = dev->base_addr + PhyCtrl;
1530 u8 data;
1531
1532 data = (readb (ioaddr) & 0xf8) | MII_READ;
1533 writeb (data, ioaddr);
1534 mii_delay ();
1535 writeb (data | MII_CLK, ioaddr);
1536 mii_delay ();
1537 return ((readb (ioaddr) >> 1) & 1);
1538 }
1539
1540 static void
mii_send_bits(struct net_device * dev,u32 data,int len)1541 mii_send_bits (struct net_device *dev, u32 data, int len)
1542 {
1543 int i;
1544 for (i = len - 1; i >= 0; i--) {
1545 mii_sendbit (dev, data & (1 << i));
1546 }
1547 }
1548
1549 static int
mii_read(struct net_device * dev,int phy_addr,int reg_num)1550 mii_read (struct net_device *dev, int phy_addr, int reg_num)
1551 {
1552 u32 cmd;
1553 int i;
1554 u32 retval = 0;
1555
1556 /* Preamble */
1557 mii_send_bits (dev, 0xffffffff, 32);
1558 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1559 /* ST,OP = 0110'b for read operation */
1560 cmd = (0x06 << 10 | phy_addr << 5 | reg_num);
1561 mii_send_bits (dev, cmd, 14);
1562 /* Turnaround */
1563 if (mii_getbit (dev))
1564 goto err_out;
1565 /* Read data */
1566 for (i = 0; i < 16; i++) {
1567 retval |= mii_getbit (dev);
1568 retval <<= 1;
1569 }
1570 /* End cycle */
1571 mii_getbit (dev);
1572 return (retval >> 1) & 0xffff;
1573
1574 err_out:
1575 return 0;
1576 }
1577 static int
mii_write(struct net_device * dev,int phy_addr,int reg_num,u16 data)1578 mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data)
1579 {
1580 u32 cmd;
1581
1582 /* Preamble */
1583 mii_send_bits (dev, 0xffffffff, 32);
1584 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1585 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */
1586 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data;
1587 mii_send_bits (dev, cmd, 32);
1588 /* End cycle */
1589 mii_getbit (dev);
1590 return 0;
1591 }
1592 static int
mii_wait_link(struct net_device * dev,int wait)1593 mii_wait_link (struct net_device *dev, int wait)
1594 {
1595 BMSR_t bmsr;
1596 int phy_addr;
1597 struct netdev_private *np;
1598
1599 np = dev->priv;
1600 phy_addr = np->phy_addr;
1601
1602 do {
1603 bmsr.image = mii_read (dev, phy_addr, MII_BMSR);
1604 if (bmsr.bits.link_status)
1605 return 0;
1606 mdelay (1);
1607 } while (--wait > 0);
1608 return -1;
1609 }
1610 static int
mii_get_media(struct net_device * dev)1611 mii_get_media (struct net_device *dev)
1612 {
1613 ANAR_t negotiate;
1614 BMSR_t bmsr;
1615 BMCR_t bmcr;
1616 MSCR_t mscr;
1617 MSSR_t mssr;
1618 int phy_addr;
1619 struct netdev_private *np;
1620
1621 np = dev->priv;
1622 phy_addr = np->phy_addr;
1623
1624 bmsr.image = mii_read (dev, phy_addr, MII_BMSR);
1625 if (np->an_enable) {
1626 if (!bmsr.bits.an_complete) {
1627 /* Auto-Negotiation not completed */
1628 return -1;
1629 }
1630 negotiate.image = mii_read (dev, phy_addr, MII_ANAR) &
1631 mii_read (dev, phy_addr, MII_ANLPAR);
1632 mscr.image = mii_read (dev, phy_addr, MII_MSCR);
1633 mssr.image = mii_read (dev, phy_addr, MII_MSSR);
1634 if (mscr.bits.media_1000BT_FD & mssr.bits.lp_1000BT_FD) {
1635 np->speed = 1000;
1636 np->full_duplex = 1;
1637 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1638 } else if (mscr.bits.media_1000BT_HD & mssr.bits.lp_1000BT_HD) {
1639 np->speed = 1000;
1640 np->full_duplex = 0;
1641 printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n");
1642 } else if (negotiate.bits.media_100BX_FD) {
1643 np->speed = 100;
1644 np->full_duplex = 1;
1645 printk (KERN_INFO "Auto 100 Mbps, Full duplex\n");
1646 } else if (negotiate.bits.media_100BX_HD) {
1647 np->speed = 100;
1648 np->full_duplex = 0;
1649 printk (KERN_INFO "Auto 100 Mbps, Half duplex\n");
1650 } else if (negotiate.bits.media_10BT_FD) {
1651 np->speed = 10;
1652 np->full_duplex = 1;
1653 printk (KERN_INFO "Auto 10 Mbps, Full duplex\n");
1654 } else if (negotiate.bits.media_10BT_HD) {
1655 np->speed = 10;
1656 np->full_duplex = 0;
1657 printk (KERN_INFO "Auto 10 Mbps, Half duplex\n");
1658 }
1659 if (negotiate.bits.pause) {
1660 np->tx_flow &= 1;
1661 np->rx_flow &= 1;
1662 } else if (negotiate.bits.asymmetric) {
1663 np->tx_flow = 0;
1664 np->rx_flow &= 1;
1665 }
1666 /* else tx_flow, rx_flow = user select */
1667 } else {
1668 bmcr.image = mii_read (dev, phy_addr, MII_BMCR);
1669 if (bmcr.bits.speed100 == 1 && bmcr.bits.speed1000 == 0) {
1670 printk (KERN_INFO "Operating at 100 Mbps, ");
1671 } else if (bmcr.bits.speed100 == 0 && bmcr.bits.speed1000 == 0) {
1672 printk (KERN_INFO "Operating at 10 Mbps, ");
1673 } else if (bmcr.bits.speed100 == 0 && bmcr.bits.speed1000 == 1) {
1674 printk (KERN_INFO "Operating at 1000 Mbps, ");
1675 }
1676 if (bmcr.bits.duplex_mode) {
1677 printk ("Full duplex\n");
1678 } else {
1679 printk ("Half duplex\n");
1680 }
1681 }
1682 if (np->tx_flow)
1683 printk(KERN_INFO "Enable Tx Flow Control\n");
1684 else
1685 printk(KERN_INFO "Disable Tx Flow Control\n");
1686 if (np->rx_flow)
1687 printk(KERN_INFO "Enable Rx Flow Control\n");
1688 else
1689 printk(KERN_INFO "Disable Rx Flow Control\n");
1690
1691 return 0;
1692 }
1693
1694 static int
mii_set_media(struct net_device * dev)1695 mii_set_media (struct net_device *dev)
1696 {
1697 PHY_SCR_t pscr;
1698 BMCR_t bmcr;
1699 BMSR_t bmsr;
1700 ANAR_t anar;
1701 int phy_addr;
1702 struct netdev_private *np;
1703 np = dev->priv;
1704 phy_addr = np->phy_addr;
1705
1706 /* Does user set speed? */
1707 if (np->an_enable) {
1708 /* Advertise capabilities */
1709 bmsr.image = mii_read (dev, phy_addr, MII_BMSR);
1710 anar.image = mii_read (dev, phy_addr, MII_ANAR);
1711 anar.bits.media_100BX_FD = bmsr.bits.media_100BX_FD;
1712 anar.bits.media_100BX_HD = bmsr.bits.media_100BX_HD;
1713 anar.bits.media_100BT4 = bmsr.bits.media_100BT4;
1714 anar.bits.media_10BT_FD = bmsr.bits.media_10BT_FD;
1715 anar.bits.media_10BT_HD = bmsr.bits.media_10BT_HD;
1716 anar.bits.pause = 1;
1717 anar.bits.asymmetric = 1;
1718 mii_write (dev, phy_addr, MII_ANAR, anar.image);
1719
1720 /* Enable Auto crossover */
1721 pscr.image = mii_read (dev, phy_addr, MII_PHY_SCR);
1722 pscr.bits.mdi_crossover_mode = 3; /* 11'b */
1723 mii_write (dev, phy_addr, MII_PHY_SCR, pscr.image);
1724
1725 /* Soft reset PHY */
1726 mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET);
1727 bmcr.image = 0;
1728 bmcr.bits.an_enable = 1;
1729 bmcr.bits.restart_an = 1;
1730 bmcr.bits.reset = 1;
1731 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1732 mdelay(1);
1733 } else {
1734 /* Force speed setting */
1735 /* 1) Disable Auto crossover */
1736 pscr.image = mii_read (dev, phy_addr, MII_PHY_SCR);
1737 pscr.bits.mdi_crossover_mode = 0;
1738 mii_write (dev, phy_addr, MII_PHY_SCR, pscr.image);
1739
1740 /* 2) PHY Reset */
1741 bmcr.image = mii_read (dev, phy_addr, MII_BMCR);
1742 bmcr.bits.reset = 1;
1743 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1744
1745 /* 3) Power Down */
1746 bmcr.image = 0x1940; /* must be 0x1940 */
1747 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1748 mdelay (100); /* wait a certain time */
1749
1750 /* 4) Advertise nothing */
1751 mii_write (dev, phy_addr, MII_ANAR, 0);
1752
1753 /* 5) Set media and Power Up */
1754 bmcr.image = 0;
1755 bmcr.bits.power_down = 1;
1756 if (np->speed == 100) {
1757 bmcr.bits.speed100 = 1;
1758 bmcr.bits.speed1000 = 0;
1759 printk (KERN_INFO "Manual 100 Mbps, ");
1760 } else if (np->speed == 10) {
1761 bmcr.bits.speed100 = 0;
1762 bmcr.bits.speed1000 = 0;
1763 printk (KERN_INFO "Manual 10 Mbps, ");
1764 }
1765 if (np->full_duplex) {
1766 bmcr.bits.duplex_mode = 1;
1767 printk ("Full duplex\n");
1768 } else {
1769 bmcr.bits.duplex_mode = 0;
1770 printk ("Half duplex\n");
1771 }
1772 #if 0
1773 /* Set 1000BaseT Master/Slave setting */
1774 mscr.image = mii_read (dev, phy_addr, MII_MSCR);
1775 mscr.bits.cfg_enable = 1;
1776 mscr.bits.cfg_value = 0;
1777 #endif
1778 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1779 mdelay(10);
1780 }
1781 return 0;
1782 }
1783
1784 static int
mii_get_media_pcs(struct net_device * dev)1785 mii_get_media_pcs (struct net_device *dev)
1786 {
1787 ANAR_PCS_t negotiate;
1788 BMSR_t bmsr;
1789 BMCR_t bmcr;
1790 int phy_addr;
1791 struct netdev_private *np;
1792
1793 np = dev->priv;
1794 phy_addr = np->phy_addr;
1795
1796 bmsr.image = mii_read (dev, phy_addr, PCS_BMSR);
1797 if (np->an_enable) {
1798 if (!bmsr.bits.an_complete) {
1799 /* Auto-Negotiation not completed */
1800 return -1;
1801 }
1802 negotiate.image = mii_read (dev, phy_addr, PCS_ANAR) &
1803 mii_read (dev, phy_addr, PCS_ANLPAR);
1804 np->speed = 1000;
1805 if (negotiate.bits.full_duplex) {
1806 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1807 np->full_duplex = 1;
1808 } else {
1809 printk (KERN_INFO "Auto 1000 Mbps, half duplex\n");
1810 np->full_duplex = 0;
1811 }
1812 if (negotiate.bits.pause) {
1813 np->tx_flow &= 1;
1814 np->rx_flow &= 1;
1815 } else if (negotiate.bits.asymmetric) {
1816 np->tx_flow = 0;
1817 np->rx_flow &= 1;
1818 }
1819 /* else tx_flow, rx_flow = user select */
1820 } else {
1821 bmcr.image = mii_read (dev, phy_addr, PCS_BMCR);
1822 printk (KERN_INFO "Operating at 1000 Mbps, ");
1823 if (bmcr.bits.duplex_mode) {
1824 printk ("Full duplex\n");
1825 } else {
1826 printk ("Half duplex\n");
1827 }
1828 }
1829 if (np->tx_flow)
1830 printk(KERN_INFO "Enable Tx Flow Control\n");
1831 else
1832 printk(KERN_INFO "Disable Tx Flow Control\n");
1833 if (np->rx_flow)
1834 printk(KERN_INFO "Enable Rx Flow Control\n");
1835 else
1836 printk(KERN_INFO "Disable Rx Flow Control\n");
1837
1838 return 0;
1839 }
1840
1841 static int
mii_set_media_pcs(struct net_device * dev)1842 mii_set_media_pcs (struct net_device *dev)
1843 {
1844 BMCR_t bmcr;
1845 ESR_t esr;
1846 ANAR_PCS_t anar;
1847 int phy_addr;
1848 struct netdev_private *np;
1849 np = dev->priv;
1850 phy_addr = np->phy_addr;
1851
1852 /* Auto-Negotiation? */
1853 if (np->an_enable) {
1854 /* Advertise capabilities */
1855 esr.image = mii_read (dev, phy_addr, PCS_ESR);
1856 anar.image = mii_read (dev, phy_addr, MII_ANAR);
1857 anar.bits.half_duplex =
1858 esr.bits.media_1000BT_HD | esr.bits.media_1000BX_HD;
1859 anar.bits.full_duplex =
1860 esr.bits.media_1000BT_FD | esr.bits.media_1000BX_FD;
1861 anar.bits.pause = 1;
1862 anar.bits.asymmetric = 1;
1863 mii_write (dev, phy_addr, MII_ANAR, anar.image);
1864
1865 /* Soft reset PHY */
1866 mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET);
1867 bmcr.image = 0;
1868 bmcr.bits.an_enable = 1;
1869 bmcr.bits.restart_an = 1;
1870 bmcr.bits.reset = 1;
1871 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1872 mdelay(1);
1873 } else {
1874 /* Force speed setting */
1875 /* PHY Reset */
1876 bmcr.image = 0;
1877 bmcr.bits.reset = 1;
1878 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1879 mdelay(10);
1880 bmcr.image = 0;
1881 bmcr.bits.an_enable = 0;
1882 if (np->full_duplex) {
1883 bmcr.bits.duplex_mode = 1;
1884 printk (KERN_INFO "Manual full duplex\n");
1885 } else {
1886 bmcr.bits.duplex_mode = 0;
1887 printk (KERN_INFO "Manual half duplex\n");
1888 }
1889 mii_write (dev, phy_addr, MII_BMCR, bmcr.image);
1890 mdelay(10);
1891
1892 /* Advertise nothing */
1893 mii_write (dev, phy_addr, MII_ANAR, 0);
1894 }
1895 return 0;
1896 }
1897
1898
1899 static int
rio_close(struct net_device * dev)1900 rio_close (struct net_device *dev)
1901 {
1902 long ioaddr = dev->base_addr;
1903 struct netdev_private *np = dev->priv;
1904 struct sk_buff *skb;
1905 int i;
1906
1907 netif_stop_queue (dev);
1908
1909 /* Disable interrupts */
1910 writew (0, ioaddr + IntEnable);
1911
1912 /* Stop Tx and Rx logics */
1913 writel (TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl);
1914 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
1915 synchronize_irq ();
1916 #else
1917 synchronize_irq(dev->irq);
1918 #endif
1919 tasklet_kill (&np->tx_tasklet);
1920 tasklet_kill (&np->rx_tasklet);
1921 free_irq (dev->irq, dev);
1922 del_timer_sync (&np->timer);
1923
1924 /* Free all the skbuffs in the queue. */
1925 for (i = 0; i < RX_RING_SIZE; i++) {
1926 np->rx_ring[i].status = 0;
1927 np->rx_ring[i].fraginfo = 0;
1928 skb = np->rx_skbuff[i];
1929 if (skb) {
1930 pci_unmap_single (np->pdev, np->rx_ring[i].fraginfo,
1931 skb->len, PCI_DMA_FROMDEVICE);
1932 dev_kfree_skb (skb);
1933 np->rx_skbuff[i] = 0;
1934 }
1935 }
1936 for (i = 0; i < TX_RING_SIZE; i++) {
1937 skb = np->tx_skbuff[i];
1938 if (skb) {
1939 pci_unmap_single (np->pdev, np->tx_ring[i].fraginfo,
1940 skb->len, PCI_DMA_TODEVICE);
1941 dev_kfree_skb (skb);
1942 np->tx_skbuff[i] = 0;
1943 }
1944 }
1945
1946 return 0;
1947 }
1948
1949 static void __devexit
rio_remove1(struct pci_dev * pdev)1950 rio_remove1 (struct pci_dev *pdev)
1951 {
1952 struct net_device *dev = pci_get_drvdata (pdev);
1953
1954 if (dev) {
1955 struct netdev_private *np = dev->priv;
1956
1957 unregister_netdev (dev);
1958 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring,
1959 np->rx_ring_dma);
1960 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring,
1961 np->tx_ring_dma);
1962 #ifdef MEM_MAPPING
1963 iounmap ((char *) (dev->base_addr));
1964 #endif
1965 kfree (dev);
1966 pci_release_regions (pdev);
1967 pci_disable_device (pdev);
1968 }
1969 pci_set_drvdata (pdev, NULL);
1970 }
1971
1972 static struct pci_driver rio_driver = {
1973 .name = "dl2k",
1974 .id_table = rio_pci_tbl,
1975 .probe = rio_probe1,
1976 .remove = __devexit_p(rio_remove1),
1977 };
1978
1979 static int __init
rio_init(void)1980 rio_init (void)
1981 {
1982 return pci_module_init (&rio_driver);
1983 }
1984
1985 static void __exit
rio_exit(void)1986 rio_exit (void)
1987 {
1988 pci_unregister_driver (&rio_driver);
1989 }
1990
1991 module_init (rio_init);
1992 module_exit (rio_exit);
1993
1994 /*
1995
1996 Compile command:
1997
1998 gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/include -Wall -Wstrict-prototypes -O2 -c dl2k.c
1999
2000 Read Documentation/networking/dl2k.txt for details.
2001
2002 */
2003
2004