1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5 
6 #ifndef __INTEL_DP_H__
7 #define __INTEL_DP_H__
8 
9 #include <linux/types.h>
10 
11 enum intel_output_format;
12 enum pipe;
13 enum port;
14 struct drm_connector_state;
15 struct drm_encoder;
16 struct drm_i915_private;
17 struct drm_modeset_acquire_ctx;
18 struct drm_dp_vsc_sdp;
19 struct intel_atomic_state;
20 struct intel_connector;
21 struct intel_crtc_state;
22 struct intel_digital_port;
23 struct intel_dp;
24 struct intel_encoder;
25 
26 struct link_config_limits {
27 	int min_rate, max_rate;
28 	int min_lane_count, max_lane_count;
29 	int min_bpp, max_bpp;
30 };
31 
32 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
33 				       struct intel_crtc_state *pipe_config,
34 				       struct link_config_limits *limits);
35 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
36 				  const struct drm_connector_state *conn_state);
37 int intel_dp_min_bpp(enum intel_output_format output_format);
38 bool intel_dp_init_connector(struct intel_digital_port *dig_port,
39 			     struct intel_connector *intel_connector);
40 void intel_dp_set_link_params(struct intel_dp *intel_dp,
41 			      int link_rate, int lane_count);
42 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
43 					    int link_rate, u8 lane_count);
44 int intel_dp_retrain_link(struct intel_encoder *encoder,
45 			  struct drm_modeset_acquire_ctx *ctx);
46 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
47 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
48 					   const struct intel_crtc_state *crtc_state);
49 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
50 					   const struct intel_crtc_state *crtc_state,
51 					   bool enable);
52 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
53 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
54 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
55 int intel_dp_compute_config(struct intel_encoder *encoder,
56 			    struct intel_crtc_state *pipe_config,
57 			    struct drm_connector_state *conn_state);
58 bool intel_dp_is_edp(struct intel_dp *intel_dp);
59 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
60 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
61 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
62 				  bool long_hpd);
63 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
64 			    const struct drm_connector_state *conn_state);
65 void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
66 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
67 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
68 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
69 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
70 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
71 
72 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
73 			   u8 *link_bw, u8 *rate_select);
74 bool intel_dp_source_supports_tps3(struct drm_i915_private *i915);
75 bool intel_dp_source_supports_tps4(struct drm_i915_private *i915);
76 
77 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
78 int intel_dp_link_required(int pixel_clock, int bpp);
79 int intel_dp_max_data_rate(int max_link_rate, int max_lanes);
80 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
81 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
82 			    const struct drm_connector_state *conn_state);
83 void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
84 				  const struct intel_crtc_state *crtc_state,
85 				  const struct drm_connector_state *conn_state,
86 				  struct drm_dp_vsc_sdp *vsc);
87 void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
88 			    const struct intel_crtc_state *crtc_state,
89 			    const struct drm_dp_vsc_sdp *vsc);
90 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
91 			     const struct intel_crtc_state *crtc_state,
92 			     const struct drm_connector_state *conn_state);
93 void intel_read_dp_sdp(struct intel_encoder *encoder,
94 		       struct intel_crtc_state *crtc_state,
95 		       unsigned int type);
96 bool intel_digital_port_connected(struct intel_encoder *encoder);
97 
intel_dp_unused_lane_mask(int lane_count)98 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
99 {
100 	return ~((1 << lane_count) - 1) & 0xf;
101 }
102 
103 u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
104 
105 void intel_ddi_update_pipe(struct intel_atomic_state *state,
106 			   struct intel_encoder *encoder,
107 			   const struct intel_crtc_state *crtc_state,
108 			   const struct drm_connector_state *conn_state);
109 
110 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
111 				    struct intel_crtc_state *crtc_state);
112 void intel_dp_sync_state(struct intel_encoder *encoder,
113 			 const struct intel_crtc_state *crtc_state);
114 
115 void intel_dp_check_frl_training(struct intel_dp *intel_dp);
116 void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
117 				 const struct intel_crtc_state *crtc_state);
118 void intel_dp_phy_test(struct intel_encoder *encoder);
119 
120 void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
121 
122 #endif /* __INTEL_DP_H__ */
123