1 /*
2  * Compaq Hot Plug Controller Driver
3  *
4  * Copyright (C) 1995,2001 Compaq Computer Corporation
5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6  * Copyright (C) 2001 IBM
7  *
8  * All rights reserved.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or (at
13  * your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful, but
16  * WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18  * NON INFRINGEMENT.  See the GNU General Public License for more
19  * details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24  *
25  * Send feedback to <greg@kroah.com>
26  *
27  */
28 #ifndef _CPQPHP_H
29 #define _CPQPHP_H
30 
31 #include "pci_hotplug.h"
32 #include <asm/io.h>		/* for read? and write? functions */
33 #include <linux/delay.h>	/* for delays */
34 
35 #if !defined(CONFIG_HOTPLUG_PCI_COMPAQ_MODULE)
36 	#define MY_NAME	"cpqphp.o"
37 #else
38 	#define MY_NAME	THIS_MODULE->name
39 #endif
40 
41 #define dbg(fmt, arg...) do { if (cpqhp_debug) printk(KERN_DEBUG "%s: " fmt , MY_NAME , ## arg); } while (0)
42 #define err(format, arg...) printk(KERN_ERR "%s: " format , MY_NAME , ## arg)
43 #define info(format, arg...) printk(KERN_INFO "%s: " format , MY_NAME , ## arg)
44 #define warn(format, arg...) printk(KERN_WARNING "%s: " format , MY_NAME , ## arg)
45 
46 
47 
48 struct smbios_system_slot {
49 	u8 type;
50 	u8 length;
51 	u16 handle;
52 	u8 name_string_num;
53 	u8 slot_type;
54 	u8 slot_width;
55 	u8 slot_current_usage;
56 	u8 slot_length;
57 	u16 slot_number;
58 	u8 properties1;
59 	u8 properties2;
60 } __attribute__ ((packed));
61 
62 /* offsets to the smbios generic type based on the above structure layout */
63 enum smbios_system_slot_offsets {
64 	SMBIOS_SLOT_GENERIC_TYPE =	offsetof(struct smbios_system_slot, type),
65 	SMBIOS_SLOT_GENERIC_LENGTH =	offsetof(struct smbios_system_slot, length),
66 	SMBIOS_SLOT_GENERIC_HANDLE =	offsetof(struct smbios_system_slot, handle),
67 	SMBIOS_SLOT_NAME_STRING_NUM =	offsetof(struct smbios_system_slot, name_string_num),
68 	SMBIOS_SLOT_TYPE =		offsetof(struct smbios_system_slot, slot_type),
69 	SMBIOS_SLOT_WIDTH =		offsetof(struct smbios_system_slot, slot_width),
70 	SMBIOS_SLOT_CURRENT_USAGE =	offsetof(struct smbios_system_slot, slot_current_usage),
71 	SMBIOS_SLOT_LENGTH =		offsetof(struct smbios_system_slot, slot_length),
72 	SMBIOS_SLOT_NUMBER =		offsetof(struct smbios_system_slot, slot_number),
73 	SMBIOS_SLOT_PROPERTIES1 =	offsetof(struct smbios_system_slot, properties1),
74 	SMBIOS_SLOT_PROPERTIES2 =	offsetof(struct smbios_system_slot, properties2),
75 };
76 
77 struct smbios_generic {
78 	u8 type;
79 	u8 length;
80 	u16 handle;
81 } __attribute__ ((packed));
82 
83 /* offsets to the smbios generic type based on the above structure layout */
84 enum smbios_generic_offsets {
85 	SMBIOS_GENERIC_TYPE =	offsetof(struct smbios_generic, type),
86 	SMBIOS_GENERIC_LENGTH =	offsetof(struct smbios_generic, length),
87 	SMBIOS_GENERIC_HANDLE =	offsetof(struct smbios_generic, handle),
88 };
89 
90 struct smbios_entry_point {
91 	char anchor[4];
92 	u8 ep_checksum;
93 	u8 ep_length;
94 	u8 major_version;
95 	u8 minor_version;
96 	u16 max_size_entry;
97 	u8 ep_rev;
98 	u8 reserved[5];
99 	char int_anchor[5];
100 	u8 int_checksum;
101 	u16 st_length;
102 	u32 st_address;
103 	u16 number_of_entrys;
104 	u8 bcd_rev;
105 } __attribute__ ((packed));
106 
107 /* offsets to the smbios entry point based on the above structure layout */
108 enum smbios_entry_point_offsets {
109 	ANCHOR =		offsetof(struct smbios_entry_point, anchor[0]),
110 	EP_CHECKSUM =		offsetof(struct smbios_entry_point, ep_checksum),
111 	EP_LENGTH =		offsetof(struct smbios_entry_point, ep_length),
112 	MAJOR_VERSION =		offsetof(struct smbios_entry_point, major_version),
113 	MINOR_VERSION =		offsetof(struct smbios_entry_point, minor_version),
114 	MAX_SIZE_ENTRY =	offsetof(struct smbios_entry_point, max_size_entry),
115 	EP_REV =		offsetof(struct smbios_entry_point, ep_rev),
116 	INT_ANCHOR =		offsetof(struct smbios_entry_point, int_anchor[0]),
117 	INT_CHECKSUM =		offsetof(struct smbios_entry_point, int_checksum),
118 	ST_LENGTH =		offsetof(struct smbios_entry_point, st_length),
119 	ST_ADDRESS =		offsetof(struct smbios_entry_point, st_address),
120 	NUMBER_OF_ENTRYS =	offsetof(struct smbios_entry_point, number_of_entrys),
121 	BCD_REV =		offsetof(struct smbios_entry_point, bcd_rev),
122 };
123 
124 struct ctrl_reg {			/* offset */
125 	u8	slot_RST;		/* 0x00 */
126 	u8	slot_enable;		/* 0x01 */
127 	u16	misc;			/* 0x02 */
128 	u32	led_control;		/* 0x04 */
129 	u32	int_input_clear;	/* 0x08 */
130 	u32	int_mask;		/* 0x0a */
131 	u8	reserved0;		/* 0x10 */
132 	u8	reserved1;		/* 0x11 */
133 	u8	reserved2;		/* 0x12 */
134 	u8	gen_output_AB;		/* 0x13 */
135 	u32	non_int_input;		/* 0x14 */
136 	u32	reserved3;		/* 0x18 */
137 	u32	reserved4;		/* 0x1a */
138 	u32	reserved5;		/* 0x20 */
139 	u8	reserved6;		/* 0x24 */
140 	u8	reserved7;		/* 0x25 */
141 	u16	reserved8;		/* 0x26 */
142 	u8	slot_mask;		/* 0x28 */
143 	u8	reserved9;		/* 0x29 */
144 	u8	reserved10;		/* 0x2a */
145 	u8	reserved11;		/* 0x2b */
146 	u8	slot_SERR;		/* 0x2c */
147 	u8	slot_power;		/* 0x2d */
148 	u8	reserved12;		/* 0x2e */
149 	u8	reserved13;		/* 0x2f */
150 	u8	next_curr_freq;		/* 0x30 */
151 	u8	reset_freq_mode;	/* 0x31 */
152 } __attribute__ ((packed));
153 
154 /* offsets to the controller registers based on the above structure layout */
155 enum ctrl_offsets {
156 	SLOT_RST = 		offsetof(struct ctrl_reg, slot_RST),
157 	SLOT_ENABLE =		offsetof(struct ctrl_reg, slot_enable),
158 	MISC =			offsetof(struct ctrl_reg, misc),
159 	LED_CONTROL =		offsetof(struct ctrl_reg, led_control),
160 	INT_INPUT_CLEAR =	offsetof(struct ctrl_reg, int_input_clear),
161 	INT_MASK = 		offsetof(struct ctrl_reg, int_mask),
162 	CTRL_RESERVED0 = 	offsetof(struct ctrl_reg, reserved0),
163 	CTRL_RESERVED1 =	offsetof(struct ctrl_reg, reserved1),
164 	CTRL_RESERVED2 =	offsetof(struct ctrl_reg, reserved1),
165 	GEN_OUTPUT_AB = 	offsetof(struct ctrl_reg, gen_output_AB),
166 	NON_INT_INPUT = 	offsetof(struct ctrl_reg, non_int_input),
167 	CTRL_RESERVED3 =	offsetof(struct ctrl_reg, reserved3),
168 	CTRL_RESERVED4 =	offsetof(struct ctrl_reg, reserved4),
169 	CTRL_RESERVED5 =	offsetof(struct ctrl_reg, reserved5),
170 	CTRL_RESERVED6 =	offsetof(struct ctrl_reg, reserved6),
171 	CTRL_RESERVED7 =	offsetof(struct ctrl_reg, reserved7),
172 	CTRL_RESERVED8 =	offsetof(struct ctrl_reg, reserved8),
173 	SLOT_MASK = 		offsetof(struct ctrl_reg, slot_mask),
174 	CTRL_RESERVED9 = 	offsetof(struct ctrl_reg, reserved9),
175 	CTRL_RESERVED10 =	offsetof(struct ctrl_reg, reserved10),
176 	CTRL_RESERVED11 =	offsetof(struct ctrl_reg, reserved11),
177 	SLOT_SERR =		offsetof(struct ctrl_reg, slot_SERR),
178 	SLOT_POWER =		offsetof(struct ctrl_reg, slot_power),
179 	NEXT_CURR_FREQ =	offsetof(struct ctrl_reg, next_curr_freq),
180 	RESET_FREQ_MODE =	offsetof(struct ctrl_reg, reset_freq_mode),
181 };
182 
183 struct hrt {
184 	char sig0;
185 	char sig1;
186 	char sig2;
187 	char sig3;
188 	u16 unused_IRQ;
189 	u16 PCIIRQ;
190 	u8 number_of_entries;
191 	u8 revision;
192 	u16 reserved1;
193 	u32 reserved2;
194 } __attribute__ ((packed));
195 
196 /* offsets to the hotplug resource table registers based on the above structure layout */
197 enum hrt_offsets {
198 	SIG0 =			offsetof(struct hrt, sig0),
199 	SIG1 =			offsetof(struct hrt, sig1),
200 	SIG2 =			offsetof(struct hrt, sig2),
201 	SIG3 =			offsetof(struct hrt, sig3),
202 	UNUSED_IRQ =		offsetof(struct hrt, unused_IRQ),
203 	PCIIRQ =		offsetof(struct hrt, PCIIRQ),
204 	NUMBER_OF_ENTRIES =	offsetof(struct hrt, number_of_entries),
205 	REVISION =		offsetof(struct hrt, revision),
206 	HRT_RESERVED1 =		offsetof(struct hrt, reserved1),
207 	HRT_RESERVED2 =		offsetof(struct hrt, reserved2),
208 };
209 
210 struct slot_rt {
211 	u8 dev_func;
212 	u8 primary_bus;
213 	u8 secondary_bus;
214 	u8 max_bus;
215 	u16 io_base;
216 	u16 io_length;
217 	u16 mem_base;
218 	u16 mem_length;
219 	u16 pre_mem_base;
220 	u16 pre_mem_length;
221 } __attribute__ ((packed));
222 
223 /* offsets to the hotplug slot resource table registers based on the above structure layout */
224 enum slot_rt_offsets {
225 	DEV_FUNC =		offsetof(struct slot_rt, dev_func),
226 	PRIMARY_BUS = 		offsetof(struct slot_rt, primary_bus),
227 	SECONDARY_BUS = 	offsetof(struct slot_rt, secondary_bus),
228 	MAX_BUS = 		offsetof(struct slot_rt, max_bus),
229 	IO_BASE = 		offsetof(struct slot_rt, io_base),
230 	IO_LENGTH = 		offsetof(struct slot_rt, io_length),
231 	MEM_BASE = 		offsetof(struct slot_rt, mem_base),
232 	MEM_LENGTH = 		offsetof(struct slot_rt, mem_length),
233 	PRE_MEM_BASE = 		offsetof(struct slot_rt, pre_mem_base),
234 	PRE_MEM_LENGTH = 	offsetof(struct slot_rt, pre_mem_length),
235 };
236 
237 struct pci_func {
238 	struct pci_func *next;
239 	u8 bus;
240 	u8 device;
241 	u8 function;
242 	u8 is_a_board;
243 	u16 status;
244 	u8 configured;
245 	u8 switch_save;
246 	u8 presence_save;
247 	u32 base_length[0x06];
248 	u8 base_type[0x06];
249 	u16 reserved2;
250 	u32 config_space[0x20];
251 	struct pci_resource *mem_head;
252 	struct pci_resource *p_mem_head;
253 	struct pci_resource *io_head;
254 	struct pci_resource *bus_head;
255 	struct timer_list *p_task_event;
256 	struct pci_dev* pci_dev;
257 };
258 
259 #define SLOT_MAGIC	0x67267321
260 struct slot {
261 	u32 magic;
262 	struct slot *next;
263 	u8 bus;
264 	u8 device;
265 	u8 number;
266 	u8 is_a_board;
267 	u8 configured;
268 	u8 state;
269 	u8 switch_save;
270 	u8 presence_save;
271 	u32 capabilities;
272 	u16 reserved2;
273 	struct timer_list task_event;
274 	u8 hp_slot;
275 	struct controller *ctrl;
276 	void *p_sm_slot;
277 	struct hotplug_slot *hotplug_slot;
278 };
279 
280 struct pci_resource {
281 	struct pci_resource * next;
282 	u32 base;
283 	u32 length;
284 };
285 
286 struct event_info {
287 	u32 event_type;
288 	u8 hp_slot;
289 };
290 
291 struct controller {
292 	struct controller *next;
293 	u32 ctrl_int_comp;
294 	struct semaphore crit_sect;	/* critical section semaphore */
295 	void *hpc_reg;			/* cookie for our pci controller location */
296 	struct pci_resource *mem_head;
297 	struct pci_resource *p_mem_head;
298 	struct pci_resource *io_head;
299 	struct pci_resource *bus_head;
300 	struct pci_dev *pci_dev;
301 	struct pci_ops *pci_ops;
302 	struct proc_dir_entry* proc_entry;
303 	struct proc_dir_entry* proc_entry2;
304 	struct event_info event_queue[10];
305 	struct slot *slot;
306 	u8 next_event;
307 	u8 interrupt;
308 	u8 bus;
309 	u8 device;
310 	u8 function;
311 	u8 rev;
312 	u8 slot_device_offset;
313 	u8 first_slot;
314 	u8 add_support;
315 	u8 push_flag;
316 	enum pci_bus_speed speed;
317 	enum pci_bus_speed speed_capability;
318 	u8 push_button;			/* 0 = no pushbutton, 1 = pushbutton present */
319 	u8 slot_switch_type;		/* 0 = no switch, 1 = switch present */
320 	u8 defeature_PHP;		/* 0 = PHP not supported, 1 = PHP supported */
321 	u8 alternate_base_address;	/* 0 = not supported, 1 = supported */
322 	u8 pci_config_space;		/* Index/data access to working registers 0 = not supported, 1 = supported */
323 	u8 pcix_speed_capability;	/* PCI-X */
324 	u8 pcix_support;		/* PCI-X */
325 	u16 vendor_id;
326 	char proc_name[20];
327 	char proc_name2[20];
328 	struct tq_struct int_task_event;
329 	wait_queue_head_t queue;	/* sleep & wake process */
330 };
331 
332 struct irq_mapping {
333 	u8 barber_pole;
334 	u8 valid_INT;
335 	u8 interrupt[4];
336 };
337 
338 struct resource_lists {
339 	struct pci_resource *mem_head;
340 	struct pci_resource *p_mem_head;
341 	struct pci_resource *io_head;
342 	struct pci_resource *bus_head;
343 	struct irq_mapping *irqs;
344 };
345 
346 #define ROM_PHY_ADDR			0x0F0000
347 #define ROM_PHY_LEN			0x00ffff
348 
349 #define PCI_HPC_ID			0xA0F7
350 #define PCI_SUB_HPC_ID			0xA2F7
351 #define PCI_SUB_HPC_ID2			0xA2F8
352 #define PCI_SUB_HPC_ID3			0xA2F9
353 #define PCI_SUB_HPC_ID_INTC		0xA2FA
354 #define PCI_SUB_HPC_ID4			0xA2FD
355 
356 #define INT_BUTTON_IGNORE		0
357 #define INT_PRESENCE_ON			1
358 #define INT_PRESENCE_OFF		2
359 #define INT_SWITCH_CLOSE		3
360 #define INT_SWITCH_OPEN			4
361 #define INT_POWER_FAULT			5
362 #define INT_POWER_FAULT_CLEAR		6
363 #define INT_BUTTON_PRESS		7
364 #define INT_BUTTON_RELEASE		8
365 #define INT_BUTTON_CANCEL		9
366 
367 #define STATIC_STATE			0
368 #define BLINKINGON_STATE		1
369 #define BLINKINGOFF_STATE		2
370 #define POWERON_STATE			3
371 #define POWEROFF_STATE			4
372 
373 #define PCISLOT_INTERLOCK_CLOSED	0x00000001
374 #define PCISLOT_ADAPTER_PRESENT		0x00000002
375 #define PCISLOT_POWERED			0x00000004
376 #define PCISLOT_66_MHZ_OPERATION	0x00000008
377 #define PCISLOT_64_BIT_OPERATION	0x00000010
378 #define PCISLOT_REPLACE_SUPPORTED	0x00000020
379 #define PCISLOT_ADD_SUPPORTED		0x00000040
380 #define PCISLOT_INTERLOCK_SUPPORTED	0x00000080
381 #define PCISLOT_66_MHZ_SUPPORTED	0x00000100
382 #define PCISLOT_64_BIT_SUPPORTED	0x00000200
383 
384 
385 
386 #define PCI_TO_PCI_BRIDGE_CLASS		0x00060400
387 
388 
389 #define INTERLOCK_OPEN			0x00000002
390 #define ADD_NOT_SUPPORTED		0x00000003
391 #define CARD_FUNCTIONING		0x00000005
392 #define ADAPTER_NOT_SAME		0x00000006
393 #define NO_ADAPTER_PRESENT		0x00000009
394 #define NOT_ENOUGH_RESOURCES		0x0000000B
395 #define DEVICE_TYPE_NOT_SUPPORTED	0x0000000C
396 #define POWER_FAILURE			0x0000000E
397 
398 #define REMOVE_NOT_SUPPORTED		0x00000003
399 
400 
401 /*
402  * error Messages
403  */
404 #define msg_initialization_err	"Initialization failure, error=%d\n"
405 #define msg_HPC_rev_error	"Unsupported revision of the PCI hot plug controller found.\n"
406 #define msg_HPC_non_compaq_or_intel	"The PCI hot plug controller is not supported by this driver.\n"
407 #define msg_HPC_not_supported	"this system is not supported by this version of cpqphpd. Upgrade to a newer version of cpqphpd\n"
408 #define msg_unable_to_save	"unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
409 #define msg_button_on		"PCI slot #%d - powering on due to button press.\n"
410 #define msg_button_off		"PCI slot #%d - powering off due to button press.\n"
411 #define msg_button_cancel	"PCI slot #%d - action canceled due to button press.\n"
412 #define msg_button_ignore	"PCI slot #%d - button press ignored.  (action in progress...)\n"
413 
414 
415 /* Proc functions for the hotplug controller info */
416 #ifdef CONFIG_PROC_FS
417 extern int cpqhp_proc_init_ctrl		(void);
418 extern int cpqhp_proc_destroy_ctrl	(void);
419 extern int cpqhp_proc_create_ctrl	(struct controller *ctrl);
420 extern int cpqhp_proc_remove_ctrl	(struct controller *ctrl);
421 #else
cpqhp_proc_init_ctrl(void)422 static inline int cpqhp_proc_init_ctrl (void)
423 {
424 	return 0;
425 }
cpqhp_proc_destroy_ctrl(void)426 static inline int cpqhp_proc_destroy_ctrl (void)
427 {
428 	return 0;
429 }
cpqhp_proc_create_ctrl(struct controller * ctrl)430 static inline int cpqhp_proc_create_ctrl (struct controller *ctrl)
431 {
432 	return 0;
433 }
cpqhp_proc_remove_ctrl(struct controller * ctrl)434 static inline int cpqhp_proc_remove_ctrl (struct controller *ctrl)
435 {
436 	return 0;
437 }
438 #endif
439 
440 
441 /* controller functions */
442 extern void	cpqhp_pushbutton_thread		(unsigned long event_pointer);
443 extern void	cpqhp_ctrl_intr			(int IRQ, struct controller *ctrl_input, struct pt_regs *regs);
444 extern int	cpqhp_find_available_resources	(struct controller *ctrl, void *rom_start);
445 extern int	cpqhp_event_start_thread	(void);
446 extern void	cpqhp_event_stop_thread		(void);
447 extern struct pci_func *cpqhp_slot_create	(unsigned char busnumber);
448 extern struct pci_func *cpqhp_slot_find		(unsigned char bus, unsigned char device, unsigned char index);
449 extern int	cpqhp_process_SI		(struct controller *ctrl, struct pci_func *func);
450 extern int	cpqhp_process_SS		(struct controller *ctrl, struct pci_func *func);
451 extern int	cpqhp_hardware_test		(struct controller *ctrl, int test_num);
452 
453 /* resource functions */
454 extern int	cpqhp_resource_sort_and_combine	(struct pci_resource **head);
455 
456 /* pci functions */
457 extern int	cpqhp_set_irq			(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
458 extern int	cpqhp_get_bus_dev		(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot);
459 extern int	cpqhp_save_config		(struct controller *ctrl, int busnumber, int is_hot_plug);
460 extern int	cpqhp_save_base_addr_length	(struct controller *ctrl, struct pci_func * func);
461 extern int	cpqhp_save_used_resources	(struct controller *ctrl, struct pci_func * func);
462 extern int	cpqhp_configure_board		(struct controller *ctrl, struct pci_func * func);
463 extern int	cpqhp_save_slot_config		(struct controller *ctrl, struct pci_func * new_slot);
464 extern int	cpqhp_valid_replace		(struct controller *ctrl, struct pci_func * func);
465 extern void	cpqhp_destroy_board_resources	(struct pci_func * func);
466 extern int	cpqhp_return_board_resources	(struct pci_func * func, struct resource_lists * resources);
467 extern void	cpqhp_destroy_resource_list	(struct resource_lists * resources);
468 extern int	cpqhp_configure_device		(struct controller* ctrl, struct pci_func* func);
469 extern int	cpqhp_unconfigure_device	(struct pci_func* func);
470 extern struct slot *cpqhp_find_slot 		(struct controller *ctrl, u8 device);
471 
472 
473 /* Global variables */
474 extern int cpqhp_debug;
475 extern struct controller *cpqhp_ctrl_list;
476 extern struct pci_func *cpqhp_slot_list[256];
477 
478 /* these can be gotten rid of, but for debugging they are purty */
479 extern u8 cpqhp_nic_irq;
480 extern u8 cpqhp_disk_irq;
481 
482 
483 
484 
485 /* Inline functions to check the sanity of a pointer that is passed to us */
slot_paranoia_check(struct slot * slot,const char * function)486 static inline int slot_paranoia_check (struct slot *slot, const char *function)
487 {
488 	if (!slot) {
489 		dbg("%s - slot == NULL", function);
490 		return -1;
491 	}
492 	if (slot->magic != SLOT_MAGIC) {
493 		dbg("%s - bad magic number for slot", function);
494 		return -1;
495 	}
496 	if (!slot->hotplug_slot) {
497 		dbg("%s - slot->hotplug_slot == NULL!", function);
498 		return -1;
499 	}
500 	return 0;
501 }
502 
get_slot(struct hotplug_slot * hotplug_slot,const char * function)503 static inline struct slot *get_slot (struct hotplug_slot *hotplug_slot, const char *function)
504 {
505 	struct slot *slot;
506 
507 	if (!hotplug_slot) {
508 		dbg("%s - hotplug_slot == NULL\n", function);
509 		return NULL;
510 	}
511 
512 	slot = (struct slot *)hotplug_slot->private;
513 	if (slot_paranoia_check (slot, function))
514                 return NULL;
515 	return slot;
516 }
517 
518 /*
519  * return_resource
520  *
521  * Puts node back in the resource list pointed to by head
522  *
523  */
return_resource(struct pci_resource ** head,struct pci_resource * node)524 static inline void return_resource (struct pci_resource **head, struct pci_resource *node)
525 {
526 	if (!node || !head)
527 		return;
528 	node->next = *head;
529 	*head = node;
530 }
531 
set_SOGO(struct controller * ctrl)532 static inline void set_SOGO (struct controller *ctrl)
533 {
534 	u16 misc;
535 
536 	misc = readw(ctrl->hpc_reg + MISC);
537 	misc = (misc | 0x0001) & 0xFFFB;
538 	writew(misc, ctrl->hpc_reg + MISC);
539 }
540 
541 
amber_LED_on(struct controller * ctrl,u8 slot)542 static inline void amber_LED_on (struct controller *ctrl, u8 slot)
543 {
544 	u32 led_control;
545 
546 	led_control = readl(ctrl->hpc_reg + LED_CONTROL);
547 	led_control |= (0x01010000L << slot);
548 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
549 }
550 
551 
amber_LED_off(struct controller * ctrl,u8 slot)552 static inline void amber_LED_off (struct controller *ctrl, u8 slot)
553 {
554 	u32 led_control;
555 
556 	led_control = readl(ctrl->hpc_reg + LED_CONTROL);
557 	led_control &= ~(0x01010000L << slot);
558 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
559 }
560 
561 
read_amber_LED(struct controller * ctrl,u8 slot)562 static inline int read_amber_LED (struct controller *ctrl, u8 slot)
563 {
564 	u32 led_control;
565 
566 	led_control = readl(ctrl->hpc_reg + LED_CONTROL);
567 	led_control &= (0x01010000L << slot);
568 
569 	return led_control ? 1 : 0;
570 }
571 
572 
green_LED_on(struct controller * ctrl,u8 slot)573 static inline void green_LED_on (struct controller *ctrl, u8 slot)
574 {
575 	u32 led_control;
576 
577 	led_control = readl(ctrl->hpc_reg + LED_CONTROL);
578 	led_control |= 0x0101L << slot;
579 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
580 }
581 
green_LED_off(struct controller * ctrl,u8 slot)582 static inline void green_LED_off (struct controller *ctrl, u8 slot)
583 {
584 	u32 led_control;
585 
586 	led_control = readl(ctrl->hpc_reg + LED_CONTROL);
587 	led_control &= ~(0x0101L << slot);
588 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
589 }
590 
591 
green_LED_blink(struct controller * ctrl,u8 slot)592 static inline void green_LED_blink (struct controller *ctrl, u8 slot)
593 {
594 	u32 led_control;
595 
596 	led_control = readl(ctrl->hpc_reg + LED_CONTROL);
597 	led_control &= ~(0x0101L << slot);
598 	led_control |= (0x0001L << slot);
599 	writel(led_control, ctrl->hpc_reg + LED_CONTROL);
600 }
601 
602 
slot_disable(struct controller * ctrl,u8 slot)603 static inline void slot_disable (struct controller *ctrl, u8 slot)
604 {
605 	u8 slot_enable;
606 
607 	slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
608 	slot_enable &= ~(0x01 << slot);
609 	writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
610 }
611 
612 
slot_enable(struct controller * ctrl,u8 slot)613 static inline void slot_enable (struct controller *ctrl, u8 slot)
614 {
615 	u8 slot_enable;
616 
617 	slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
618 	slot_enable |= (0x01 << slot);
619 	writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
620 }
621 
622 
is_slot_enabled(struct controller * ctrl,u8 slot)623 static inline u8 is_slot_enabled (struct controller *ctrl, u8 slot)
624 {
625 	u8 slot_enable;
626 
627 	slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
628 	slot_enable &= (0x01 << slot);
629 	return slot_enable ? 1 : 0;
630 }
631 
632 
read_slot_enable(struct controller * ctrl)633 static inline u8 read_slot_enable (struct controller *ctrl)
634 {
635 	return readb(ctrl->hpc_reg + SLOT_ENABLE);
636 }
637 
638 
639 /*
640  * get_controller_speed - find the current frequency/mode of controller.
641  *
642  * @ctrl: controller to get frequency/mode for.
643  *
644  * Returns controller speed.
645  *
646  */
get_controller_speed(struct controller * ctrl)647 static inline u8 get_controller_speed (struct controller *ctrl)
648 {
649 	u8 curr_freq;
650 	u16 misc;
651 
652 	if (ctrl->pcix_support) {
653 		curr_freq = readb(ctrl->hpc_reg + NEXT_CURR_FREQ);
654 		if ((curr_freq & 0xB0) == 0xB0)
655 			return PCI_SPEED_133MHz_PCIX;
656 		if ((curr_freq & 0xA0) == 0xA0)
657 			return PCI_SPEED_100MHz_PCIX;
658 		if ((curr_freq & 0x90) == 0x90)
659 			return PCI_SPEED_66MHz_PCIX;
660 		if (curr_freq & 0x10)
661 			return PCI_SPEED_66MHz;
662 
663 		return PCI_SPEED_33MHz;
664 	}
665 
666 	misc = readw(ctrl->hpc_reg + MISC);
667 	return (misc & 0x0800) ? PCI_SPEED_66MHz : PCI_SPEED_33MHz;
668 }
669 
670 /*
671  * get_adapter_speed - find the max supported frequency/mode of adapter.
672  *
673  * @ctrl: hotplug controller.
674  * @hp_slot: hotplug slot where adapter is installed.
675  *
676  * Returns adapter speed.
677  *
678  */
get_adapter_speed(struct controller * ctrl,u8 hp_slot)679 static inline u8 get_adapter_speed (struct controller *ctrl, u8 hp_slot)
680 {
681 	u32 temp_dword = readl(ctrl->hpc_reg + NON_INT_INPUT);
682 	dbg("slot: %d, PCIXCAP: %8x\n", hp_slot, temp_dword);
683 	if (ctrl->pcix_support) {
684 		if (temp_dword & (0x10000 << hp_slot))
685 			return PCI_SPEED_133MHz_PCIX;
686 		if (temp_dword & (0x100 << hp_slot))
687 			return PCI_SPEED_66MHz_PCIX;
688 	}
689 
690 	if (temp_dword & (0x01 << hp_slot))
691 		return PCI_SPEED_66MHz;
692 
693 	return PCI_SPEED_33MHz;
694 }
695 
enable_slot_power(struct controller * ctrl,u8 slot)696 static inline void enable_slot_power (struct controller *ctrl, u8 slot)
697 {
698 	u8 slot_power;
699 
700 	slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
701 	slot_power |= (0x01 << slot);
702 	writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
703 }
704 
disable_slot_power(struct controller * ctrl,u8 slot)705 static inline void disable_slot_power (struct controller *ctrl, u8 slot)
706 {
707 	u8 slot_power;
708 
709 	slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
710 	slot_power &= ~(0x01 << slot);
711 	writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
712 }
713 
714 
cpq_get_attention_status(struct controller * ctrl,struct slot * slot)715 static inline int cpq_get_attention_status (struct controller *ctrl, struct slot *slot)
716 {
717 	u8 hp_slot;
718 
719 	if (slot == NULL)
720 		return 1;
721 
722 	hp_slot = slot->device - ctrl->slot_device_offset;
723 
724 	return read_amber_LED (ctrl, hp_slot);
725 }
726 
727 
get_slot_enabled(struct controller * ctrl,struct slot * slot)728 static inline int get_slot_enabled (struct controller *ctrl, struct slot *slot)
729 {
730 	u8 hp_slot;
731 
732 	if (slot == NULL)
733 		return 1;
734 
735 	hp_slot = slot->device - ctrl->slot_device_offset;
736 
737 	return is_slot_enabled (ctrl, hp_slot);
738 }
739 
740 
cpq_get_latch_status(struct controller * ctrl,struct slot * slot)741 static inline int cpq_get_latch_status (struct controller *ctrl, struct slot *slot)
742 {
743 	u32 status;
744 	u8 hp_slot;
745 
746 	if (slot == NULL)
747 		return 1;
748 
749 	hp_slot = slot->device - ctrl->slot_device_offset;
750 	dbg("%s: slot->device = %d, ctrl->slot_device_offset = %d \n", __FUNCTION__, slot->device, ctrl->slot_device_offset);
751 
752 	status = (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot));
753 
754 	return(status == 0) ? 1 : 0;
755 }
756 
757 
get_presence_status(struct controller * ctrl,struct slot * slot)758 static inline int get_presence_status (struct controller *ctrl, struct slot *slot)
759 {
760 	int presence_save = 0;
761 	u8 hp_slot;
762 	u32 tempdword;
763 
764 	if (slot == NULL)
765 		return 0;
766 
767 	hp_slot = slot->device - ctrl->slot_device_offset;
768 
769 	tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
770 	presence_save = (int) ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> hp_slot) & 0x02;
771 
772 	return presence_save;
773 }
774 
775 #define SLOT_NAME_SIZE 10
776 
make_slot_name(char * buffer,int buffer_size,struct slot * slot)777 static inline void make_slot_name (char *buffer, int buffer_size, struct slot *slot)
778 {
779 	snprintf (buffer, buffer_size, "%d", slot->number);
780 }
781 
782 
wait_for_ctrl_irq(struct controller * ctrl)783 static inline int wait_for_ctrl_irq (struct controller *ctrl)
784 {
785         DECLARE_WAITQUEUE(wait, current);
786 	int retval = 0;
787 
788 	dbg("%s - start\n", __FUNCTION__);
789 	add_wait_queue(&ctrl->queue, &wait);
790 	set_current_state(TASK_INTERRUPTIBLE);
791 	/* Sleep for up to 1 second to wait for the LED to change. */
792 	schedule_timeout(1*HZ);
793 	set_current_state(TASK_RUNNING);
794 	remove_wait_queue(&ctrl->queue, &wait);
795 	if (signal_pending(current))
796 		retval =  -EINTR;
797 
798 	dbg("%s - end\n", __FUNCTION__);
799 	return retval;
800 }
801 
802 /**
803  * set_controller_speed - set the frequency and/or mode of a specific
804  * controller segment.
805  *
806  * @ctrl: controller to change frequency/mode for.
807  * @adapter_speed: the speed of the adapter we want to match.
808  * @hp_slot: the slot number where the adapter is installed.
809  *
810  * Returns 0 if we successfully change frequency and/or mode to match the
811  * adapter speed.
812  *
813  */
set_controller_speed(struct controller * ctrl,u8 adapter_speed,u8 hp_slot)814 static inline u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_slot)
815 {
816 	struct slot *slot;
817 	u8 reg;
818 	u8 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
819 	u16 reg16;
820 	u32 leds = readl(ctrl->hpc_reg + LED_CONTROL);
821 
822 	if (ctrl->speed == adapter_speed)
823 		return 0;
824 
825 	/* We don't allow freq/mode changes if we find another adapter running
826 	 * in another slot on this controller */
827 	for(slot = ctrl->slot; slot; slot = slot->next) {
828 		if (slot->device == (hp_slot + ctrl->slot_device_offset))
829 			continue;
830 		if (!slot->hotplug_slot && !slot->hotplug_slot->info)
831 			continue;
832 		if (slot->hotplug_slot->info->adapter_status == 0)
833 			continue;
834 		/* If another adapter is running on the same segment but at a
835 		 * lower speed/mode, we allow the new adapter to function at
836 		 * this rate if supported */
837 		if (ctrl->speed < adapter_speed)
838 			return 0;
839 
840 		return 1;
841 	}
842 
843 	/* If the controller doesn't support freq/mode changes and the
844 	 * controller is running at a higher mode, we bail */
845 	if ((ctrl->speed > adapter_speed) && (!ctrl->pcix_speed_capability))
846 		return 1;
847 
848 	/* But we allow the adapter to run at a lower rate if possible */
849 	if ((ctrl->speed < adapter_speed) && (!ctrl->pcix_speed_capability))
850 		return 0;
851 
852 	/* We try to set the max speed supported by both the adapter and
853 	 * controller */
854 	if (ctrl->speed_capability < adapter_speed) {
855 		if (ctrl->speed == ctrl->speed_capability)
856 			return 0;
857 		adapter_speed = ctrl->speed_capability;
858 	}
859 
860 	writel(0x0L, ctrl->hpc_reg + LED_CONTROL);
861 	writeb(0x00, ctrl->hpc_reg + SLOT_ENABLE);
862 
863 	set_SOGO(ctrl);
864 	wait_for_ctrl_irq(ctrl);
865 
866 	if (adapter_speed != PCI_SPEED_133MHz_PCIX)
867 		reg = 0xF5;
868 	else
869 		reg = 0xF4;
870 	pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
871 
872 	reg16 = readw(ctrl->hpc_reg + NEXT_CURR_FREQ);
873 	reg16 &= ~0x000F;
874 	switch(adapter_speed) {
875 		case(PCI_SPEED_133MHz_PCIX):
876 			reg = 0x75;
877 			reg16 |= 0xB;
878 			break;
879 		case(PCI_SPEED_100MHz_PCIX):
880 			reg = 0x74;
881 			reg16 |= 0xA;
882 			break;
883 		case(PCI_SPEED_66MHz_PCIX):
884 			reg = 0x73;
885 			reg16 |= 0x9;
886 			break;
887 		case(PCI_SPEED_66MHz):
888 			reg = 0x73;
889 			reg16 |= 0x1;
890 			break;
891 		default: /* 33MHz PCI 2.2 */
892 			reg = 0x71;
893 			break;
894 
895 	}
896 	reg16 |= 0xB << 12;
897 	writew(reg16, ctrl->hpc_reg + NEXT_CURR_FREQ);
898 
899 	mdelay(5);
900 
901 	/* Reenable interrupts */
902 	writel(0, ctrl->hpc_reg + INT_MASK);
903 
904 	pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
905 
906 	/* Restart state machine */
907 	reg = ~0xF;
908 	pci_read_config_byte(ctrl->pci_dev, 0x43, &reg);
909 	pci_write_config_byte(ctrl->pci_dev, 0x43, reg);
910 
911 	/* Only if mode change...*/
912 	if (((ctrl->speed == PCI_SPEED_66MHz) && (adapter_speed == PCI_SPEED_66MHz_PCIX)) ||
913 		((ctrl->speed == PCI_SPEED_66MHz_PCIX) && (adapter_speed == PCI_SPEED_66MHz)))
914 			set_SOGO(ctrl);
915 
916 	wait_for_ctrl_irq(ctrl);
917 	mdelay(1100);
918 
919 	/* Restore LED/Slot state */
920 	writel(leds, ctrl->hpc_reg + LED_CONTROL);
921 	writeb(slot_power, ctrl->hpc_reg + SLOT_ENABLE);
922 
923 	set_SOGO(ctrl);
924 	wait_for_ctrl_irq(ctrl);
925 
926 	ctrl->speed = adapter_speed;
927 	slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
928 
929 	info("Successfully changed frequency/mode for adapter in slot %d\n",
930 			slot->number);
931 	return 0;
932 }
933 
934 #endif
935