1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * comedi/drivers/ni_routing/ni_route_values/ni_660x.c 4 * Route information for NI_660X boards. 5 * 6 * COMEDI - Linux Control and Measurement Device Interface 7 * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 */ 19 20 /* 21 * This file includes a list of all the values of various signals routes 22 * available on NI 660x hardware. In many cases, one does not explicitly make 23 * these routes, rather one might indicate that something is used as the source 24 * of one particular trigger or another (using *_src=TRIG_EXT). 25 * 26 * The contents of this file can be generated using the tools in 27 * comedi/drivers/ni_routing/tools. This file also contains specific notes to 28 * this family of devices. 29 * 30 * Please use those tools to help maintain the contents of this file, but be 31 * mindful to not lose the notes already made in this file, since these notes 32 * are critical to a complete undertsanding of the register values of this 33 * family. 34 */ 35 36 #include "../ni_route_values.h" 37 #include "all.h" 38 39 const struct family_route_values ni_660x_route_values = { 40 .family = "ni_660x", 41 .register_values = { 42 /* 43 * destination = { 44 * source = register value, 45 * ... 46 * } 47 */ 48 [B(NI_PFI(8))] = { 49 [B(NI_CtrInternalOutput(7))] = I(1), 50 }, 51 [B(NI_PFI(10))] = { 52 [B(NI_CtrGate(7))] = I(1), 53 }, 54 [B(NI_PFI(11))] = { 55 [B(NI_CtrSource(7))] = I(1), 56 }, 57 [B(NI_PFI(12))] = { 58 [B(NI_CtrInternalOutput(6))] = I(1), 59 }, 60 [B(NI_PFI(14))] = { 61 [B(NI_CtrGate(6))] = I(1), 62 }, 63 [B(NI_PFI(15))] = { 64 [B(NI_CtrSource(6))] = I(1), 65 }, 66 [B(NI_PFI(16))] = { 67 [B(NI_CtrInternalOutput(5))] = I(1), 68 }, 69 [B(NI_PFI(18))] = { 70 [B(NI_CtrGate(5))] = I(1), 71 }, 72 [B(NI_PFI(19))] = { 73 [B(NI_CtrSource(5))] = I(1), 74 }, 75 [B(NI_PFI(20))] = { 76 [B(NI_CtrInternalOutput(4))] = I(1), 77 }, 78 [B(NI_PFI(22))] = { 79 [B(NI_CtrGate(4))] = I(1), 80 }, 81 [B(NI_PFI(23))] = { 82 [B(NI_CtrSource(4))] = I(1), 83 }, 84 [B(NI_PFI(24))] = { 85 [B(NI_CtrInternalOutput(3))] = I(1), 86 }, 87 [B(NI_PFI(26))] = { 88 [B(NI_CtrGate(3))] = I(1), 89 }, 90 [B(NI_PFI(27))] = { 91 [B(NI_CtrSource(3))] = I(1), 92 }, 93 [B(NI_PFI(28))] = { 94 [B(NI_CtrInternalOutput(2))] = I(1), 95 }, 96 [B(NI_PFI(30))] = { 97 [B(NI_CtrGate(2))] = I(1), 98 }, 99 [B(NI_PFI(31))] = { 100 [B(NI_CtrSource(2))] = I(1), 101 }, 102 [B(NI_PFI(32))] = { 103 [B(NI_CtrInternalOutput(1))] = I(1), 104 }, 105 [B(NI_PFI(34))] = { 106 [B(NI_CtrGate(1))] = I(1), 107 }, 108 [B(NI_PFI(35))] = { 109 [B(NI_CtrSource(1))] = I(1), 110 }, 111 [B(NI_PFI(36))] = { 112 [B(NI_CtrInternalOutput(0))] = I(1), 113 }, 114 [B(NI_PFI(38))] = { 115 [B(NI_CtrGate(0))] = I(1), 116 }, 117 [B(NI_PFI(39))] = { 118 [B(NI_CtrSource(0))] = I(1), 119 }, 120 [B(NI_CtrSource(0))] = { 121 /* These are not currently implemented in ni modules */ 122 [B(NI_PFI(11))] = U(9), 123 [B(NI_PFI(15))] = U(8), 124 [B(NI_PFI(19))] = U(7), 125 [B(NI_PFI(23))] = U(6), 126 [B(NI_PFI(27))] = U(5), 127 [B(NI_PFI(31))] = U(4), 128 [B(NI_PFI(35))] = U(3), 129 [B(NI_PFI(39))] = U(2 /* or 1 */), 130 [B(TRIGGER_LINE(0))] = U(11), 131 [B(TRIGGER_LINE(1))] = U(12), 132 [B(TRIGGER_LINE(2))] = U(13), 133 [B(TRIGGER_LINE(3))] = U(14), 134 [B(TRIGGER_LINE(4))] = U(15), 135 [B(TRIGGER_LINE(5))] = U(16), 136 [B(TRIGGER_LINE(6))] = U(17), 137 [B(NI_CtrGate(1))] = U(10), 138 [B(NI_20MHzTimebase)] = U(0), 139 [B(NI_80MHzTimebase)] = U(30), 140 [B(NI_100kHzTimebase)] = U(18), 141 [B(NI_LogicLow)] = U(31), 142 }, 143 [B(NI_CtrSource(1))] = { 144 /* These are not currently implemented in ni modules */ 145 [B(NI_PFI(11))] = U(9), 146 [B(NI_PFI(15))] = U(8), 147 [B(NI_PFI(19))] = U(7), 148 [B(NI_PFI(23))] = U(6), 149 [B(NI_PFI(27))] = U(5), 150 [B(NI_PFI(31))] = U(4), 151 [B(NI_PFI(35))] = U(3 /* or 1 */), 152 [B(NI_PFI(39))] = U(2), 153 [B(TRIGGER_LINE(0))] = U(11), 154 [B(TRIGGER_LINE(1))] = U(12), 155 [B(TRIGGER_LINE(2))] = U(13), 156 [B(TRIGGER_LINE(3))] = U(14), 157 [B(TRIGGER_LINE(4))] = U(15), 158 [B(TRIGGER_LINE(5))] = U(16), 159 [B(TRIGGER_LINE(6))] = U(17), 160 [B(NI_CtrGate(2))] = U(10), 161 [B(NI_20MHzTimebase)] = U(0), 162 [B(NI_80MHzTimebase)] = U(30), 163 [B(NI_100kHzTimebase)] = U(18), 164 [B(NI_LogicLow)] = U(31), 165 }, 166 [B(NI_CtrSource(2))] = { 167 /* These are not currently implemented in ni modules */ 168 [B(NI_PFI(11))] = U(9), 169 [B(NI_PFI(15))] = U(8), 170 [B(NI_PFI(19))] = U(7), 171 [B(NI_PFI(23))] = U(6), 172 [B(NI_PFI(27))] = U(5), 173 [B(NI_PFI(31))] = U(4 /* or 1 */), 174 [B(NI_PFI(35))] = U(3), 175 [B(NI_PFI(39))] = U(2), 176 [B(TRIGGER_LINE(0))] = U(11), 177 [B(TRIGGER_LINE(1))] = U(12), 178 [B(TRIGGER_LINE(2))] = U(13), 179 [B(TRIGGER_LINE(3))] = U(14), 180 [B(TRIGGER_LINE(4))] = U(15), 181 [B(TRIGGER_LINE(5))] = U(16), 182 [B(TRIGGER_LINE(6))] = U(17), 183 [B(NI_CtrGate(3))] = U(10), 184 [B(NI_20MHzTimebase)] = U(0), 185 [B(NI_80MHzTimebase)] = U(30), 186 [B(NI_100kHzTimebase)] = U(18), 187 [B(NI_LogicLow)] = U(31), 188 }, 189 [B(NI_CtrSource(3))] = { 190 /* These are not currently implemented in ni modules */ 191 [B(NI_PFI(11))] = U(9), 192 [B(NI_PFI(15))] = U(8), 193 [B(NI_PFI(19))] = U(7), 194 [B(NI_PFI(23))] = U(6), 195 [B(NI_PFI(27))] = U(5 /* or 1 */), 196 [B(NI_PFI(31))] = U(4), 197 [B(NI_PFI(35))] = U(3), 198 [B(NI_PFI(39))] = U(2), 199 [B(TRIGGER_LINE(0))] = U(11), 200 [B(TRIGGER_LINE(1))] = U(12), 201 [B(TRIGGER_LINE(2))] = U(13), 202 [B(TRIGGER_LINE(3))] = U(14), 203 [B(TRIGGER_LINE(4))] = U(15), 204 [B(TRIGGER_LINE(5))] = U(16), 205 [B(TRIGGER_LINE(6))] = U(17), 206 [B(NI_CtrGate(4))] = U(10), 207 [B(NI_20MHzTimebase)] = U(0), 208 [B(NI_80MHzTimebase)] = U(30), 209 [B(NI_100kHzTimebase)] = U(18), 210 [B(NI_LogicLow)] = U(31), 211 }, 212 [B(NI_CtrSource(4))] = { 213 /* These are not currently implemented in ni modules */ 214 [B(NI_PFI(11))] = U(9), 215 [B(NI_PFI(15))] = U(8), 216 [B(NI_PFI(19))] = U(7), 217 [B(NI_PFI(23))] = U(6 /* or 1 */), 218 [B(NI_PFI(27))] = U(5), 219 [B(NI_PFI(31))] = U(4), 220 [B(NI_PFI(35))] = U(3), 221 [B(NI_PFI(39))] = U(2), 222 [B(TRIGGER_LINE(0))] = U(11), 223 [B(TRIGGER_LINE(1))] = U(12), 224 [B(TRIGGER_LINE(2))] = U(13), 225 [B(TRIGGER_LINE(3))] = U(14), 226 [B(TRIGGER_LINE(4))] = U(15), 227 [B(TRIGGER_LINE(5))] = U(16), 228 [B(TRIGGER_LINE(6))] = U(17), 229 [B(NI_CtrGate(5))] = U(10), 230 [B(NI_20MHzTimebase)] = U(0), 231 [B(NI_80MHzTimebase)] = U(30), 232 [B(NI_100kHzTimebase)] = U(18), 233 [B(NI_LogicLow)] = U(31), 234 }, 235 [B(NI_CtrSource(5))] = { 236 /* These are not currently implemented in ni modules */ 237 [B(NI_PFI(11))] = U(9), 238 [B(NI_PFI(15))] = U(8), 239 [B(NI_PFI(19))] = U(7 /* or 1 */), 240 [B(NI_PFI(23))] = U(6), 241 [B(NI_PFI(27))] = U(5), 242 [B(NI_PFI(31))] = U(4), 243 [B(NI_PFI(35))] = U(3), 244 [B(NI_PFI(39))] = U(2), 245 [B(TRIGGER_LINE(0))] = U(11), 246 [B(TRIGGER_LINE(1))] = U(12), 247 [B(TRIGGER_LINE(2))] = U(13), 248 [B(TRIGGER_LINE(3))] = U(14), 249 [B(TRIGGER_LINE(4))] = U(15), 250 [B(TRIGGER_LINE(5))] = U(16), 251 [B(TRIGGER_LINE(6))] = U(17), 252 [B(NI_CtrGate(6))] = U(10), 253 [B(NI_20MHzTimebase)] = U(0), 254 [B(NI_80MHzTimebase)] = U(30), 255 [B(NI_100kHzTimebase)] = U(18), 256 [B(NI_LogicLow)] = U(31), 257 }, 258 [B(NI_CtrSource(6))] = { 259 /* These are not currently implemented in ni modules */ 260 [B(NI_PFI(11))] = U(9), 261 [B(NI_PFI(15))] = U(8 /* or 1 */), 262 [B(NI_PFI(19))] = U(7), 263 [B(NI_PFI(23))] = U(6), 264 [B(NI_PFI(27))] = U(5), 265 [B(NI_PFI(31))] = U(4), 266 [B(NI_PFI(35))] = U(3), 267 [B(NI_PFI(39))] = U(2), 268 [B(TRIGGER_LINE(0))] = U(11), 269 [B(TRIGGER_LINE(1))] = U(12), 270 [B(TRIGGER_LINE(2))] = U(13), 271 [B(TRIGGER_LINE(3))] = U(14), 272 [B(TRIGGER_LINE(4))] = U(15), 273 [B(TRIGGER_LINE(5))] = U(16), 274 [B(TRIGGER_LINE(6))] = U(17), 275 [B(NI_CtrGate(7))] = U(10), 276 [B(NI_20MHzTimebase)] = U(0), 277 [B(NI_80MHzTimebase)] = U(30), 278 [B(NI_100kHzTimebase)] = U(18), 279 [B(NI_LogicLow)] = U(31), 280 }, 281 [B(NI_CtrSource(7))] = { 282 /* These are not currently implemented in ni modules */ 283 [B(NI_PFI(11))] = U(9 /* or 1 */), 284 [B(NI_PFI(15))] = U(8), 285 [B(NI_PFI(19))] = U(7), 286 [B(NI_PFI(23))] = U(6), 287 [B(NI_PFI(27))] = U(5), 288 [B(NI_PFI(31))] = U(4), 289 [B(NI_PFI(35))] = U(3), 290 [B(NI_PFI(39))] = U(2), 291 [B(TRIGGER_LINE(0))] = U(11), 292 [B(TRIGGER_LINE(1))] = U(12), 293 [B(TRIGGER_LINE(2))] = U(13), 294 [B(TRIGGER_LINE(3))] = U(14), 295 [B(TRIGGER_LINE(4))] = U(15), 296 [B(TRIGGER_LINE(5))] = U(16), 297 [B(TRIGGER_LINE(6))] = U(17), 298 [B(NI_CtrGate(0))] = U(10), 299 [B(NI_20MHzTimebase)] = U(0), 300 [B(NI_80MHzTimebase)] = U(30), 301 [B(NI_100kHzTimebase)] = U(18), 302 [B(NI_LogicLow)] = U(31), 303 }, 304 [B(NI_CtrGate(0))] = { 305 [B(NI_PFI(10))] = I(9), 306 [B(NI_PFI(14))] = I(8), 307 [B(NI_PFI(18))] = I(7), 308 [B(NI_PFI(22))] = I(6), 309 [B(NI_PFI(26))] = I(5), 310 [B(NI_PFI(30))] = I(4), 311 [B(NI_PFI(34))] = I(3), 312 [B(NI_PFI(38))] = I(2 /* or 1 */), 313 [B(NI_PFI(39))] = I(0), 314 [B(TRIGGER_LINE(0))] = I(11), 315 [B(TRIGGER_LINE(1))] = I(12), 316 [B(TRIGGER_LINE(2))] = I(13), 317 [B(TRIGGER_LINE(3))] = I(14), 318 [B(TRIGGER_LINE(4))] = I(15), 319 [B(TRIGGER_LINE(5))] = I(16), 320 [B(TRIGGER_LINE(6))] = I(17), 321 [B(NI_CtrSource(1))] = I(10), 322 [B(NI_CtrInternalOutput(1))] = I(20), 323 [B(NI_LogicLow)] = I(31 /* or 30 */), 324 }, 325 [B(NI_CtrGate(1))] = { 326 [B(NI_PFI(10))] = I(9), 327 [B(NI_PFI(14))] = I(8), 328 [B(NI_PFI(18))] = I(7), 329 [B(NI_PFI(22))] = I(6), 330 [B(NI_PFI(26))] = I(5), 331 [B(NI_PFI(30))] = I(4), 332 [B(NI_PFI(34))] = I(3 /* or 1 */), 333 [B(NI_PFI(35))] = I(0), 334 [B(NI_PFI(38))] = I(2), 335 [B(TRIGGER_LINE(0))] = I(11), 336 [B(TRIGGER_LINE(1))] = I(12), 337 [B(TRIGGER_LINE(2))] = I(13), 338 [B(TRIGGER_LINE(3))] = I(14), 339 [B(TRIGGER_LINE(4))] = I(15), 340 [B(TRIGGER_LINE(5))] = I(16), 341 [B(TRIGGER_LINE(6))] = I(17), 342 [B(NI_CtrSource(2))] = I(10), 343 [B(NI_CtrInternalOutput(2))] = I(20), 344 [B(NI_LogicLow)] = I(31 /* or 30 */), 345 }, 346 [B(NI_CtrGate(2))] = { 347 [B(NI_PFI(10))] = I(9), 348 [B(NI_PFI(14))] = I(8), 349 [B(NI_PFI(18))] = I(7), 350 [B(NI_PFI(22))] = I(6), 351 [B(NI_PFI(26))] = I(5), 352 [B(NI_PFI(30))] = I(4 /* or 1 */), 353 [B(NI_PFI(31))] = I(0), 354 [B(NI_PFI(34))] = I(3), 355 [B(NI_PFI(38))] = I(2), 356 [B(TRIGGER_LINE(0))] = I(11), 357 [B(TRIGGER_LINE(1))] = I(12), 358 [B(TRIGGER_LINE(2))] = I(13), 359 [B(TRIGGER_LINE(3))] = I(14), 360 [B(TRIGGER_LINE(4))] = I(15), 361 [B(TRIGGER_LINE(5))] = I(16), 362 [B(TRIGGER_LINE(6))] = I(17), 363 [B(NI_CtrSource(3))] = I(10), 364 [B(NI_CtrInternalOutput(3))] = I(20), 365 [B(NI_LogicLow)] = I(31 /* or 30 */), 366 }, 367 [B(NI_CtrGate(3))] = { 368 [B(NI_PFI(10))] = I(9), 369 [B(NI_PFI(14))] = I(8), 370 [B(NI_PFI(18))] = I(7), 371 [B(NI_PFI(22))] = I(6), 372 [B(NI_PFI(26))] = I(5 /* or 1 */), 373 [B(NI_PFI(27))] = I(0), 374 [B(NI_PFI(30))] = I(4), 375 [B(NI_PFI(34))] = I(3), 376 [B(NI_PFI(38))] = I(2), 377 [B(TRIGGER_LINE(0))] = I(11), 378 [B(TRIGGER_LINE(1))] = I(12), 379 [B(TRIGGER_LINE(2))] = I(13), 380 [B(TRIGGER_LINE(3))] = I(14), 381 [B(TRIGGER_LINE(4))] = I(15), 382 [B(TRIGGER_LINE(5))] = I(16), 383 [B(TRIGGER_LINE(6))] = I(17), 384 [B(NI_CtrSource(4))] = I(10), 385 [B(NI_CtrInternalOutput(4))] = I(20), 386 [B(NI_LogicLow)] = I(31 /* or 30 */), 387 }, 388 [B(NI_CtrGate(4))] = { 389 [B(NI_PFI(10))] = I(9), 390 [B(NI_PFI(14))] = I(8), 391 [B(NI_PFI(18))] = I(7), 392 [B(NI_PFI(22))] = I(6 /* or 1 */), 393 [B(NI_PFI(23))] = I(0), 394 [B(NI_PFI(26))] = I(5), 395 [B(NI_PFI(30))] = I(4), 396 [B(NI_PFI(34))] = I(3), 397 [B(NI_PFI(38))] = I(2), 398 [B(TRIGGER_LINE(0))] = I(11), 399 [B(TRIGGER_LINE(1))] = I(12), 400 [B(TRIGGER_LINE(2))] = I(13), 401 [B(TRIGGER_LINE(3))] = I(14), 402 [B(TRIGGER_LINE(4))] = I(15), 403 [B(TRIGGER_LINE(5))] = I(16), 404 [B(TRIGGER_LINE(6))] = I(17), 405 [B(NI_CtrSource(5))] = I(10), 406 [B(NI_CtrInternalOutput(5))] = I(20), 407 [B(NI_LogicLow)] = I(31 /* or 30 */), 408 }, 409 [B(NI_CtrGate(5))] = { 410 [B(NI_PFI(10))] = I(9), 411 [B(NI_PFI(14))] = I(8), 412 [B(NI_PFI(18))] = I(7 /* or 1 */), 413 [B(NI_PFI(19))] = I(0), 414 [B(NI_PFI(22))] = I(6), 415 [B(NI_PFI(26))] = I(5), 416 [B(NI_PFI(30))] = I(4), 417 [B(NI_PFI(34))] = I(3), 418 [B(NI_PFI(38))] = I(2), 419 [B(TRIGGER_LINE(0))] = I(11), 420 [B(TRIGGER_LINE(1))] = I(12), 421 [B(TRIGGER_LINE(2))] = I(13), 422 [B(TRIGGER_LINE(3))] = I(14), 423 [B(TRIGGER_LINE(4))] = I(15), 424 [B(TRIGGER_LINE(5))] = I(16), 425 [B(TRIGGER_LINE(6))] = I(17), 426 [B(NI_CtrSource(6))] = I(10), 427 [B(NI_CtrInternalOutput(6))] = I(20), 428 [B(NI_LogicLow)] = I(31 /* or 30 */), 429 }, 430 [B(NI_CtrGate(6))] = { 431 [B(NI_PFI(10))] = I(9), 432 [B(NI_PFI(14))] = I(8 /* or 1 */), 433 [B(NI_PFI(15))] = I(0), 434 [B(NI_PFI(18))] = I(7), 435 [B(NI_PFI(22))] = I(6), 436 [B(NI_PFI(26))] = I(5), 437 [B(NI_PFI(30))] = I(4), 438 [B(NI_PFI(34))] = I(3), 439 [B(NI_PFI(38))] = I(2), 440 [B(TRIGGER_LINE(0))] = I(11), 441 [B(TRIGGER_LINE(1))] = I(12), 442 [B(TRIGGER_LINE(2))] = I(13), 443 [B(TRIGGER_LINE(3))] = I(14), 444 [B(TRIGGER_LINE(4))] = I(15), 445 [B(TRIGGER_LINE(5))] = I(16), 446 [B(TRIGGER_LINE(6))] = I(17), 447 [B(NI_CtrSource(7))] = I(10), 448 [B(NI_CtrInternalOutput(7))] = I(20), 449 [B(NI_LogicLow)] = I(31 /* or 30 */), 450 }, 451 [B(NI_CtrGate(7))] = { 452 [B(NI_PFI(10))] = I(9 /* or 1 */), 453 [B(NI_PFI(11))] = I(0), 454 [B(NI_PFI(14))] = I(8), 455 [B(NI_PFI(18))] = I(7), 456 [B(NI_PFI(22))] = I(6), 457 [B(NI_PFI(26))] = I(5), 458 [B(NI_PFI(30))] = I(4), 459 [B(NI_PFI(34))] = I(3), 460 [B(NI_PFI(38))] = I(2), 461 [B(TRIGGER_LINE(0))] = I(11), 462 [B(TRIGGER_LINE(1))] = I(12), 463 [B(TRIGGER_LINE(2))] = I(13), 464 [B(TRIGGER_LINE(3))] = I(14), 465 [B(TRIGGER_LINE(4))] = I(15), 466 [B(TRIGGER_LINE(5))] = I(16), 467 [B(TRIGGER_LINE(6))] = I(17), 468 [B(NI_CtrSource(0))] = I(10), 469 [B(NI_CtrInternalOutput(0))] = I(20), 470 [B(NI_LogicLow)] = I(31 /* or 30 */), 471 }, 472 [B(NI_CtrAux(0))] = { 473 [B(NI_PFI(9))] = I(9), 474 [B(NI_PFI(13))] = I(8), 475 [B(NI_PFI(17))] = I(7), 476 [B(NI_PFI(21))] = I(6), 477 [B(NI_PFI(25))] = I(5), 478 [B(NI_PFI(29))] = I(4), 479 [B(NI_PFI(33))] = I(3), 480 [B(NI_PFI(37))] = I(2 /* or 1 */), 481 [B(NI_PFI(39))] = I(0), 482 [B(TRIGGER_LINE(0))] = I(11), 483 [B(TRIGGER_LINE(1))] = I(12), 484 [B(TRIGGER_LINE(2))] = I(13), 485 [B(TRIGGER_LINE(3))] = I(14), 486 [B(TRIGGER_LINE(4))] = I(15), 487 [B(TRIGGER_LINE(5))] = I(16), 488 [B(TRIGGER_LINE(6))] = I(17), 489 [B(NI_CtrSource(1))] = I(10), 490 [B(NI_CtrGate(1))] = I(30), 491 [B(NI_CtrInternalOutput(1))] = I(20), 492 [B(NI_LogicLow)] = I(31), 493 }, 494 [B(NI_CtrAux(1))] = { 495 [B(NI_PFI(9))] = I(9), 496 [B(NI_PFI(13))] = I(8), 497 [B(NI_PFI(17))] = I(7), 498 [B(NI_PFI(21))] = I(6), 499 [B(NI_PFI(25))] = I(5), 500 [B(NI_PFI(29))] = I(4), 501 [B(NI_PFI(33))] = I(3 /* or 1 */), 502 [B(NI_PFI(35))] = I(0), 503 [B(NI_PFI(37))] = I(2), 504 [B(TRIGGER_LINE(0))] = I(11), 505 [B(TRIGGER_LINE(1))] = I(12), 506 [B(TRIGGER_LINE(2))] = I(13), 507 [B(TRIGGER_LINE(3))] = I(14), 508 [B(TRIGGER_LINE(4))] = I(15), 509 [B(TRIGGER_LINE(5))] = I(16), 510 [B(TRIGGER_LINE(6))] = I(17), 511 [B(NI_CtrSource(2))] = I(10), 512 [B(NI_CtrGate(2))] = I(30), 513 [B(NI_CtrInternalOutput(2))] = I(20), 514 [B(NI_LogicLow)] = I(31), 515 }, 516 [B(NI_CtrAux(2))] = { 517 [B(NI_PFI(9))] = I(9), 518 [B(NI_PFI(13))] = I(8), 519 [B(NI_PFI(17))] = I(7), 520 [B(NI_PFI(21))] = I(6), 521 [B(NI_PFI(25))] = I(5), 522 [B(NI_PFI(29))] = I(4 /* or 1 */), 523 [B(NI_PFI(31))] = I(0), 524 [B(NI_PFI(33))] = I(3), 525 [B(NI_PFI(37))] = I(2), 526 [B(TRIGGER_LINE(0))] = I(11), 527 [B(TRIGGER_LINE(1))] = I(12), 528 [B(TRIGGER_LINE(2))] = I(13), 529 [B(TRIGGER_LINE(3))] = I(14), 530 [B(TRIGGER_LINE(4))] = I(15), 531 [B(TRIGGER_LINE(5))] = I(16), 532 [B(TRIGGER_LINE(6))] = I(17), 533 [B(NI_CtrSource(3))] = I(10), 534 [B(NI_CtrGate(3))] = I(30), 535 [B(NI_CtrInternalOutput(3))] = I(20), 536 [B(NI_LogicLow)] = I(31), 537 }, 538 [B(NI_CtrAux(3))] = { 539 [B(NI_PFI(9))] = I(9), 540 [B(NI_PFI(13))] = I(8), 541 [B(NI_PFI(17))] = I(7), 542 [B(NI_PFI(21))] = I(6), 543 [B(NI_PFI(25))] = I(5 /* or 1 */), 544 [B(NI_PFI(27))] = I(0), 545 [B(NI_PFI(29))] = I(4), 546 [B(NI_PFI(33))] = I(3), 547 [B(NI_PFI(37))] = I(2), 548 [B(TRIGGER_LINE(0))] = I(11), 549 [B(TRIGGER_LINE(1))] = I(12), 550 [B(TRIGGER_LINE(2))] = I(13), 551 [B(TRIGGER_LINE(3))] = I(14), 552 [B(TRIGGER_LINE(4))] = I(15), 553 [B(TRIGGER_LINE(5))] = I(16), 554 [B(TRIGGER_LINE(6))] = I(17), 555 [B(NI_CtrSource(4))] = I(10), 556 [B(NI_CtrGate(4))] = I(30), 557 [B(NI_CtrInternalOutput(4))] = I(20), 558 [B(NI_LogicLow)] = I(31), 559 }, 560 [B(NI_CtrAux(4))] = { 561 [B(NI_PFI(9))] = I(9), 562 [B(NI_PFI(13))] = I(8), 563 [B(NI_PFI(17))] = I(7), 564 [B(NI_PFI(21))] = I(6 /* or 1 */), 565 [B(NI_PFI(23))] = I(0), 566 [B(NI_PFI(25))] = I(5), 567 [B(NI_PFI(29))] = I(4), 568 [B(NI_PFI(33))] = I(3), 569 [B(NI_PFI(37))] = I(2), 570 [B(TRIGGER_LINE(0))] = I(11), 571 [B(TRIGGER_LINE(1))] = I(12), 572 [B(TRIGGER_LINE(2))] = I(13), 573 [B(TRIGGER_LINE(3))] = I(14), 574 [B(TRIGGER_LINE(4))] = I(15), 575 [B(TRIGGER_LINE(5))] = I(16), 576 [B(TRIGGER_LINE(6))] = I(17), 577 [B(NI_CtrSource(5))] = I(10), 578 [B(NI_CtrGate(5))] = I(30), 579 [B(NI_CtrInternalOutput(5))] = I(20), 580 [B(NI_LogicLow)] = I(31), 581 }, 582 [B(NI_CtrAux(5))] = { 583 [B(NI_PFI(9))] = I(9), 584 [B(NI_PFI(13))] = I(8), 585 [B(NI_PFI(17))] = I(7 /* or 1 */), 586 [B(NI_PFI(19))] = I(0), 587 [B(NI_PFI(21))] = I(6), 588 [B(NI_PFI(25))] = I(5), 589 [B(NI_PFI(29))] = I(4), 590 [B(NI_PFI(33))] = I(3), 591 [B(NI_PFI(37))] = I(2), 592 [B(TRIGGER_LINE(0))] = I(11), 593 [B(TRIGGER_LINE(1))] = I(12), 594 [B(TRIGGER_LINE(2))] = I(13), 595 [B(TRIGGER_LINE(3))] = I(14), 596 [B(TRIGGER_LINE(4))] = I(15), 597 [B(TRIGGER_LINE(5))] = I(16), 598 [B(TRIGGER_LINE(6))] = I(17), 599 [B(NI_CtrSource(6))] = I(10), 600 [B(NI_CtrGate(6))] = I(30), 601 [B(NI_CtrInternalOutput(6))] = I(20), 602 [B(NI_LogicLow)] = I(31), 603 }, 604 [B(NI_CtrAux(6))] = { 605 [B(NI_PFI(9))] = I(9), 606 [B(NI_PFI(13))] = I(8 /* or 1 */), 607 [B(NI_PFI(15))] = I(0), 608 [B(NI_PFI(17))] = I(7), 609 [B(NI_PFI(21))] = I(6), 610 [B(NI_PFI(25))] = I(5), 611 [B(NI_PFI(29))] = I(4), 612 [B(NI_PFI(33))] = I(3), 613 [B(NI_PFI(37))] = I(2), 614 [B(TRIGGER_LINE(0))] = I(11), 615 [B(TRIGGER_LINE(1))] = I(12), 616 [B(TRIGGER_LINE(2))] = I(13), 617 [B(TRIGGER_LINE(3))] = I(14), 618 [B(TRIGGER_LINE(4))] = I(15), 619 [B(TRIGGER_LINE(5))] = I(16), 620 [B(TRIGGER_LINE(6))] = I(17), 621 [B(NI_CtrSource(7))] = I(10), 622 [B(NI_CtrGate(7))] = I(30), 623 [B(NI_CtrInternalOutput(7))] = I(20), 624 [B(NI_LogicLow)] = I(31), 625 }, 626 [B(NI_CtrAux(7))] = { 627 [B(NI_PFI(9))] = I(9 /* or 1 */), 628 [B(NI_PFI(11))] = I(0), 629 [B(NI_PFI(13))] = I(8), 630 [B(NI_PFI(17))] = I(7), 631 [B(NI_PFI(21))] = I(6), 632 [B(NI_PFI(25))] = I(5), 633 [B(NI_PFI(29))] = I(4), 634 [B(NI_PFI(33))] = I(3), 635 [B(NI_PFI(37))] = I(2), 636 [B(TRIGGER_LINE(0))] = I(11), 637 [B(TRIGGER_LINE(1))] = I(12), 638 [B(TRIGGER_LINE(2))] = I(13), 639 [B(TRIGGER_LINE(3))] = I(14), 640 [B(TRIGGER_LINE(4))] = I(15), 641 [B(TRIGGER_LINE(5))] = I(16), 642 [B(TRIGGER_LINE(6))] = I(17), 643 [B(NI_CtrSource(0))] = I(10), 644 [B(NI_CtrGate(0))] = I(30), 645 [B(NI_CtrInternalOutput(0))] = I(20), 646 [B(NI_LogicLow)] = I(31), 647 }, 648 }, 649 }; 650