1 #ifndef _I386_BYTEORDER_H
2 #define _I386_BYTEORDER_H
3
4 #include <asm/types.h>
5 #include <linux/compiler.h>
6
7 #ifdef __GNUC__
8
9 /* For avoiding bswap on i386 */
10 #ifdef __KERNEL__
11 #include <linux/config.h>
12 #endif
13
___arch__swab32(__u32 x)14 static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
15 {
16 #ifdef CONFIG_X86_BSWAP
17 __asm__("bswap %0" : "=r" (x) : "0" (x));
18 #else
19 __asm__("xchgb %b0,%h0\n\t" /* swap lower bytes */
20 "rorl $16,%0\n\t" /* swap words */
21 "xchgb %b0,%h0" /* swap higher bytes */
22 :"=q" (x)
23 : "0" (x));
24 #endif
25 return x;
26 }
27
28 /* gcc should generate this for open coded C now too. May be worth switching to
29 it because inline assembly cannot be scheduled. -AK */
___arch__swab16(__u16 x)30 static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
31 {
32 __asm__("xchgb %b0,%h0" /* swap bytes */
33 : "=q" (x)
34 : "0" (x));
35 return x;
36 }
37
38
___arch__swab64(__u64 val)39 static inline __u64 ___arch__swab64(__u64 val)
40 {
41 union {
42 struct { __u32 a,b; } s;
43 __u64 u;
44 } v;
45 v.u = val;
46 #ifdef CONFIG_X86_BSWAP
47 asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
48 : "=r" (v.s.a), "=r" (v.s.b)
49 : "0" (v.s.a), "1" (v.s.b));
50 #else
51 v.s.a = ___arch__swab32(v.s.a);
52 v.s.b = ___arch__swab32(v.s.b);
53 asm("xchgl %0,%1" : "=r" (v.s.a), "=r" (v.s.b) : "0" (v.s.a), "1" (v.s.b));
54 #endif
55 return v.u;
56 }
57
58 #define __arch__swab64(x) ___arch__swab64(x)
59 #define __arch__swab32(x) ___arch__swab32(x)
60 #define __arch__swab16(x) ___arch__swab16(x)
61
62 #define __BYTEORDER_HAS_U64__
63
64 #endif /* __GNUC__ */
65
66 #include <linux/byteorder/little_endian.h>
67
68 #endif /* _I386_BYTEORDER_H */
69