1 #ifndef _ASM_X86_IO_APIC_H
2 #define _ASM_X86_IO_APIC_H
3
4 #include <linux/types.h>
5 #include <asm/mpspec.h>
6 #include <asm/apicdef.h>
7 #include <asm/irq_vectors.h>
8
9 /*
10 * Intel IO-APIC support for SMP and UP systems.
11 *
12 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
13 */
14
15 /* I/O Unit Redirection Table */
16 #define IO_APIC_REDIR_VECTOR_MASK 0x000FF
17 #define IO_APIC_REDIR_DEST_LOGICAL 0x00800
18 #define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
19 #define IO_APIC_REDIR_SEND_PENDING (1 << 12)
20 #define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
21 #define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
22 #define IO_APIC_REDIR_MASKED (1 << 16)
23
24 /*
25 * The structure of the IO-APIC:
26 */
27 union IO_APIC_reg_00 {
28 u32 raw;
29 struct {
30 u32 __reserved_2 : 14,
31 LTS : 1,
32 delivery_type : 1,
33 __reserved_1 : 8,
34 ID : 8;
35 } __attribute__ ((packed)) bits;
36 };
37
38 union IO_APIC_reg_01 {
39 u32 raw;
40 struct {
41 u32 version : 8,
42 __reserved_2 : 7,
43 PRQ : 1,
44 entries : 8,
45 __reserved_1 : 8;
46 } __attribute__ ((packed)) bits;
47 };
48
49 union IO_APIC_reg_02 {
50 u32 raw;
51 struct {
52 u32 __reserved_2 : 24,
53 arbitration : 4,
54 __reserved_1 : 4;
55 } __attribute__ ((packed)) bits;
56 };
57
58 union IO_APIC_reg_03 {
59 u32 raw;
60 struct {
61 u32 boot_DT : 1,
62 __reserved_1 : 31;
63 } __attribute__ ((packed)) bits;
64 };
65
66 struct IO_APIC_route_entry {
67 __u32 vector : 8,
68 delivery_mode : 3, /* 000: FIXED
69 * 001: lowest prio
70 * 111: ExtINT
71 */
72 dest_mode : 1, /* 0: physical, 1: logical */
73 delivery_status : 1,
74 polarity : 1,
75 irr : 1,
76 trigger : 1, /* 0: edge, 1: level */
77 mask : 1, /* 0: enabled, 1: disabled */
78 __reserved_2 : 15;
79
80 __u32 __reserved_3 : 24,
81 dest : 8;
82 } __attribute__ ((packed));
83
84 struct IR_IO_APIC_route_entry {
85 __u64 vector : 8,
86 zero : 3,
87 index2 : 1,
88 delivery_status : 1,
89 polarity : 1,
90 irr : 1,
91 trigger : 1,
92 mask : 1,
93 reserved : 31,
94 format : 1,
95 index : 15;
96 } __attribute__ ((packed));
97
98 #define IOAPIC_AUTO -1
99 #define IOAPIC_EDGE 0
100 #define IOAPIC_LEVEL 1
101
102 #ifdef CONFIG_X86_IO_APIC
103
104 /*
105 * # of IO-APICs and # of IRQ routing registers
106 */
107 extern int nr_ioapics;
108 extern int nr_ioapic_registers[MAX_IO_APICS];
109
110 #define MP_MAX_IOAPIC_PIN 127
111
112 /* I/O APIC entries */
113 extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
114
115 /* # of MP IRQ source entries */
116 extern int mp_irq_entries;
117
118 /* MP IRQ source entries */
119 extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
120
121 /* non-0 if default (table-less) MP configuration */
122 extern int mpc_default_type;
123
124 /* Older SiS APIC requires we rewrite the index register */
125 extern int sis_apic_bug;
126
127 /* 1 if "noapic" boot option passed */
128 extern int skip_ioapic_setup;
129
130 /* 1 if "noapic" boot option passed */
131 extern int noioapicquirk;
132
133 /* -1 if "noapic" boot option passed */
134 extern int noioapicreroute;
135
136 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
137 extern int timer_through_8259;
138
139 /*
140 * If we use the IO-APIC for IRQ routing, disable automatic
141 * assignment of PCI IRQ's.
142 */
143 #define io_apic_assign_pci_irqs \
144 (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
145
146 struct io_apic_irq_attr;
147 extern int io_apic_set_pci_routing(struct device *dev, int irq,
148 struct io_apic_irq_attr *irq_attr);
149 void setup_IO_APIC_irq_extra(u32 gsi);
150 extern void ioapic_and_gsi_init(void);
151 extern void ioapic_insert_resources(void);
152
153 int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr);
154
155 extern struct IO_APIC_route_entry **alloc_ioapic_entries(void);
156 extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries);
157 extern int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
158 extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
159 extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries);
160
161 extern int get_nr_irqs_gsi(void);
162
163 extern void setup_ioapic_ids_from_mpc(void);
164 extern void setup_ioapic_ids_from_mpc_nocheck(void);
165
166 struct mp_ioapic_gsi{
167 u32 gsi_base;
168 u32 gsi_end;
169 };
170 extern struct mp_ioapic_gsi mp_gsi_routing[];
171 extern u32 gsi_top;
172 int mp_find_ioapic(u32 gsi);
173 int mp_find_ioapic_pin(int ioapic, u32 gsi);
174 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
175 extern void __init pre_init_apic_IRQ0(void);
176
177 extern void mp_save_irq(struct mpc_intsrc *m);
178
179 extern void disable_ioapic_support(void);
180
181 #else /* !CONFIG_X86_IO_APIC */
182
183 #define io_apic_assign_pci_irqs 0
184 #define setup_ioapic_ids_from_mpc x86_init_noop
185 static const int timer_through_8259 = 0;
ioapic_and_gsi_init(void)186 static inline void ioapic_and_gsi_init(void) { }
ioapic_insert_resources(void)187 static inline void ioapic_insert_resources(void) { }
188 #define gsi_top (NR_IRQS_LEGACY)
mp_find_ioapic(u32 gsi)189 static inline int mp_find_ioapic(u32 gsi) { return 0; }
190
191 struct io_apic_irq_attr;
io_apic_set_pci_routing(struct device * dev,int irq,struct io_apic_irq_attr * irq_attr)192 static inline int io_apic_set_pci_routing(struct device *dev, int irq,
193 struct io_apic_irq_attr *irq_attr) { return 0; }
194
alloc_ioapic_entries(void)195 static inline struct IO_APIC_route_entry **alloc_ioapic_entries(void)
196 {
197 return NULL;
198 }
199
free_ioapic_entries(struct IO_APIC_route_entry ** ent)200 static inline void free_ioapic_entries(struct IO_APIC_route_entry **ent) { }
save_IO_APIC_setup(struct IO_APIC_route_entry ** ent)201 static inline int save_IO_APIC_setup(struct IO_APIC_route_entry **ent)
202 {
203 return -ENOMEM;
204 }
205
mask_IO_APIC_setup(struct IO_APIC_route_entry ** ent)206 static inline void mask_IO_APIC_setup(struct IO_APIC_route_entry **ent) { }
restore_IO_APIC_setup(struct IO_APIC_route_entry ** ent)207 static inline int restore_IO_APIC_setup(struct IO_APIC_route_entry **ent)
208 {
209 return -ENOMEM;
210 }
211
mp_save_irq(struct mpc_intsrc * m)212 static inline void mp_save_irq(struct mpc_intsrc *m) { };
disable_ioapic_support(void)213 static inline void disable_ioapic_support(void) { }
214 #endif
215
216 #endif /* _ASM_X86_IO_APIC_H */
217