1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/fpu.c
7 *
8 * Copyright (C) 2001 Manuela Cirronis, Paolo Alberelli
9 *
10 * Started from SH4 version:
11 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
12 *
13 */
14
15 #include <linux/sched.h>
16 #include <linux/signal.h>
17 #include <asm/processor.h>
18 #include <asm/user.h>
19 #include <asm/io.h>
20
21 /*
22 * Initially load the FPU with signalling NANS. This bit pattern
23 * has the property that no matter whether considered as single or as
24 * double precision, it still represents a signalling NAN.
25 */
26 #define sNAN64 0xFFFFFFFFFFFFFFFFULL
27 #define sNAN32 0xFFFFFFFFUL
28
29 static union sh_fpu_union init_fpuregs = {
30 .hard = {
31 .fp_regs = { [0 ... 63] = sNAN32 },
32 .fpscr = FPSCR_INIT
33 }
34 };
35 #if 0
36 static struct sh_fpu_hard_struct init_fpuregs = {
37 { [0 ... 63] = sNAN32 },
38 FPSCR_INIT
39 };
40 #endif
41
fpsave(struct sh_fpu_hard_struct * fpregs)42 inline void fpsave(struct sh_fpu_hard_struct *fpregs)
43 {
44 asm volatile("fst.p %0, (0*8)," __p(0) "\n\t"
45 "fst.p %0, (1*8)," __p(2) "\n\t"
46 "fst.p %0, (2*8)," __p(4) "\n\t"
47 "fst.p %0, (3*8)," __p(6) "\n\t"
48 "fst.p %0, (4*8)," __p(8) "\n\t"
49 "fst.p %0, (5*8)," __p(10) "\n\t"
50 "fst.p %0, (6*8)," __p(12) "\n\t"
51 "fst.p %0, (7*8)," __p(14) "\n\t"
52 "fst.p %0, (8*8)," __p(16) "\n\t"
53 "fst.p %0, (9*8)," __p(18) "\n\t"
54 "fst.p %0, (10*8)," __p(20) "\n\t"
55 "fst.p %0, (11*8)," __p(22) "\n\t"
56 "fst.p %0, (12*8)," __p(24) "\n\t"
57 "fst.p %0, (13*8)," __p(26) "\n\t"
58 "fst.p %0, (14*8)," __p(28) "\n\t"
59 "fst.p %0, (15*8)," __p(30) "\n\t"
60 "fst.p %0, (16*8)," __p(32) "\n\t"
61 "fst.p %0, (17*8)," __p(34) "\n\t"
62 "fst.p %0, (18*8)," __p(36) "\n\t"
63 "fst.p %0, (19*8)," __p(38) "\n\t"
64 "fst.p %0, (20*8)," __p(40) "\n\t"
65 "fst.p %0, (21*8)," __p(42) "\n\t"
66 "fst.p %0, (22*8)," __p(44) "\n\t"
67 "fst.p %0, (23*8)," __p(46) "\n\t"
68 "fst.p %0, (24*8)," __p(48) "\n\t"
69 "fst.p %0, (25*8)," __p(50) "\n\t"
70 "fst.p %0, (26*8)," __p(52) "\n\t"
71 "fst.p %0, (27*8)," __p(54) "\n\t"
72 "fst.p %0, (28*8)," __p(56) "\n\t"
73 "fst.p %0, (29*8)," __p(58) "\n\t"
74 "fst.p %0, (30*8)," __p(60) "\n\t"
75 "fst.p %0, (31*8)," __p(62) "\n\t"
76
77 "_fgetscr " __f(63) "\n\t"
78 "fst.s %0, (32*8)," __f(63) "\n\t"
79 : /* no output */
80 : "r" (fpregs)
81 : "memory");
82 }
83
84
85 static inline void
fpload(struct sh_fpu_hard_struct * fpregs)86 fpload(struct sh_fpu_hard_struct *fpregs)
87 {
88 asm volatile("fld.p %0, (0*8)," __p(0) "\n\t"
89 "fld.p %0, (1*8)," __p(2) "\n\t"
90 "fld.p %0, (2*8)," __p(4) "\n\t"
91 "fld.p %0, (3*8)," __p(6) "\n\t"
92 "fld.p %0, (4*8)," __p(8) "\n\t"
93 "fld.p %0, (5*8)," __p(10) "\n\t"
94 "fld.p %0, (6*8)," __p(12) "\n\t"
95 "fld.p %0, (7*8)," __p(14) "\n\t"
96 "fld.p %0, (8*8)," __p(16) "\n\t"
97 "fld.p %0, (9*8)," __p(18) "\n\t"
98 "fld.p %0, (10*8)," __p(20) "\n\t"
99 "fld.p %0, (11*8)," __p(22) "\n\t"
100 "fld.p %0, (12*8)," __p(24) "\n\t"
101 "fld.p %0, (13*8)," __p(26) "\n\t"
102 "fld.p %0, (14*8)," __p(28) "\n\t"
103 "fld.p %0, (15*8)," __p(30) "\n\t"
104 "fld.p %0, (16*8)," __p(32) "\n\t"
105 "fld.p %0, (17*8)," __p(34) "\n\t"
106 "fld.p %0, (18*8)," __p(36) "\n\t"
107 "fld.p %0, (19*8)," __p(38) "\n\t"
108 "fld.p %0, (20*8)," __p(40) "\n\t"
109 "fld.p %0, (21*8)," __p(42) "\n\t"
110 "fld.p %0, (22*8)," __p(44) "\n\t"
111 "fld.p %0, (23*8)," __p(46) "\n\t"
112 "fld.p %0, (24*8)," __p(48) "\n\t"
113 "fld.p %0, (25*8)," __p(50) "\n\t"
114 "fld.p %0, (26*8)," __p(52) "\n\t"
115 "fld.p %0, (27*8)," __p(54) "\n\t"
116 "fld.p %0, (28*8)," __p(56) "\n\t"
117 "fld.p %0, (29*8)," __p(58) "\n\t"
118 "fld.p %0, (30*8)," __p(60) "\n\t"
119
120 "fld.s %0, (32*8)," __f(63) "\n\t"
121 "_fputscr " __f(63) "\n\t"
122
123 "fld.p %0, (31*8)," __p(62) "\n\t"
124 : /* no output */
125 : "r" (fpregs) );
126 }
127
fpinit(struct sh_fpu_hard_struct * fpregs)128 void fpinit(struct sh_fpu_hard_struct *fpregs)
129 {
130 *fpregs = init_fpuregs.hard;
131 }
132
133 asmlinkage void
do_fpu_error(unsigned long ex,struct pt_regs * regs)134 do_fpu_error(unsigned long ex, struct pt_regs *regs)
135 {
136 struct task_struct *tsk = current;
137
138 regs->pc += 4;
139
140 tsk->thread.trap_no = 11;
141 tsk->thread.error_code = 0;
142 force_sig(SIGFPE, tsk);
143 }
144
145
146 asmlinkage void
do_fpu_state_restore(unsigned long ex,struct pt_regs * regs)147 do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
148 {
149 void die(const char * str, struct pt_regs * regs, long err);
150
151 #if 0
152 printk("do_fpu_state_restore (pid %d, used_math %d, last_used_math pid %d)\n",
153 current->pid, current->used_math,
154 last_task_used_math ? last_task_used_math->pid : -1);
155 #endif
156
157 if (! user_mode(regs))
158 die("FPU used in kernel", regs, ex);
159
160 regs->sr &= ~SR_FD;
161
162 if (last_task_used_math == current)
163 return;
164
165 grab_fpu();
166 if (last_task_used_math != NULL) {
167 /* Other processes fpu state, save away */
168 fpsave(&last_task_used_math->thread.fpu.hard);
169 }
170 last_task_used_math = current;
171 if (current->used_math) {
172 fpload(¤t->thread.fpu.hard);
173 } else {
174 /* First time FPU user. */
175 fpload(&init_fpuregs.hard);
176 current->used_math = 1;
177 }
178 release_fpu();
179 }
180
181