1 /*
2  * arch/sh/kernel/cpu/shmobile/pm.c
3  *
4  * Power management support code for SuperH Mobile
5  *
6  *  Copyright (C) 2009 Magnus Damm
7  *
8  * This file is subject to the terms and conditions of the GNU General Public
9  * License.  See the file "COPYING" in the main directory of this archive
10  * for more details.
11  */
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/io.h>
15 #include <linux/suspend.h>
16 #include <asm/suspend.h>
17 #include <asm/uaccess.h>
18 #include <asm/cacheflush.h>
19 
20 /*
21  * Notifier lists for pre/post sleep notification
22  */
23 ATOMIC_NOTIFIER_HEAD(sh_mobile_pre_sleep_notifier_list);
24 ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list);
25 
26 /*
27  * Sleep modes available on SuperH Mobile:
28  *
29  * Sleep mode is just plain "sleep" instruction
30  * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
31  * Standby Self-Refresh mode is above plus stopped clocks
32  */
33 #define SUSP_MODE_SLEEP		(SUSP_SH_SLEEP)
34 #define SUSP_MODE_SLEEP_SF	(SUSP_SH_SLEEP | SUSP_SH_SF)
35 #define SUSP_MODE_STANDBY_SF	(SUSP_SH_STANDBY | SUSP_SH_SF)
36 #define SUSP_MODE_RSTANDBY_SF \
37 	(SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_REGS | SUSP_SH_SF)
38  /*
39   * U-standby mode is unsupported since it needs bootloader hacks
40   */
41 
42 #ifdef CONFIG_CPU_SUBTYPE_SH7724
43 #define RAM_BASE 0xfd800000 /* RSMEM */
44 #else
45 #define RAM_BASE 0xe5200000 /* ILRAM */
46 #endif
47 
sh_mobile_call_standby(unsigned long mode)48 void sh_mobile_call_standby(unsigned long mode)
49 {
50 	void *onchip_mem = (void *)RAM_BASE;
51 	struct sh_sleep_data *sdp = onchip_mem;
52 	void (*standby_onchip_mem)(unsigned long, unsigned long);
53 
54 	/* code located directly after data structure */
55 	standby_onchip_mem = (void *)(sdp + 1);
56 
57 	atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list,
58 				   mode, NULL);
59 
60 	/* flush the caches if MMU flag is set */
61 	if (mode & SUSP_SH_MMU)
62 		flush_cache_all();
63 
64 	/* Let assembly snippet in on-chip memory handle the rest */
65 	standby_onchip_mem(mode, RAM_BASE);
66 
67 	atomic_notifier_call_chain(&sh_mobile_post_sleep_notifier_list,
68 				   mode, NULL);
69 }
70 
71 extern char sh_mobile_sleep_enter_start;
72 extern char sh_mobile_sleep_enter_end;
73 
74 extern char sh_mobile_sleep_resume_start;
75 extern char sh_mobile_sleep_resume_end;
76 
77 unsigned long sh_mobile_sleep_supported = SUSP_SH_SLEEP;
78 
sh_mobile_register_self_refresh(unsigned long flags,void * pre_start,void * pre_end,void * post_start,void * post_end)79 void sh_mobile_register_self_refresh(unsigned long flags,
80 				     void *pre_start, void *pre_end,
81 				     void *post_start, void *post_end)
82 {
83 	void *onchip_mem = (void *)RAM_BASE;
84 	void *vp;
85 	struct sh_sleep_data *sdp;
86 	int n;
87 
88 	/* part 0: data area */
89 	sdp = onchip_mem;
90 	sdp->addr.stbcr = 0xa4150020; /* STBCR */
91 	sdp->addr.bar = 0xa4150040; /* BAR */
92 	sdp->addr.pteh = 0xff000000; /* PTEH */
93 	sdp->addr.ptel = 0xff000004; /* PTEL */
94 	sdp->addr.ttb = 0xff000008; /* TTB */
95 	sdp->addr.tea = 0xff00000c; /* TEA */
96 	sdp->addr.mmucr = 0xff000010; /* MMUCR */
97 	sdp->addr.ptea = 0xff000034; /* PTEA */
98 	sdp->addr.pascr = 0xff000070; /* PASCR */
99 	sdp->addr.irmcr = 0xff000078; /* IRMCR */
100 	sdp->addr.ccr = 0xff00001c; /* CCR */
101 	sdp->addr.ramcr = 0xff000074; /* RAMCR */
102 	vp = sdp + 1;
103 
104 	/* part 1: common code to enter sleep mode */
105 	n = &sh_mobile_sleep_enter_end - &sh_mobile_sleep_enter_start;
106 	memcpy(vp, &sh_mobile_sleep_enter_start, n);
107 	vp += roundup(n, 4);
108 
109 	/* part 2: board specific code to enter self-refresh mode */
110 	n = pre_end - pre_start;
111 	memcpy(vp, pre_start, n);
112 	sdp->sf_pre = (unsigned long)vp;
113 	vp += roundup(n, 4);
114 
115 	/* part 3: board specific code to resume from self-refresh mode */
116 	n = post_end - post_start;
117 	memcpy(vp, post_start, n);
118 	sdp->sf_post = (unsigned long)vp;
119 	vp += roundup(n, 4);
120 
121 	/* part 4: common code to resume from sleep mode */
122 	WARN_ON(vp > (onchip_mem + 0x600));
123 	vp = onchip_mem + 0x600; /* located at interrupt vector */
124 	n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start;
125 	memcpy(vp, &sh_mobile_sleep_resume_start, n);
126 	sdp->resume = (unsigned long)vp;
127 
128 	sh_mobile_sleep_supported |= flags;
129 }
130 
sh_pm_enter(suspend_state_t state)131 static int sh_pm_enter(suspend_state_t state)
132 {
133 	if (!(sh_mobile_sleep_supported & SUSP_MODE_STANDBY_SF))
134 		return -ENXIO;
135 
136 	local_irq_disable();
137 	set_bl_bit();
138 	sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
139 	local_irq_disable();
140 	clear_bl_bit();
141 	return 0;
142 }
143 
144 static const struct platform_suspend_ops sh_pm_ops = {
145 	.enter          = sh_pm_enter,
146 	.valid          = suspend_valid_only_mem,
147 };
148 
sh_pm_init(void)149 static int __init sh_pm_init(void)
150 {
151 	suspend_set_ops(&sh_pm_ops);
152 	sh_mobile_setup_cpuidle();
153 	return 0;
154 }
155 
156 late_initcall(sh_pm_init);
157