1 /*
2 * Copyright 2002 Momentum Computer
3 * Author: mdharm@momenco.com
4 *
5 * arch/mips/momentum/jaguar_atx/mv-irq.c
6 * Interrupt routines for mv64340. Interrupt numbers are assigned from
7 * MV64340_IRQ_BASE to MV64340_IRQ_BASE+64.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel.h>
18 #include <asm/ptrace.h>
19 #include <linux/config.h>
20 #include <linux/sched.h>
21 #include <linux/kernel_stat.h>
22 #include <asm/io.h>
23 #include <asm/irq.h>
24 #include <asm/mv64340.h>
25
26 extern unsigned int do_IRQ(int irq, struct pt_regs *regs);
27
28 #define MV64340_IRQ_BASE 16
29
ls1bit32(unsigned int x)30 static inline int ls1bit32(unsigned int x)
31 {
32 int b = 31, s;
33
34 s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
35 s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
36 s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
37 s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
38 s = 1; if (x << 1 == 0) s = 0; b -= s;
39
40 return b;
41 }
42
43 /* mask off an interrupt -- 1 is enable, 0 is disable */
mask_mv64340_irq(unsigned int irq)44 static inline void mask_mv64340_irq(unsigned int irq)
45 {
46 uint32_t value;
47
48 if (irq < (MV64340_IRQ_BASE + 32)) {
49 MV_READ(MV64340_INTERRUPT0_MASK_0_LOW, &value);
50 value &= ~(1 << (irq - MV64340_IRQ_BASE));
51 MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
52 } else {
53 MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH, &value);
54 value &= ~(1 << (irq - (MV64340_IRQ_BASE - 32)));
55 MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
56 }
57 }
58
59 /* unmask an interrupt -- 1 is enable, 0 is disable */
unmask_mv64340_irq(unsigned int irq)60 static inline void unmask_mv64340_irq(unsigned int irq)
61 {
62 uint32_t value;
63
64 if (irq < (MV64340_IRQ_BASE + 32)) {
65 MV_READ(MV64340_INTERRUPT0_MASK_0_LOW, &value);
66 value |= 1 << (irq - MV64340_IRQ_BASE);
67 MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
68 } else {
69 MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH, &value);
70 value |= 1 << (irq - (MV64340_IRQ_BASE - 32));
71 MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
72 }
73 }
74
75 /*
76 * Enables the IRQ on Marvell Chip
77 */
enable_mv64340_irq(unsigned int irq)78 static void enable_mv64340_irq(unsigned int irq)
79 {
80 unmask_mv64340_irq(irq);
81 }
82
83 /*
84 * Initialize the IRQ on Marvell Chip
85 */
startup_mv64340_irq(unsigned int irq)86 static unsigned int startup_mv64340_irq(unsigned int irq)
87 {
88 unmask_mv64340_irq(irq);
89 return 0;
90 }
91
92 /*
93 * Disables the IRQ on Marvell Chip
94 */
disable_mv64340_irq(unsigned int irq)95 static void disable_mv64340_irq(unsigned int irq)
96 {
97 mask_mv64340_irq(irq);
98 }
99
100 /*
101 * Masks and ACKs an IRQ
102 */
mask_and_ack_mv64340_irq(unsigned int irq)103 static void mask_and_ack_mv64340_irq(unsigned int irq)
104 {
105 mask_mv64340_irq(irq);
106 }
107
108 /*
109 * End IRQ processing
110 */
end_mv64340_irq(unsigned int irq)111 static void end_mv64340_irq(unsigned int irq)
112 {
113 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
114 unmask_mv64340_irq(irq);
115 }
116
117 /*
118 * Interrupt handler for interrupts coming from the Marvell chip.
119 * It could be built in ethernet ports etc...
120 */
ll_mv64340_irq(struct pt_regs * regs)121 void ll_mv64340_irq(struct pt_regs *regs)
122 {
123 unsigned int irq_src_low, irq_src_high;
124 unsigned int irq_mask_low, irq_mask_high;
125
126 /* read the interrupt status registers */
127 MV_READ(MV64340_INTERRUPT0_MASK_0_LOW, &irq_mask_low);
128 MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH, &irq_mask_high);
129 MV_READ(MV64340_MAIN_INTERRUPT_CAUSE_LOW, &irq_src_low);
130 MV_READ(MV64340_MAIN_INTERRUPT_CAUSE_HIGH, &irq_src_high);
131
132 /* mask for just the interrupts we want */
133 irq_src_low &= irq_mask_low;
134 irq_src_high &= irq_mask_high;
135
136 if (irq_src_low)
137 do_IRQ(ls1bit32(irq_src_low) + MV64340_IRQ_BASE, regs);
138 else
139 do_IRQ(ls1bit32(irq_src_high) + MV64340_IRQ_BASE + 32, regs);
140 }
141
142 #define shutdown_mv64340_irq disable_mv64340_irq
143
144 struct hw_interrupt_type mv64340_irq_type = {
145 "MV-64340",
146 startup_mv64340_irq,
147 shutdown_mv64340_irq,
148 enable_mv64340_irq,
149 disable_mv64340_irq,
150 mask_and_ack_mv64340_irq,
151 end_mv64340_irq,
152 NULL
153 };
154
mv64340_irq_init(void)155 void mv64340_irq_init(void)
156 {
157 int i;
158
159 /* Reset irq handlers pointers to NULL */
160 for (i = MV64340_IRQ_BASE; i < (MV64340_IRQ_BASE + 64); i++) {
161 irq_desc[i].status = IRQ_DISABLED;
162 irq_desc[i].action = 0;
163 irq_desc[i].depth = 2;
164 irq_desc[i].handler = &mv64340_irq_type;
165 }
166 }
167