1 /*
2 * linux/arch/cris/mm/init.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Copyright (C) 2000,2001 Axis Communications AB
6 *
7 * Authors: Bjorn Wesen (bjornw@axis.com)
8 *
9 * $Log: init.c,v $
10 * Revision 1.38 2003/04/01 14:12:08 starvik
11 * Added loglevel for lots of printks
12 *
13 * Revision 1.37 2003/01/22 06:54:47 starvik
14 * Fixed warnings issued by GCC 3.2.1
15 *
16 * Revision 1.36 2003/01/09 17:59:55 starvik
17 * Added init_ioremap to initcalls
18 *
19 * Revision 1.35 2002/05/17 05:33:59 starvik
20 * Limit cache flush range to the size of the cache
21 *
22 * Revision 1.34 2002/04/22 11:48:51 johana
23 * Added KERN_INFO (2.4.19-pre7)
24 *
25 * Revision 1.33 2002/03/19 15:22:17 bjornw
26 * Added flush_etrax_cache
27 *
28 * Revision 1.32 2002/03/15 17:09:31 bjornw
29 * Added prepare_rx_descriptor as a workaround for a bug
30 *
31 * Revision 1.31 2001/11/13 16:22:00 bjornw
32 * Skip calculating totalram and sharedram in si_meminfo
33 *
34 * Revision 1.30 2001/11/12 19:02:10 pkj
35 * Fixed compiler warnings.
36 *
37 * Revision 1.29 2001/07/25 16:09:50 bjornw
38 * val->sharedram will stay 0
39 *
40 * Revision 1.28 2001/06/28 16:30:17 bjornw
41 * Oops. This needs to wait until 2.4.6 is merged
42 *
43 * Revision 1.27 2001/06/28 14:04:07 bjornw
44 * Fill in sharedram
45 *
46 * Revision 1.26 2001/06/18 06:36:02 hp
47 * Enable free_initmem of __init-type pages
48 *
49 * Revision 1.25 2001/06/13 00:02:23 bjornw
50 * Use a separate variable to store the current pgd to avoid races in schedule
51 *
52 * Revision 1.24 2001/05/15 00:52:20 hp
53 * Only map segment 0xa as seg if CONFIG_JULIETTE
54 *
55 * Revision 1.23 2001/04/04 14:35:40 bjornw
56 * * Removed get_pte_slow and friends (2.4.3 change)
57 * * Removed bad_pmd handling (2.4.3 change)
58 *
59 * Revision 1.22 2001/04/04 13:38:04 matsfg
60 * Moved ioremap to a separate function instead
61 *
62 * Revision 1.21 2001/03/27 09:28:33 bjornw
63 * ioremap used too early - lets try it in mem_init instead
64 *
65 * Revision 1.20 2001/03/23 07:39:21 starvik
66 * Corrected according to review remarks
67 *
68 * Revision 1.19 2001/03/15 14:25:17 bjornw
69 * More general shadow registers and ioremaped addresses for external I/O
70 *
71 * Revision 1.18 2001/02/23 12:46:44 bjornw
72 * * 0xc was not CSE1; 0x8 is, same as uncached flash, so we move the uncached
73 * flash during CRIS_LOW_MAP from 0xe to 0x8 so both the flash and the I/O
74 * is mapped straight over (for !CRIS_LOW_MAP the uncached flash is still 0xe)
75 *
76 * Revision 1.17 2001/02/22 15:05:21 bjornw
77 * Map 0x9 straight over during LOW_MAP to allow for memory mapped LEDs
78 *
79 * Revision 1.16 2001/02/22 15:02:35 bjornw
80 * Map 0xc straight over during LOW_MAP to allow for memory mapped I/O
81 *
82 * Revision 1.15 2001/01/10 21:12:10 bjornw
83 * loops_per_sec -> loops_per_jiffy
84 *
85 * Revision 1.14 2000/11/22 16:23:20 bjornw
86 * Initialize totalhigh counters to 0 to make /proc/meminfo look nice.
87 *
88 * Revision 1.13 2000/11/21 16:37:51 bjornw
89 * Temporarily disable initmem freeing
90 *
91 * Revision 1.12 2000/11/21 13:55:07 bjornw
92 * Use CONFIG_CRIS_LOW_MAP for the low VM map instead of explicit CPU type
93 *
94 * Revision 1.11 2000/10/06 12:38:22 bjornw
95 * Cast empty_bad_page correctly (should really be of * type from the start..
96 *
97 * Revision 1.10 2000/10/04 16:53:57 bjornw
98 * Fix memory-map due to LX features
99 *
100 * Revision 1.9 2000/09/13 15:47:49 bjornw
101 * Wrong count in reserved-pages loop
102 *
103 * Revision 1.8 2000/09/13 14:35:10 bjornw
104 * 2.4.0-test8 added a new arg to free_area_init_node
105 *
106 * Revision 1.7 2000/08/17 15:35:55 bjornw
107 * 2.4.0-test6 removed MAP_NR and inserted virt_to_page
108 *
109 *
110 */
111
112 #include <linux/config.h>
113 #include <linux/signal.h>
114 #include <linux/sched.h>
115 #include <linux/kernel.h>
116 #include <linux/errno.h>
117 #include <linux/string.h>
118 #include <linux/types.h>
119 #include <linux/ptrace.h>
120 #include <linux/mman.h>
121 #include <linux/mm.h>
122 #include <linux/swap.h>
123 #include <linux/smp.h>
124 #include <linux/bootmem.h>
125 #include <linux/init.h>
126
127 #include <asm/system.h>
128 #include <asm/segment.h>
129 #include <asm/pgalloc.h>
130 #include <asm/pgtable.h>
131 #include <asm/dma.h>
132 #include <asm/svinto.h>
133 #include <asm/io.h>
134 #include <asm/mmu_context.h>
135
136 static unsigned long totalram_pages;
137
138 struct pgtable_cache_struct quicklists; /* see asm/pgalloc.h */
139
140 const char bad_pmd_string[] = "Bad pmd in pte_alloc: %08lx\n";
141
142 extern void die_if_kernel(char *,struct pt_regs *,long);
143 extern void show_net_buffers(void);
144 extern void tlb_init(void);
145
146
147 unsigned long empty_zero_page;
148
149 /* trim the page-table cache if necessary */
150
151 int
do_check_pgt_cache(int low,int high)152 do_check_pgt_cache(int low, int high)
153 {
154 int freed = 0;
155
156 if(pgtable_cache_size > high) {
157 do {
158 if(pgd_quicklist) {
159 free_pgd_slow(get_pgd_fast());
160 freed++;
161 }
162 if(pmd_quicklist) {
163 pmd_free_slow(pmd_alloc_one_fast(NULL, 0));
164 freed++;
165 }
166 if(pte_quicklist) {
167 pte_free_slow(pte_alloc_one_fast(NULL, 0));
168 freed++;
169 }
170 } while(pgtable_cache_size > low);
171 }
172 return freed;
173 }
174
175 void
show_mem(void)176 show_mem(void)
177 {
178 int i,free = 0,total = 0,cached = 0, reserved = 0, nonshared = 0;
179 int shared = 0;
180
181 printk("\nMem-info:\n");
182 show_free_areas();
183 printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10));
184 i = max_mapnr;
185 while (i-- > 0) {
186 total++;
187 if (PageReserved(mem_map+i))
188 reserved++;
189 else if (PageSwapCache(mem_map+i))
190 cached++;
191 else if (!page_count(mem_map+i))
192 free++;
193 else if (page_count(mem_map+i) == 1)
194 nonshared++;
195 else
196 shared += page_count(mem_map+i) - 1;
197 }
198 printk("%d pages of RAM\n",total);
199 printk("%d free pages\n",free);
200 printk("%d reserved pages\n",reserved);
201 printk("%d pages nonshared\n",nonshared);
202 printk("%d pages shared\n",shared);
203 printk("%d pages swap cached\n",cached);
204 printk("%ld pages in page table cache\n",pgtable_cache_size);
205 show_buffers();
206 }
207
208 /*
209 * The kernel is already mapped with a kernel segment at kseg_c so
210 * we don't need to map it with a page table. However head.S also
211 * temporarily mapped it at kseg_4 so we should set up the ksegs again,
212 * clear the TLB and do some other paging setup stuff.
213 */
214
215 void __init
paging_init(void)216 paging_init(void)
217 {
218 int i;
219 unsigned long zones_size[MAX_NR_ZONES];
220
221 printk(KERN_INFO "Setting up paging and the MMU.\n");
222
223 /* clear out the init_mm.pgd that will contain the kernel's mappings */
224
225 for(i = 0; i < PTRS_PER_PGD; i++)
226 swapper_pg_dir[i] = __pgd(0);
227
228 /* make sure the current pgd table points to something sane
229 * (even if it is most probably not used until the next
230 * switch_mm)
231 */
232
233 current_pgd = init_mm.pgd;
234
235 /* initialise the TLB (tlb.c) */
236
237 tlb_init();
238
239 /* see README.mm for details on the KSEG setup */
240
241 #ifndef CONFIG_CRIS_LOW_MAP
242 /* This code is for the corrected Etrax-100 LX version 2... */
243
244 #define CACHED_BOOTROM (KSEG_A | 0x08000000UL)
245
246 *R_MMU_KSEG = ( IO_STATE(R_MMU_KSEG, seg_f, seg ) | /* cached flash */
247 IO_STATE(R_MMU_KSEG, seg_e, seg ) | /* uncached flash */
248 IO_STATE(R_MMU_KSEG, seg_d, page ) | /* vmalloc area */
249 IO_STATE(R_MMU_KSEG, seg_c, seg ) | /* kernel area */
250 IO_STATE(R_MMU_KSEG, seg_b, seg ) | /* kernel reg area */
251 IO_STATE(R_MMU_KSEG, seg_a, seg ) | /* bootrom/regs cached */
252 IO_STATE(R_MMU_KSEG, seg_9, page ) | /* user area */
253 IO_STATE(R_MMU_KSEG, seg_8, page ) |
254 IO_STATE(R_MMU_KSEG, seg_7, page ) |
255 IO_STATE(R_MMU_KSEG, seg_6, page ) |
256 IO_STATE(R_MMU_KSEG, seg_5, page ) |
257 IO_STATE(R_MMU_KSEG, seg_4, page ) |
258 IO_STATE(R_MMU_KSEG, seg_3, page ) |
259 IO_STATE(R_MMU_KSEG, seg_2, page ) |
260 IO_STATE(R_MMU_KSEG, seg_1, page ) |
261 IO_STATE(R_MMU_KSEG, seg_0, page ) );
262
263 *R_MMU_KBASE_HI = ( IO_FIELD(R_MMU_KBASE_HI, base_f, 0x0 ) |
264 IO_FIELD(R_MMU_KBASE_HI, base_e, 0x8 ) |
265 IO_FIELD(R_MMU_KBASE_HI, base_d, 0x0 ) |
266 IO_FIELD(R_MMU_KBASE_HI, base_c, 0x4 ) |
267 IO_FIELD(R_MMU_KBASE_HI, base_b, 0xb ) |
268 IO_FIELD(R_MMU_KBASE_HI, base_a, 0x3 ) |
269 IO_FIELD(R_MMU_KBASE_HI, base_9, 0x0 ) |
270 IO_FIELD(R_MMU_KBASE_HI, base_8, 0x0 ) );
271
272 *R_MMU_KBASE_LO = ( IO_FIELD(R_MMU_KBASE_LO, base_7, 0x0 ) |
273 IO_FIELD(R_MMU_KBASE_LO, base_6, 0x0 ) |
274 IO_FIELD(R_MMU_KBASE_LO, base_5, 0x0 ) |
275 IO_FIELD(R_MMU_KBASE_LO, base_4, 0x0 ) |
276 IO_FIELD(R_MMU_KBASE_LO, base_3, 0x0 ) |
277 IO_FIELD(R_MMU_KBASE_LO, base_2, 0x0 ) |
278 IO_FIELD(R_MMU_KBASE_LO, base_1, 0x0 ) |
279 IO_FIELD(R_MMU_KBASE_LO, base_0, 0x0 ) );
280 #else
281 /* Etrax-100 LX version 1 has a bug so that we cannot map anything
282 * across the 0x80000000 boundary, so we need to shrink the user-virtual
283 * area to 0x50000000 instead of 0xb0000000 and map things slightly
284 * different. The unused areas are marked as paged so that we can catch
285 * freak kernel accesses there.
286 *
287 * The ARTPEC chip is mapped at 0xa so we pass that segment straight
288 * through. We cannot vremap it because the vmalloc area is below 0x8
289 * and Juliette needs an uncached area above 0x8.
290 *
291 * Same thing with 0xc and 0x9, which is memory-mapped I/O on some boards.
292 * We map them straight over in LOW_MAP, but use vremap in LX version 2.
293 */
294
295 #define CACHED_BOOTROM (KSEG_F | 0x08000000UL)
296
297 *R_MMU_KSEG = ( IO_STATE(R_MMU_KSEG, seg_f, seg ) | /* cached bootrom/regs */
298 IO_STATE(R_MMU_KSEG, seg_e, page ) |
299 IO_STATE(R_MMU_KSEG, seg_d, page ) |
300 IO_STATE(R_MMU_KSEG, seg_c, page ) |
301 IO_STATE(R_MMU_KSEG, seg_b, seg ) | /* kernel reg area */
302 #ifdef CONFIG_JULIETTE
303 IO_STATE(R_MMU_KSEG, seg_a, seg ) | /* ARTPEC etc. */
304 #else
305 IO_STATE(R_MMU_KSEG, seg_a, page ) |
306 #endif
307 IO_STATE(R_MMU_KSEG, seg_9, seg ) | /* LED's on some boards */
308 IO_STATE(R_MMU_KSEG, seg_8, seg ) | /* CSE0/1, flash and I/O */
309 IO_STATE(R_MMU_KSEG, seg_7, page ) | /* kernel vmalloc area */
310 IO_STATE(R_MMU_KSEG, seg_6, seg ) | /* kernel DRAM area */
311 IO_STATE(R_MMU_KSEG, seg_5, seg ) | /* cached flash */
312 IO_STATE(R_MMU_KSEG, seg_4, page ) | /* user area */
313 IO_STATE(R_MMU_KSEG, seg_3, page ) | /* user area */
314 IO_STATE(R_MMU_KSEG, seg_2, page ) | /* user area */
315 IO_STATE(R_MMU_KSEG, seg_1, page ) | /* user area */
316 IO_STATE(R_MMU_KSEG, seg_0, page ) ); /* user area */
317
318 *R_MMU_KBASE_HI = ( IO_FIELD(R_MMU_KBASE_HI, base_f, 0x3 ) |
319 IO_FIELD(R_MMU_KBASE_HI, base_e, 0x0 ) |
320 IO_FIELD(R_MMU_KBASE_HI, base_d, 0x0 ) |
321 IO_FIELD(R_MMU_KBASE_HI, base_c, 0x0 ) |
322 IO_FIELD(R_MMU_KBASE_HI, base_b, 0xb ) |
323 #ifdef CONFIG_JULIETTE
324 IO_FIELD(R_MMU_KBASE_HI, base_a, 0xa ) |
325 #else
326 IO_FIELD(R_MMU_KBASE_HI, base_a, 0x0 ) |
327 #endif
328 IO_FIELD(R_MMU_KBASE_HI, base_9, 0x9 ) |
329 IO_FIELD(R_MMU_KBASE_HI, base_8, 0x8 ) );
330
331 *R_MMU_KBASE_LO = ( IO_FIELD(R_MMU_KBASE_LO, base_7, 0x0 ) |
332 IO_FIELD(R_MMU_KBASE_LO, base_6, 0x4 ) |
333 IO_FIELD(R_MMU_KBASE_LO, base_5, 0x0 ) |
334 IO_FIELD(R_MMU_KBASE_LO, base_4, 0x0 ) |
335 IO_FIELD(R_MMU_KBASE_LO, base_3, 0x0 ) |
336 IO_FIELD(R_MMU_KBASE_LO, base_2, 0x0 ) |
337 IO_FIELD(R_MMU_KBASE_LO, base_1, 0x0 ) |
338 IO_FIELD(R_MMU_KBASE_LO, base_0, 0x0 ) );
339 #endif
340
341 *R_MMU_CONTEXT = ( IO_FIELD(R_MMU_CONTEXT, page_id, 0 ) );
342
343 /* The MMU has been enabled ever since head.S but just to make
344 * it totally obvious we do it here as well.
345 */
346
347 *R_MMU_CTRL = ( IO_STATE(R_MMU_CTRL, inv_excp, enable ) |
348 IO_STATE(R_MMU_CTRL, acc_excp, enable ) |
349 IO_STATE(R_MMU_CTRL, we_excp, enable ) );
350
351 *R_MMU_ENABLE = IO_STATE(R_MMU_ENABLE, mmu_enable, enable);
352
353 /*
354 * initialize the bad page table and bad page to point
355 * to a couple of allocated pages
356 */
357
358 empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
359 memset((void *)empty_zero_page, 0, PAGE_SIZE);
360
361 /* All pages are DMA'able in Etrax, so put all in the DMA'able zone */
362
363 zones_size[0] = ((unsigned long)high_memory - PAGE_OFFSET) >> PAGE_SHIFT;
364
365 for (i = 1; i < MAX_NR_ZONES; i++)
366 zones_size[i] = 0;
367
368 /* Use free_area_init_node instead of free_area_init, because the former
369 * is designed for systems where the DRAM starts at an address substantially
370 * higher than 0, like us (we start at PAGE_OFFSET). This saves space in the
371 * mem_map page array.
372 */
373
374 free_area_init_node(0, 0, 0, zones_size, PAGE_OFFSET, 0);
375
376 }
377
378 extern unsigned long loops_per_jiffy; /* init/main.c */
379 unsigned long loops_per_usec;
380
381 extern char _stext, _edata, _etext;
382 extern char __init_begin, __init_end;
383
384 void __init
mem_init(void)385 mem_init(void)
386 {
387 int codesize, reservedpages, datasize, initsize;
388 unsigned long tmp;
389
390 if(!mem_map)
391 BUG();
392
393 /* max/min_low_pfn was set by setup.c
394 * now we just copy it to some other necessary places...
395 *
396 * high_memory was also set in setup.c
397 */
398
399 max_mapnr = num_physpages = max_low_pfn - min_low_pfn;
400
401 /* this will put all memory onto the freelists */
402 totalram_pages = free_all_bootmem();
403
404 reservedpages = 0;
405 for (tmp = 0; tmp < max_mapnr; tmp++) {
406 /*
407 * Only count reserved RAM pages
408 */
409 if (PageReserved(mem_map + tmp))
410 reservedpages++;
411 }
412
413 codesize = (unsigned long) &_etext - (unsigned long) &_stext;
414 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
415 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
416
417 printk(KERN_INFO
418 "Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, "
419 "%dk init)\n" ,
420 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
421 max_mapnr << (PAGE_SHIFT-10),
422 codesize >> 10,
423 reservedpages << (PAGE_SHIFT-10),
424 datasize >> 10,
425 initsize >> 10
426 );
427
428 /* HACK alert - calculate a loops_per_usec for asm/delay.h here
429 * since this is called just after calibrate_delay in init/main.c
430 * but before places which use udelay. cannot be in time.c since
431 * that is called _before_ calibrate_delay
432 */
433
434 loops_per_usec = (loops_per_jiffy * HZ) / 1000000;
435
436 return;
437 }
438
439 /* Initialize remaps of some I/O-ports. It is important that this
440 * is called before any driver is initialized.
441 */
442
443 static int
init_ioremap(void)444 __init init_ioremap(void)
445 {
446
447 /* Give the external I/O-port addresses their values */
448
449 #ifdef CONFIG_CRIS_LOW_MAP
450 /* Simply a linear map (see the KSEG map above in paging_init) */
451 port_cse1_addr = (volatile unsigned long *)(MEM_CSE1_START |
452 MEM_NON_CACHEABLE);
453 port_csp0_addr = (volatile unsigned long *)(MEM_CSP0_START |
454 MEM_NON_CACHEABLE);
455 port_csp4_addr = (volatile unsigned long *)(MEM_CSP4_START |
456 MEM_NON_CACHEABLE);
457 #else
458 /* Note that nothing blows up just because we do this remapping
459 * it's ok even if the ports are not used or connected
460 * to anything (or connected to a non-I/O thing) */
461 port_cse1_addr = (volatile unsigned long *)
462 ioremap((unsigned long)(MEM_CSE1_START | MEM_NON_CACHEABLE), 16);
463 port_csp0_addr = (volatile unsigned long *)
464 ioremap((unsigned long)(MEM_CSP0_START | MEM_NON_CACHEABLE), 16);
465 port_csp4_addr = (volatile unsigned long *)
466 ioremap((unsigned long)(MEM_CSP4_START | MEM_NON_CACHEABLE), 16);
467 #endif
468 return 0;
469 }
470
471 __initcall(init_ioremap);
472
473 /* Helper function for the two below */
474
475 static inline void
flush_etrax_cacherange(void * startadr,int length)476 flush_etrax_cacherange(void *startadr, int length)
477 {
478 /* CACHED_BOOTROM is mapped to the boot-rom area (cached) which
479 * we can use to get fast dummy-reads of cachelines
480 */
481
482 volatile short *flushadr = (volatile short *)(((unsigned long)startadr & ~PAGE_MASK) |
483 CACHED_BOOTROM);
484
485 length = length > 8192 ? 8192 : length; /* No need to flush more than cache size */
486
487 while(length > 0) {
488 *flushadr; /* dummy read to flush */
489 flushadr += (32/sizeof(short)); /* a cacheline is 32 bytes */
490 length -= 32;
491 }
492 }
493
494 /* Due to a bug in Etrax100(LX) all versions, receiving DMA buffers
495 * will occationally corrupt certain CPU writes if the DMA buffers
496 * happen to be hot in the cache.
497 *
498 * As a workaround, we have to flush the relevant parts of the cache
499 * before (re) inserting any receiving descriptor into the DMA HW.
500 */
501
502 void
prepare_rx_descriptor(struct etrax_dma_descr * desc)503 prepare_rx_descriptor(struct etrax_dma_descr *desc)
504 {
505 flush_etrax_cacherange((void *)desc->buf, desc->sw_len ? desc->sw_len : 65536);
506 }
507
508 /* Do the same thing but flush the entire cache */
509
510 void
flush_etrax_cache(void)511 flush_etrax_cache(void)
512 {
513 flush_etrax_cacherange(0, 8192);
514 }
515
516 /* free the pages occupied by initialization code */
517
518 void
free_initmem(void)519 free_initmem(void)
520 {
521 unsigned long addr;
522
523 addr = (unsigned long)(&__init_begin);
524 for (; addr < (unsigned long)(&__init_end); addr += PAGE_SIZE) {
525 ClearPageReserved(virt_to_page(addr));
526 set_page_count(virt_to_page(addr), 1);
527 free_page(addr);
528 totalram_pages++;
529 }
530 printk (KERN_INFO "Freeing unused kernel memory: %luk freed\n",
531 (unsigned long)((&__init_end - &__init_begin) >> 10));
532 }
533
534 void
si_meminfo(struct sysinfo * val)535 si_meminfo(struct sysinfo *val)
536 {
537 val->totalram = totalram_pages;
538 val->sharedram = 0;
539 val->freeram = nr_free_pages();
540 val->bufferram = atomic_read(&buffermem_pages);
541 val->totalhigh = 0;
542 val->freehigh = 0;
543 val->mem_unit = PAGE_SIZE;
544 }
545