1 /* 2 * arch/arm/mach-ns9xxx/include/mach/regs-bbu.h 3 * 4 * Copyright (C) 2006 by Digi International Inc. 5 * All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published by 9 * the Free Software Foundation. 10 */ 11 #ifndef __ASM_ARCH_REGSBBU_H 12 #define __ASM_ARCH_REGSBBU_H 13 14 #include <mach/hardware.h> 15 16 /* BBus Utility */ 17 18 /* GPIO Configuration Registers block 1 */ 19 /* NOTE: the HRM starts counting at 1 for the GPIO registers, here the start is 20 * at 0 for each block. That is, BBU_GCONFb1(0) is GPIO Configuration Register 21 * #1, BBU_GCONFb2(0) is GPIO Configuration Register #8. */ 22 #define BBU_GCONFb1(x) __REG2(0x90600010, (x)) 23 #define BBU_GCONFb2(x) __REG2(0x90600100, (x)) 24 25 #define BBU_GCONFx_DIR(m) __REGBIT(3 + (((m) & 7) << 2)) 26 #define BBU_GCONFx_DIR_INPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 0) 27 #define BBU_GCONFx_DIR_OUTPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 1) 28 #define BBU_GCONFx_INV(m) __REGBIT(2 + (((m) & 7) << 2)) 29 #define BBU_GCONFx_INV_NO(m) __REGVAL(BBU_GCONFx_INV(m), 0) 30 #define BBU_GCONFx_INV_YES(m) __REGVAL(BBU_GCONFx_INV(m), 1) 31 #define BBU_GCONFx_FUNC(m) __REGBITS(1 + (((m) & 7) << 2), ((m) & 7) << 2) 32 #define BBU_GCONFx_FUNC_0(m) __REGVAL(BBU_GCONFx_FUNC(m), 0) 33 #define BBU_GCONFx_FUNC_1(m) __REGVAL(BBU_GCONFx_FUNC(m), 1) 34 #define BBU_GCONFx_FUNC_2(m) __REGVAL(BBU_GCONFx_FUNC(m), 2) 35 #define BBU_GCONFx_FUNC_3(m) __REGVAL(BBU_GCONFx_FUNC(m), 3) 36 37 #define BBU_GCTRL1 __REG(0x90600030) 38 #define BBU_GCTRL2 __REG(0x90600034) 39 #define BBU_GCTRL3 __REG(0x90600120) 40 41 #define BBU_GSTAT1 __REG(0x90600040) 42 #define BBU_GSTAT2 __REG(0x90600044) 43 #define BBU_GSTAT3 __REG(0x90600130) 44 45 #endif /* ifndef __ASM_ARCH_REGSBBU_H */ 46