1 /* 2 * Copyright (C) 2007 Google, Inc. 3 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. 4 * Author: Brian Swetland <swetland@google.com> 5 * 6 * This software is licensed under the terms of the GNU General Public 7 * License version 2, as published by the Free Software Foundation, and 8 * may be copied, distributed, and modified under those terms. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * 16 * The MSM peripherals are spread all over across 768MB of physical 17 * space, which makes just having a simple IO_ADDRESS macro to slide 18 * them into the right virtual location rough. Instead, we will 19 * provide a master phys->virt mapping for peripherals here. 20 * 21 */ 22 23 #ifndef __ASM_ARCH_MSM_IOMAP_H 24 #define __ASM_ARCH_MSM_IOMAP_H 25 26 #include <asm/sizes.h> 27 28 /* Physical base address and size of peripherals. 29 * Ordered by the virtual base addresses they will be mapped at. 30 * 31 * MSM_VIC_BASE must be an value that can be loaded via a "mov" 32 * instruction, otherwise entry-macro.S will not compile. 33 * 34 * If you add or remove entries here, you'll want to edit the 35 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your 36 * changes. 37 * 38 */ 39 40 #ifdef __ASSEMBLY__ 41 #define IOMEM(x) x 42 #else 43 #define IOMEM(x) ((void __force __iomem *)(x)) 44 #endif 45 46 #if defined(CONFIG_ARCH_MSM7X30) 47 #include "msm_iomap-7x30.h" 48 #elif defined(CONFIG_ARCH_QSD8X50) 49 #include "msm_iomap-8x50.h" 50 #elif defined(CONFIG_ARCH_MSM8X60) 51 #include "msm_iomap-8x60.h" 52 #else 53 #include "msm_iomap-7x00.h" 54 #endif 55 56 #include "msm_iomap-8960.h" 57 58 /* Virtual addressses shared across all MSM targets. */ 59 #define MSM_CSR_BASE IOMEM(0xE0001000) 60 #define MSM_QGIC_DIST_BASE IOMEM(0xF0000000) 61 #define MSM_QGIC_CPU_BASE IOMEM(0xF0001000) 62 #define MSM_TMR_BASE IOMEM(0xF0200000) 63 #define MSM_TMR0_BASE IOMEM(0xF0201000) 64 65 #endif 66