1# SPDX-License-Identifier: GPL-2.0
2
3menuconfig ARM_CRYPTO
4	bool "ARM Accelerated Cryptographic Algorithms"
5	depends on ARM
6	help
7	  Say Y here to choose from a selection of cryptographic algorithms
8	  implemented using ARM specific CPU features or instructions.
9
10if ARM_CRYPTO
11
12config CRYPTO_SHA1_ARM
13	tristate "SHA1 digest algorithm (ARM-asm)"
14	select CRYPTO_SHA1
15	select CRYPTO_HASH
16	help
17	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
18	  using optimized ARM assembler.
19
20config CRYPTO_SHA1_ARM_NEON
21	tristate "SHA1 digest algorithm (ARM NEON)"
22	depends on KERNEL_MODE_NEON
23	select CRYPTO_SHA1_ARM
24	select CRYPTO_SHA1
25	select CRYPTO_HASH
26	help
27	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
28	  using optimized ARM NEON assembly, when NEON instructions are
29	  available.
30
31config CRYPTO_SHA1_ARM_CE
32	tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)"
33	depends on KERNEL_MODE_NEON
34	select CRYPTO_SHA1_ARM
35	select CRYPTO_HASH
36	help
37	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
38	  using special ARMv8 Crypto Extensions.
39
40config CRYPTO_SHA2_ARM_CE
41	tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)"
42	depends on KERNEL_MODE_NEON
43	select CRYPTO_SHA256_ARM
44	select CRYPTO_HASH
45	help
46	  SHA-256 secure hash standard (DFIPS 180-2) implemented
47	  using special ARMv8 Crypto Extensions.
48
49config CRYPTO_SHA256_ARM
50	tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)"
51	select CRYPTO_HASH
52	depends on !CPU_V7M
53	help
54	  SHA-256 secure hash standard (DFIPS 180-2) implemented
55	  using optimized ARM assembler and NEON, when available.
56
57config CRYPTO_SHA512_ARM
58	tristate "SHA-384/512 digest algorithm (ARM-asm and NEON)"
59	select CRYPTO_HASH
60	depends on !CPU_V7M
61	help
62	  SHA-512 secure hash standard (DFIPS 180-2) implemented
63	  using optimized ARM assembler and NEON, when available.
64
65config CRYPTO_BLAKE2S_ARM
66	bool "BLAKE2s digest algorithm (ARM)"
67	select CRYPTO_ARCH_HAVE_LIB_BLAKE2S
68	help
69	  BLAKE2s digest algorithm optimized with ARM scalar instructions.  This
70	  is faster than the generic implementations of BLAKE2s and BLAKE2b, but
71	  slower than the NEON implementation of BLAKE2b.  (There is no NEON
72	  implementation of BLAKE2s, since NEON doesn't really help with it.)
73
74config CRYPTO_BLAKE2B_NEON
75	tristate "BLAKE2b digest algorithm (ARM NEON)"
76	depends on KERNEL_MODE_NEON
77	select CRYPTO_BLAKE2B
78	help
79	  BLAKE2b digest algorithm optimized with ARM NEON instructions.
80	  On ARM processors that have NEON support but not the ARMv8
81	  Crypto Extensions, typically this BLAKE2b implementation is
82	  much faster than SHA-2 and slightly faster than SHA-1.
83
84config CRYPTO_AES_ARM
85	tristate "Scalar AES cipher for ARM"
86	select CRYPTO_ALGAPI
87	select CRYPTO_AES
88	help
89	  Use optimized AES assembler routines for ARM platforms.
90
91	  On ARM processors without the Crypto Extensions, this is the
92	  fastest AES implementation for single blocks.  For multiple
93	  blocks, the NEON bit-sliced implementation is usually faster.
94
95	  This implementation may be vulnerable to cache timing attacks,
96	  since it uses lookup tables.  However, as countermeasures it
97	  disables IRQs and preloads the tables; it is hoped this makes
98	  such attacks very difficult.
99
100config CRYPTO_AES_ARM_BS
101	tristate "Bit sliced AES using NEON instructions"
102	depends on KERNEL_MODE_NEON
103	select CRYPTO_SKCIPHER
104	select CRYPTO_LIB_AES
105	select CRYPTO_AES
106	select CRYPTO_CBC
107	select CRYPTO_SIMD
108	help
109	  Use a faster and more secure NEON based implementation of AES in CBC,
110	  CTR and XTS modes
111
112	  Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
113	  and for XTS mode encryption, CBC and XTS mode decryption speedup is
114	  around 25%. (CBC encryption speed is not affected by this driver.)
115	  This implementation does not rely on any lookup tables so it is
116	  believed to be invulnerable to cache timing attacks.
117
118config CRYPTO_AES_ARM_CE
119	tristate "Accelerated AES using ARMv8 Crypto Extensions"
120	depends on KERNEL_MODE_NEON
121	select CRYPTO_SKCIPHER
122	select CRYPTO_LIB_AES
123	select CRYPTO_SIMD
124	help
125	  Use an implementation of AES in CBC, CTR and XTS modes that uses
126	  ARMv8 Crypto Extensions
127
128config CRYPTO_GHASH_ARM_CE
129	tristate "PMULL-accelerated GHASH using NEON/ARMv8 Crypto Extensions"
130	depends on KERNEL_MODE_NEON
131	select CRYPTO_HASH
132	select CRYPTO_CRYPTD
133	select CRYPTO_GF128MUL
134	help
135	  Use an implementation of GHASH (used by the GCM AEAD chaining mode)
136	  that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64)
137	  that is part of the ARMv8 Crypto Extensions, or a slower variant that
138	  uses the vmull.p8 instruction that is part of the basic NEON ISA.
139
140config CRYPTO_CRCT10DIF_ARM_CE
141	tristate "CRCT10DIF digest algorithm using PMULL instructions"
142	depends on KERNEL_MODE_NEON
143	depends on CRC_T10DIF
144	select CRYPTO_HASH
145
146config CRYPTO_CRC32_ARM_CE
147	tristate "CRC32(C) digest algorithm using CRC and/or PMULL instructions"
148	depends on KERNEL_MODE_NEON
149	depends on CRC32
150	select CRYPTO_HASH
151
152config CRYPTO_CHACHA20_NEON
153	tristate "NEON and scalar accelerated ChaCha stream cipher algorithms"
154	select CRYPTO_SKCIPHER
155	select CRYPTO_ARCH_HAVE_LIB_CHACHA
156
157config CRYPTO_POLY1305_ARM
158	tristate "Accelerated scalar and SIMD Poly1305 hash implementations"
159	select CRYPTO_HASH
160	select CRYPTO_ARCH_HAVE_LIB_POLY1305
161
162config CRYPTO_NHPOLY1305_NEON
163	tristate "NEON accelerated NHPoly1305 hash function (for Adiantum)"
164	depends on KERNEL_MODE_NEON
165	select CRYPTO_NHPOLY1305
166
167config CRYPTO_CURVE25519_NEON
168	tristate "NEON accelerated Curve25519 scalar multiplication library"
169	depends on KERNEL_MODE_NEON
170	select CRYPTO_LIB_CURVE25519_GENERIC
171	select CRYPTO_ARCH_HAVE_LIB_CURVE25519
172
173endif
174