1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * KVM_SET_SREGS tests
4 *
5 * Copyright (C) 2018, Google LLC.
6 *
7 * This is a regression test for the bug fixed by the following commit:
8 * d3802286fa0f ("kvm: x86: Disallow illegal IA32_APIC_BASE MSR values")
9 *
10 * That bug allowed a user-mode program that called the KVM_SET_SREGS
11 * ioctl to put a VCPU's local APIC into an invalid state.
12 */
13 #define _GNU_SOURCE /* for program_invocation_short_name */
14 #include <fcntl.h>
15 #include <stdio.h>
16 #include <stdlib.h>
17 #include <string.h>
18 #include <sys/ioctl.h>
19
20 #include "test_util.h"
21
22 #include "kvm_util.h"
23 #include "processor.h"
24
test_cr4_feature_bit(struct kvm_vcpu * vcpu,struct kvm_sregs * orig,uint64_t feature_bit)25 static void test_cr4_feature_bit(struct kvm_vcpu *vcpu, struct kvm_sregs *orig,
26 uint64_t feature_bit)
27 {
28 struct kvm_sregs sregs;
29 int rc;
30
31 /* Skip the sub-test, the feature is supported. */
32 if (orig->cr4 & feature_bit)
33 return;
34
35 memcpy(&sregs, orig, sizeof(sregs));
36 sregs.cr4 |= feature_bit;
37
38 rc = _vcpu_sregs_set(vcpu, &sregs);
39 TEST_ASSERT(rc, "KVM allowed unsupported CR4 bit (0x%lx)", feature_bit);
40
41 /* Sanity check that KVM didn't change anything. */
42 vcpu_sregs_get(vcpu, &sregs);
43 TEST_ASSERT(!memcmp(&sregs, orig, sizeof(sregs)), "KVM modified sregs");
44 }
45
calc_supported_cr4_feature_bits(void)46 static uint64_t calc_supported_cr4_feature_bits(void)
47 {
48 uint64_t cr4;
49
50 cr4 = X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE |
51 X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE | X86_CR4_PGE |
52 X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT;
53 if (kvm_cpu_has(X86_FEATURE_UMIP))
54 cr4 |= X86_CR4_UMIP;
55 if (kvm_cpu_has(X86_FEATURE_LA57))
56 cr4 |= X86_CR4_LA57;
57 if (kvm_cpu_has(X86_FEATURE_VMX))
58 cr4 |= X86_CR4_VMXE;
59 if (kvm_cpu_has(X86_FEATURE_SMX))
60 cr4 |= X86_CR4_SMXE;
61 if (kvm_cpu_has(X86_FEATURE_FSGSBASE))
62 cr4 |= X86_CR4_FSGSBASE;
63 if (kvm_cpu_has(X86_FEATURE_PCID))
64 cr4 |= X86_CR4_PCIDE;
65 if (kvm_cpu_has(X86_FEATURE_XSAVE))
66 cr4 |= X86_CR4_OSXSAVE;
67 if (kvm_cpu_has(X86_FEATURE_SMEP))
68 cr4 |= X86_CR4_SMEP;
69 if (kvm_cpu_has(X86_FEATURE_SMAP))
70 cr4 |= X86_CR4_SMAP;
71 if (kvm_cpu_has(X86_FEATURE_PKU))
72 cr4 |= X86_CR4_PKE;
73
74 return cr4;
75 }
76
main(int argc,char * argv[])77 int main(int argc, char *argv[])
78 {
79 struct kvm_sregs sregs;
80 struct kvm_vcpu *vcpu;
81 struct kvm_vm *vm;
82 uint64_t cr4;
83 int rc;
84
85 /* Tell stdout not to buffer its content */
86 setbuf(stdout, NULL);
87
88 /*
89 * Create a dummy VM, specifically to avoid doing KVM_SET_CPUID2, and
90 * use it to verify all supported CR4 bits can be set prior to defining
91 * the vCPU model, i.e. without doing KVM_SET_CPUID2.
92 */
93 vm = vm_create_barebones();
94 vcpu = __vm_vcpu_add(vm, 0);
95
96 vcpu_sregs_get(vcpu, &sregs);
97
98 sregs.cr4 |= calc_supported_cr4_feature_bits();
99 cr4 = sregs.cr4;
100
101 rc = _vcpu_sregs_set(vcpu, &sregs);
102 TEST_ASSERT(!rc, "Failed to set supported CR4 bits (0x%lx)", cr4);
103
104 vcpu_sregs_get(vcpu, &sregs);
105 TEST_ASSERT(sregs.cr4 == cr4, "sregs.CR4 (0x%llx) != CR4 (0x%lx)",
106 sregs.cr4, cr4);
107
108 /* Verify all unsupported features are rejected by KVM. */
109 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_UMIP);
110 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_LA57);
111 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_VMXE);
112 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_SMXE);
113 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_FSGSBASE);
114 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_PCIDE);
115 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_OSXSAVE);
116 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_SMEP);
117 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_SMAP);
118 test_cr4_feature_bit(vcpu, &sregs, X86_CR4_PKE);
119 kvm_vm_free(vm);
120
121 /* Create a "real" VM and verify APIC_BASE can be set. */
122 vm = vm_create_with_one_vcpu(&vcpu, NULL);
123
124 vcpu_sregs_get(vcpu, &sregs);
125 sregs.apic_base = 1 << 10;
126 rc = _vcpu_sregs_set(vcpu, &sregs);
127 TEST_ASSERT(rc, "Set IA32_APIC_BASE to %llx (invalid)",
128 sregs.apic_base);
129 sregs.apic_base = 1 << 11;
130 rc = _vcpu_sregs_set(vcpu, &sregs);
131 TEST_ASSERT(!rc, "Couldn't set IA32_APIC_BASE to %llx (valid)",
132 sregs.apic_base);
133
134 kvm_vm_free(vm);
135
136 return 0;
137 }
138