1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* smp.h: Sparc specific SMP stuff.
3  *
4  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5  */
6 
7 #ifndef _SPARC_SMP_H
8 #define _SPARC_SMP_H
9 
10 #include <linux/threads.h>
11 #include <asm/head.h>
12 
13 #ifndef __ASSEMBLY__
14 
15 #include <linux/cpumask.h>
16 
17 #endif /* __ASSEMBLY__ */
18 
19 #ifdef CONFIG_SMP
20 
21 #ifndef __ASSEMBLY__
22 
23 #include <asm/ptrace.h>
24 #include <asm/asi.h>
25 #include <linux/atomic.h>
26 
27 /*
28  *	Private routines/data
29  */
30 
31 extern unsigned char boot_cpu_id;
32 extern volatile unsigned long cpu_callin_map[NR_CPUS];
33 extern cpumask_t smp_commenced_mask;
34 extern struct linux_prom_registers smp_penguin_ctable;
35 
36 void cpu_panic(void);
37 
38 /*
39  *	General functions that each host system must provide.
40  */
41 
42 void sun4m_init_smp(void);
43 void sun4d_init_smp(void);
44 
45 void smp_callin(void);
46 void smp_store_cpu_info(int);
47 
48 void smp_resched_interrupt(void);
49 void smp_call_function_single_interrupt(void);
50 void smp_call_function_interrupt(void);
51 
52 struct seq_file;
53 void smp_bogo(struct seq_file *);
54 void smp_info(struct seq_file *);
55 
56 struct sparc32_ipi_ops {
57 	void (*cross_call)(void *func, cpumask_t mask, unsigned long arg1,
58 			   unsigned long arg2, unsigned long arg3,
59 			   unsigned long arg4);
60 	void (*resched)(int cpu);
61 	void (*single)(int cpu);
62 	void (*mask_one)(int cpu);
63 };
64 extern const struct sparc32_ipi_ops *sparc32_ipi_ops;
65 
xc0(void * func)66 static inline void xc0(void *func)
67 {
68 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask, 0, 0, 0, 0);
69 }
70 
xc1(void * func,unsigned long arg1)71 static inline void xc1(void *func, unsigned long arg1)
72 {
73 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, 0, 0, 0);
74 }
xc2(void * func,unsigned long arg1,unsigned long arg2)75 static inline void xc2(void *func, unsigned long arg1, unsigned long arg2)
76 {
77 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0);
78 }
79 
xc3(void * func,unsigned long arg1,unsigned long arg2,unsigned long arg3)80 static inline void xc3(void *func, unsigned long arg1, unsigned long arg2,
81 		       unsigned long arg3)
82 {
83 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask,
84 				    arg1, arg2, arg3, 0);
85 }
86 
xc4(void * func,unsigned long arg1,unsigned long arg2,unsigned long arg3,unsigned long arg4)87 static inline void xc4(void *func, unsigned long arg1, unsigned long arg2,
88 		       unsigned long arg3, unsigned long arg4)
89 {
90 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask,
91 				    arg1, arg2, arg3, arg4);
92 }
93 
94 void arch_send_call_function_single_ipi(int cpu);
95 void arch_send_call_function_ipi_mask(const struct cpumask *mask);
96 
cpu_logical_map(int cpu)97 static inline int cpu_logical_map(int cpu)
98 {
99 	return cpu;
100 }
101 
102 int hard_smp_processor_id(void);
103 
104 #define raw_smp_processor_id()		(current_thread_info()->cpu)
105 
106 void smp_setup_cpu_possible_map(void);
107 
108 #endif /* !(__ASSEMBLY__) */
109 
110 /* Sparc specific messages. */
111 #define MSG_CROSS_CALL         0x0005       /* run func on cpus */
112 
113 /* Empirical PROM processor mailbox constants.  If the per-cpu mailbox
114  * contains something other than one of these then the ipi is from
115  * Linux's active_kernel_processor.  This facility exists so that
116  * the boot monitor can capture all the other cpus when one catches
117  * a watchdog reset or the user enters the monitor using L1-A keys.
118  */
119 #define MBOX_STOPCPU          0xFB
120 #define MBOX_IDLECPU          0xFC
121 #define MBOX_IDLECPU2         0xFD
122 #define MBOX_STOPCPU2         0xFE
123 
124 #else /* SMP */
125 
126 #define hard_smp_processor_id()		0
127 #define smp_setup_cpu_possible_map() do { } while (0)
128 
129 #endif /* !(SMP) */
130 #endif /* !(_SPARC_SMP_H) */
131