1 /*********************************************************************
2 *
3 * Filename: w83977af_ir.c
4 * Version: 1.0
5 * Description: FIR driver for the Winbond W83977AF Super I/O chip
6 * Status: Experimental.
7 * Author: Paul VanderSpek
8 * Created at: Wed Nov 4 11:46:16 1998
9 * Modified at: Fri Jan 28 12:10:59 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998-1999 Rebel.com
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * Neither Paul VanderSpek nor Rebel.com admit liability nor provide
21 * warranty for any of this software. This material is provided "AS-IS"
22 * and at no charge.
23 *
24 * If you find bugs in this file, its very likely that the same bug
25 * will also be in pc87108.c since the implementations are quite
26 * similar.
27 *
28 * Notice that all functions that needs to access the chip in _any_
29 * way, must save BSR register on entry, and restore it on exit.
30 * It is _very_ important to follow this policy!
31 *
32 * __u8 bank;
33 *
34 * bank = inb( iobase+BSR);
35 *
36 * do_your_stuff_here();
37 *
38 * outb( bank, iobase+BSR);
39 *
40 ********************************************************************/
41
42 #include <linux/module.h>
43 #include <linux/config.h>
44 #include <linux/kernel.h>
45 #include <linux/types.h>
46 #include <linux/skbuff.h>
47 #include <linux/netdevice.h>
48 #include <linux/ioport.h>
49 #include <linux/delay.h>
50 #include <linux/slab.h>
51 #include <linux/init.h>
52 #include <linux/rtnetlink.h>
53
54 #include <asm/io.h>
55 #include <asm/dma.h>
56 #include <asm/byteorder.h>
57
58 #include <net/irda/irda.h>
59 #include <net/irda/irmod.h>
60 #include <net/irda/wrapper.h>
61 #include <net/irda/irda_device.h>
62 #include <net/irda/w83977af.h>
63 #include <net/irda/w83977af_ir.h>
64
65 #ifdef CONFIG_ARCH_NETWINDER /* Adjust to NetWinder differences */
66 #undef CONFIG_NETWINDER_TX_DMA_PROBLEMS /* Not needed */
67 #define CONFIG_NETWINDER_RX_DMA_PROBLEMS /* Must have this one! */
68 #endif
69 #undef CONFIG_USE_INTERNAL_TIMER /* Just cannot make that timer work */
70 #define CONFIG_USE_W977_PNP /* Currently needed */
71 #define PIO_MAX_SPEED 115200
72
73 static char *driver_name = "w83977af_ir";
74 static int qos_mtt_bits = 0x07; /* 1 ms or more */
75
76 #define CHIP_IO_EXTENT 8
77
78 static unsigned int io[] = { 0x180, ~0, ~0, ~0 };
79 #ifdef CONFIG_ARCH_NETWINDER /* Adjust to NetWinder differences */
80 static unsigned int irq[] = { 6, 0, 0, 0 };
81 #else
82 static unsigned int irq[] = { 11, 0, 0, 0 };
83 #endif
84 static unsigned int dma[] = { 1, 0, 0, 0 };
85 static unsigned int efbase[] = { W977_EFIO_BASE, W977_EFIO2_BASE };
86 static unsigned int efio = W977_EFIO_BASE;
87
88 static struct w83977af_ir *dev_self[] = { NULL, NULL, NULL, NULL};
89
90 /* Some prototypes */
91 static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
92 unsigned int dma);
93 static int w83977af_close(struct w83977af_ir *self);
94 static int w83977af_probe(int iobase, int irq, int dma);
95 static int w83977af_dma_receive(struct w83977af_ir *self);
96 static int w83977af_dma_receive_complete(struct w83977af_ir *self);
97 static int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev);
98 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
99 static void w83977af_dma_write(struct w83977af_ir *self, int iobase);
100 static void w83977af_change_speed(struct w83977af_ir *self, __u32 speed);
101 static void w83977af_interrupt(int irq, void *dev_id, struct pt_regs *regs);
102 static int w83977af_is_receiving(struct w83977af_ir *self);
103
104 static int w83977af_net_init(struct net_device *dev);
105 static int w83977af_net_open(struct net_device *dev);
106 static int w83977af_net_close(struct net_device *dev);
107 static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
108 static struct net_device_stats *w83977af_net_get_stats(struct net_device *dev);
109
110 /*
111 * Function w83977af_init ()
112 *
113 * Initialize chip. Just try to find out how many chips we are dealing with
114 * and where they are
115 */
w83977af_init(void)116 int __init w83977af_init(void)
117 {
118 int i;
119
120 IRDA_DEBUG(0, "%s\n", __FUNCTION__);
121
122 for (i=0; (io[i] < 2000) && (i < 4); i++) {
123 int ioaddr = io[i];
124 if (check_region(ioaddr, CHIP_IO_EXTENT) < 0)
125 continue;
126 if (w83977af_open(i, io[i], irq[i], dma[i]) == 0)
127 return 0;
128 }
129 return -ENODEV;
130 }
131
132 /*
133 * Function w83977af_cleanup ()
134 *
135 * Close all configured chips
136 *
137 */
138 #ifdef MODULE
w83977af_cleanup(void)139 void w83977af_cleanup(void)
140 {
141 int i;
142
143 IRDA_DEBUG(4, "%s\n", __FUNCTION__);
144
145 for (i=0; i < 4; i++) {
146 if (dev_self[i])
147 w83977af_close(dev_self[i]);
148 }
149 }
150 #endif /* MODULE */
151
152 /*
153 * Function w83977af_open (iobase, irq)
154 *
155 * Open driver instance
156 *
157 */
w83977af_open(int i,unsigned int iobase,unsigned int irq,unsigned int dma)158 int w83977af_open(int i, unsigned int iobase, unsigned int irq,
159 unsigned int dma)
160 {
161 struct net_device *dev;
162 struct w83977af_ir *self;
163 void *ret;
164 int err;
165
166 IRDA_DEBUG(0, "%s\n", __FUNCTION__);
167
168 if (w83977af_probe(iobase, irq, dma) == -1)
169 return -1;
170
171 /*
172 * Allocate new instance of the driver
173 */
174 self = kmalloc(sizeof(struct w83977af_ir), GFP_KERNEL);
175 if (self == NULL) {
176 printk( KERN_ERR "IrDA: Can't allocate memory for "
177 "IrDA control block!\n");
178 return -ENOMEM;
179 }
180 memset(self, 0, sizeof(struct w83977af_ir));
181
182 /* Need to store self somewhere */
183 dev_self[i] = self;
184
185 /* Initialize IO */
186 self->io.fir_base = iobase;
187 self->io.irq = irq;
188 self->io.fir_ext = CHIP_IO_EXTENT;
189 self->io.dma = dma;
190 self->io.fifo_size = 32;
191
192 /* Lock the port that we need */
193 ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
194 if (!ret) {
195 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
196 __FUNCTION__, self->io.fir_base);
197 /* w83977af_cleanup( self); */
198 return -ENODEV;
199 }
200
201 /* Initialize QoS for this device */
202 irda_init_max_qos_capabilies(&self->qos);
203
204 /* The only value we must override it the baudrate */
205
206 /* FIXME: The HP HDLS-1100 does not support 1152000! */
207 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
208 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
209
210 /* The HP HDLS-1100 needs 1 ms according to the specs */
211 self->qos.min_turn_time.bits = qos_mtt_bits;
212 irda_qos_bits_to_value(&self->qos);
213
214 self->flags = IFF_FIR|IFF_MIR|IFF_SIR|IFF_DMA|IFF_PIO;
215
216 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
217 self->rx_buff.truesize = 14384;
218 self->tx_buff.truesize = 4000;
219
220 /* Allocate memory if needed */
221 self->rx_buff.head = (__u8 *) kmalloc(self->rx_buff.truesize,
222 GFP_KERNEL|GFP_DMA);
223 if (self->rx_buff.head == NULL)
224 return -ENOMEM;
225
226 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
227
228 self->tx_buff.head = (__u8 *) kmalloc(self->tx_buff.truesize,
229 GFP_KERNEL|GFP_DMA);
230 if (self->tx_buff.head == NULL) {
231 kfree(self->rx_buff.head);
232 return -ENOMEM;
233 }
234 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
235
236 self->rx_buff.in_frame = FALSE;
237 self->rx_buff.state = OUTSIDE_FRAME;
238 self->tx_buff.data = self->tx_buff.head;
239 self->rx_buff.data = self->rx_buff.head;
240
241 if (!(dev = dev_alloc("irda%d", &err))) {
242 ERROR("%s(), dev_alloc() failed!\n", __FUNCTION__);
243 return -ENOMEM;
244 }
245 dev->priv = (void *) self;
246 self->netdev = dev;
247
248 /* Override the network functions we need to use */
249 dev->init = w83977af_net_init;
250 dev->hard_start_xmit = w83977af_hard_xmit;
251 dev->open = w83977af_net_open;
252 dev->stop = w83977af_net_close;
253 dev->do_ioctl = w83977af_net_ioctl;
254 dev->get_stats = w83977af_net_get_stats;
255
256 rtnl_lock();
257 err = register_netdevice(dev);
258 rtnl_unlock();
259 if (err) {
260 ERROR("%s(), register_netdevice() failed!\n", __FUNCTION__);
261 return -1;
262 }
263 MESSAGE("IrDA: Registered device %s\n", dev->name);
264
265 return 0;
266 }
267
268 /*
269 * Function w83977af_close (self)
270 *
271 * Close driver instance
272 *
273 */
w83977af_close(struct w83977af_ir * self)274 static int w83977af_close(struct w83977af_ir *self)
275 {
276 int iobase;
277
278 IRDA_DEBUG(0, "%s\n", __FUNCTION__);
279
280 iobase = self->io.fir_base;
281
282 #ifdef CONFIG_USE_W977_PNP
283 /* enter PnP configuration mode */
284 w977_efm_enter(efio);
285
286 w977_select_device(W977_DEVICE_IR, efio);
287
288 /* Deactivate device */
289 w977_write_reg(0x30, 0x00, efio);
290
291 w977_efm_exit(efio);
292 #endif /* CONFIG_USE_W977_PNP */
293
294 /* Remove netdevice */
295 if (self->netdev) {
296 rtnl_lock();
297 unregister_netdevice(self->netdev);
298 rtnl_unlock();
299 }
300
301 /* Release the PORT that this driver is using */
302 IRDA_DEBUG(0 , "%s(), Releasing Region %03x\n",
303 __FUNCTION__, self->io.fir_base);
304 release_region(self->io.fir_base, self->io.fir_ext);
305
306 if (self->tx_buff.head)
307 kfree(self->tx_buff.head);
308
309 if (self->rx_buff.head)
310 kfree(self->rx_buff.head);
311
312 kfree(self);
313
314 return 0;
315 }
316
w83977af_probe(int iobase,int irq,int dma)317 int w83977af_probe( int iobase, int irq, int dma)
318 {
319 int version;
320 int i;
321
322 for (i=0; i < 2; i++) {
323 IRDA_DEBUG( 0, "%s\n", __FUNCTION__);
324 #ifdef CONFIG_USE_W977_PNP
325 /* Enter PnP configuration mode */
326 w977_efm_enter(efbase[i]);
327
328 w977_select_device(W977_DEVICE_IR, efbase[i]);
329
330 /* Configure PnP port, IRQ, and DMA channel */
331 w977_write_reg(0x60, (iobase >> 8) & 0xff, efbase[i]);
332 w977_write_reg(0x61, (iobase) & 0xff, efbase[i]);
333
334 w977_write_reg(0x70, irq, efbase[i]);
335 #ifdef CONFIG_ARCH_NETWINDER
336 /* Netwinder uses 1 higher than Linux */
337 w977_write_reg(0x74, dma+1, efbase[i]);
338 #else
339 w977_write_reg(0x74, dma, efbase[i]);
340 #endif /*CONFIG_ARCH_NETWINDER */
341 w977_write_reg(0x75, 0x04, efbase[i]); /* Disable Tx DMA */
342
343 /* Set append hardware CRC, enable IR bank selection */
344 w977_write_reg(0xf0, APEDCRC|ENBNKSEL, efbase[i]);
345
346 /* Activate device */
347 w977_write_reg(0x30, 0x01, efbase[i]);
348
349 w977_efm_exit(efbase[i]);
350 #endif /* CONFIG_USE_W977_PNP */
351 /* Disable Advanced mode */
352 switch_bank(iobase, SET2);
353 outb(iobase+2, 0x00);
354
355 /* Turn on UART (global) interrupts */
356 switch_bank(iobase, SET0);
357 outb(HCR_EN_IRQ, iobase+HCR);
358
359 /* Switch to advanced mode */
360 switch_bank(iobase, SET2);
361 outb(inb(iobase+ADCR1) | ADCR1_ADV_SL, iobase+ADCR1);
362
363 /* Set default IR-mode */
364 switch_bank(iobase, SET0);
365 outb(HCR_SIR, iobase+HCR);
366
367 /* Read the Advanced IR ID */
368 switch_bank(iobase, SET3);
369 version = inb(iobase+AUID);
370
371 /* Should be 0x1? */
372 if (0x10 == (version & 0xf0)) {
373 efio = efbase[i];
374
375 /* Set FIFO size to 32 */
376 switch_bank(iobase, SET2);
377 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
378
379 /* Set FIFO threshold to TX17, RX16 */
380 switch_bank(iobase, SET0);
381 outb(UFR_RXTL|UFR_TXTL|UFR_TXF_RST|UFR_RXF_RST|
382 UFR_EN_FIFO,iobase+UFR);
383
384 /* Receiver frame length */
385 switch_bank(iobase, SET4);
386 outb(2048 & 0xff, iobase+6);
387 outb((2048 >> 8) & 0x1f, iobase+7);
388
389 /*
390 * Init HP HSDL-1100 transceiver.
391 *
392 * Set IRX_MSL since we have 2 * receive paths IRRX,
393 * and IRRXH. Clear IRSL0D since we want IRSL0 * to
394 * be a input pin used for IRRXH
395 *
396 * IRRX pin 37 connected to receiver
397 * IRTX pin 38 connected to transmitter
398 * FIRRX pin 39 connected to receiver (IRSL0)
399 * CIRRX pin 40 connected to pin 37
400 */
401 switch_bank(iobase, SET7);
402 outb(0x40, iobase+7);
403
404 MESSAGE("W83977AF (IR) driver loaded. "
405 "Version: 0x%02x\n", version);
406
407 return 0;
408 } else {
409 /* Try next extented function register address */
410 IRDA_DEBUG( 0, "%s(), Wrong chip version", __FUNCTION__);
411 }
412 }
413 return -1;
414 }
415
w83977af_change_speed(struct w83977af_ir * self,__u32 speed)416 void w83977af_change_speed(struct w83977af_ir *self, __u32 speed)
417 {
418 int ir_mode = HCR_SIR;
419 int iobase;
420 __u8 set;
421
422 iobase = self->io.fir_base;
423
424 /* Update accounting for new speed */
425 self->io.speed = speed;
426
427 /* Save current bank */
428 set = inb(iobase+SSR);
429
430 /* Disable interrupts */
431 switch_bank(iobase, SET0);
432 outb(0, iobase+ICR);
433
434 /* Select Set 2 */
435 switch_bank(iobase, SET2);
436 outb(0x00, iobase+ABHL);
437
438 switch (speed) {
439 case 9600: outb(0x0c, iobase+ABLL); break;
440 case 19200: outb(0x06, iobase+ABLL); break;
441 case 38400: outb(0x03, iobase+ABLL); break;
442 case 57600: outb(0x02, iobase+ABLL); break;
443 case 115200: outb(0x01, iobase+ABLL); break;
444 case 576000:
445 ir_mode = HCR_MIR_576;
446 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __FUNCTION__);
447 break;
448 case 1152000:
449 ir_mode = HCR_MIR_1152;
450 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __FUNCTION__);
451 break;
452 case 4000000:
453 ir_mode = HCR_FIR;
454 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __FUNCTION__);
455 break;
456 default:
457 ir_mode = HCR_FIR;
458 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n", __FUNCTION__, speed);
459 break;
460 }
461
462 /* Set speed mode */
463 switch_bank(iobase, SET0);
464 outb(ir_mode, iobase+HCR);
465
466 /* set FIFO size to 32 */
467 switch_bank(iobase, SET2);
468 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
469
470 /* set FIFO threshold to TX17, RX16 */
471 switch_bank(iobase, SET0);
472 outb(0x00, iobase+UFR); /* Reset */
473 outb(UFR_EN_FIFO, iobase+UFR); /* First we must enable FIFO */
474 outb(0xa7, iobase+UFR);
475
476 netif_wake_queue(self->netdev);
477
478 /* Enable some interrupts so we can receive frames */
479 switch_bank(iobase, SET0);
480 if (speed > PIO_MAX_SPEED) {
481 outb(ICR_EFSFI, iobase+ICR);
482 w83977af_dma_receive(self);
483 } else
484 outb(ICR_ERBRI, iobase+ICR);
485
486 /* Restore SSR */
487 outb(set, iobase+SSR);
488 }
489
490 /*
491 * Function w83977af_hard_xmit (skb, dev)
492 *
493 * Sets up a DMA transfer to send the current frame.
494 *
495 */
w83977af_hard_xmit(struct sk_buff * skb,struct net_device * dev)496 int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev)
497 {
498 struct w83977af_ir *self;
499 __s32 speed;
500 int iobase;
501 __u8 set;
502 int mtt;
503
504 self = (struct w83977af_ir *) dev->priv;
505
506 iobase = self->io.fir_base;
507
508 IRDA_DEBUG(4, "%s(%ld), skb->len=%d\n", __FUNCTION__, jiffies,
509 (int) skb->len);
510
511 /* Lock transmit buffer */
512 netif_stop_queue(dev);
513
514 /* Check if we need to change the speed */
515 speed = irda_get_next_speed(skb);
516 if ((speed != self->io.speed) && (speed != -1)) {
517 /* Check for empty frame */
518 if (!skb->len) {
519 w83977af_change_speed(self, speed);
520 dev_kfree_skb(skb);
521 return 0;
522 } else
523 self->new_speed = speed;
524 }
525
526 /* Save current set */
527 set = inb(iobase+SSR);
528
529 /* Decide if we should use PIO or DMA transfer */
530 if (self->io.speed > PIO_MAX_SPEED) {
531 self->tx_buff.data = self->tx_buff.head;
532 memcpy(self->tx_buff.data, skb->data, skb->len);
533 self->tx_buff.len = skb->len;
534
535 mtt = irda_get_mtt(skb);
536 #ifdef CONFIG_USE_INTERNAL_TIMER
537 if (mtt > 50) {
538 /* Adjust for timer resolution */
539 mtt /= 1000+1;
540
541 /* Setup timer */
542 switch_bank(iobase, SET4);
543 outb(mtt & 0xff, iobase+TMRL);
544 outb((mtt >> 8) & 0x0f, iobase+TMRH);
545
546 /* Start timer */
547 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
548 self->io.direction = IO_XMIT;
549
550 /* Enable timer interrupt */
551 switch_bank(iobase, SET0);
552 outb(ICR_ETMRI, iobase+ICR);
553 } else {
554 #endif
555 IRDA_DEBUG(4, "%s(%ld), mtt=%d\n", __FUNCTION__, jiffies, mtt);
556 if (mtt)
557 udelay(mtt);
558
559 /* Enable DMA interrupt */
560 switch_bank(iobase, SET0);
561 outb(ICR_EDMAI, iobase+ICR);
562 w83977af_dma_write(self, iobase);
563 #ifdef CONFIG_USE_INTERNAL_TIMER
564 }
565 #endif
566 } else {
567 self->tx_buff.data = self->tx_buff.head;
568 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
569 self->tx_buff.truesize);
570
571 /* Add interrupt on tx low level (will fire immediately) */
572 switch_bank(iobase, SET0);
573 outb(ICR_ETXTHI, iobase+ICR);
574 }
575 dev_kfree_skb(skb);
576
577 /* Restore set register */
578 outb(set, iobase+SSR);
579
580 return 0;
581 }
582
583 /*
584 * Function w83977af_dma_write (self, iobase)
585 *
586 * Send frame using DMA
587 *
588 */
w83977af_dma_write(struct w83977af_ir * self,int iobase)589 static void w83977af_dma_write(struct w83977af_ir *self, int iobase)
590 {
591 __u8 set;
592 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
593 unsigned long flags;
594 __u8 hcr;
595 #endif
596 IRDA_DEBUG(4, "%s(), len=%d\n", __FUNCTION__, self->tx_buff.len);
597
598 /* Save current set */
599 set = inb(iobase+SSR);
600
601 /* Disable DMA */
602 switch_bank(iobase, SET0);
603 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
604
605 /* Choose transmit DMA channel */
606 switch_bank(iobase, SET2);
607 outb(ADCR1_D_CHSW|/*ADCR1_DMA_F|*/ADCR1_ADV_SL, iobase+ADCR1);
608 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
609 save_flags(flags);
610 cli();
611
612 disable_dma(self->io.dma);
613 clear_dma_ff(self->io.dma);
614 set_dma_mode(self->io.dma, DMA_MODE_READ);
615 set_dma_addr(self->io.dma, virt_to_bus(self->tx_buff.data));
616 set_dma_count(self->io.dma, self->tx_buff.len);
617 #else
618 setup_dma(self->io.dma, self->tx_buff.data, self->tx_buff.len,
619 DMA_MODE_WRITE);
620 #endif
621 self->io.direction = IO_XMIT;
622
623 /* Enable DMA */
624 switch_bank(iobase, SET0);
625 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
626 hcr = inb(iobase+HCR);
627 outb(hcr | HCR_EN_DMA, iobase+HCR);
628 enable_dma(self->io.dma);
629 restore_flags(flags);
630 #else
631 outb(inb(iobase+HCR) | HCR_EN_DMA | HCR_TX_WT, iobase+HCR);
632 #endif
633
634 /* Restore set register */
635 outb(set, iobase+SSR);
636 }
637
638 /*
639 * Function w83977af_pio_write (iobase, buf, len, fifo_size)
640 *
641 *
642 *
643 */
w83977af_pio_write(int iobase,__u8 * buf,int len,int fifo_size)644 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
645 {
646 int actual = 0;
647 __u8 set;
648
649 IRDA_DEBUG(4, "%s\n", __FUNCTION__);
650
651 /* Save current bank */
652 set = inb(iobase+SSR);
653
654 switch_bank(iobase, SET0);
655 if (!(inb_p(iobase+USR) & USR_TSRE)) {
656 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n", __FUNCTION__);
657
658 fifo_size -= 17;
659 IRDA_DEBUG(4, "%s(), %d bytes left in tx fifo\n",
660 __FUNCTION__, fifo_size);
661 }
662
663 /* Fill FIFO with current frame */
664 while ((fifo_size-- > 0) && (actual < len)) {
665 /* Transmit next byte */
666 outb(buf[actual++], iobase+TBR);
667 }
668
669 IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
670 __FUNCTION__, fifo_size, actual, len);
671
672 /* Restore bank */
673 outb(set, iobase+SSR);
674
675 return actual;
676 }
677
678 /*
679 * Function w83977af_dma_xmit_complete (self)
680 *
681 * The transfer of a frame in finished. So do the necessary things
682 *
683 *
684 */
w83977af_dma_xmit_complete(struct w83977af_ir * self)685 void w83977af_dma_xmit_complete(struct w83977af_ir *self)
686 {
687 int iobase;
688 __u8 set;
689
690 IRDA_DEBUG(4, "%s(%ld)\n", __FUNCTION__, jiffies);
691
692 ASSERT(self != NULL, return;);
693
694 iobase = self->io.fir_base;
695
696 /* Save current set */
697 set = inb(iobase+SSR);
698
699 /* Disable DMA */
700 switch_bank(iobase, SET0);
701 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
702
703 /* Check for underrrun! */
704 if (inb(iobase+AUDR) & AUDR_UNDR) {
705 IRDA_DEBUG(0, "%s(), Transmit underrun!\n", __FUNCTION__);
706
707 self->stats.tx_errors++;
708 self->stats.tx_fifo_errors++;
709
710 /* Clear bit, by writing 1 to it */
711 outb(AUDR_UNDR, iobase+AUDR);
712 } else
713 self->stats.tx_packets++;
714
715
716 if (self->new_speed) {
717 w83977af_change_speed(self, self->new_speed);
718 self->new_speed = 0;
719 }
720
721 /* Unlock tx_buff and request another frame */
722 /* Tell the network layer, that we want more frames */
723 netif_wake_queue(self->netdev);
724
725 /* Restore set */
726 outb(set, iobase+SSR);
727 }
728
729 /*
730 * Function w83977af_dma_receive (self)
731 *
732 * Get ready for receiving a frame. The device will initiate a DMA
733 * if it starts to receive a frame.
734 *
735 */
w83977af_dma_receive(struct w83977af_ir * self)736 int w83977af_dma_receive(struct w83977af_ir *self)
737 {
738 int iobase;
739 __u8 set;
740 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
741 unsigned long flags;
742 __u8 hcr;
743 #endif
744 ASSERT(self != NULL, return -1;);
745
746 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
747
748 iobase= self->io.fir_base;
749
750 /* Save current set */
751 set = inb(iobase+SSR);
752
753 /* Disable DMA */
754 switch_bank(iobase, SET0);
755 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
756
757 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
758 switch_bank(iobase, SET2);
759 outb((inb(iobase+ADCR1) & ~ADCR1_D_CHSW)/*|ADCR1_DMA_F*/|ADCR1_ADV_SL,
760 iobase+ADCR1);
761
762 self->io.direction = IO_RECV;
763 self->rx_buff.data = self->rx_buff.head;
764
765 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
766 save_flags(flags);
767 cli();
768
769 disable_dma(self->io.dma);
770 clear_dma_ff(self->io.dma);
771 set_dma_mode(self->io.dma, DMA_MODE_READ);
772 set_dma_addr(self->io.dma, virt_to_bus(self->rx_buff.data));
773 set_dma_count(self->io.dma, self->rx_buff.truesize);
774 #else
775 setup_dma(self->io.dma, self->rx_buff.data, self->rx_buff.truesize,
776 DMA_MODE_READ);
777 #endif
778 /*
779 * Reset Rx FIFO. This will also flush the ST_FIFO, it's very
780 * important that we don't reset the Tx FIFO since it might not
781 * be finished transmitting yet
782 */
783 switch_bank(iobase, SET0);
784 outb(UFR_RXTL|UFR_TXTL|UFR_RXF_RST|UFR_EN_FIFO, iobase+UFR);
785 self->st_fifo.len = self->st_fifo.tail = self->st_fifo.head = 0;
786
787 /* Enable DMA */
788 switch_bank(iobase, SET0);
789 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
790 hcr = inb(iobase+HCR);
791 outb(hcr | HCR_EN_DMA, iobase+HCR);
792 enable_dma(self->io.dma);
793 restore_flags(flags);
794 #else
795 outb(inb(iobase+HCR) | HCR_EN_DMA, iobase+HCR);
796 #endif
797 /* Restore set */
798 outb(set, iobase+SSR);
799
800 return 0;
801 }
802
803 /*
804 * Function w83977af_receive_complete (self)
805 *
806 * Finished with receiving a frame
807 *
808 */
w83977af_dma_receive_complete(struct w83977af_ir * self)809 int w83977af_dma_receive_complete(struct w83977af_ir *self)
810 {
811 struct sk_buff *skb;
812 struct st_fifo *st_fifo;
813 int len;
814 int iobase;
815 __u8 set;
816 __u8 status;
817
818 IRDA_DEBUG(4, "%s()\n", __FUNCTION__);
819
820 st_fifo = &self->st_fifo;
821
822 iobase = self->io.fir_base;
823
824 /* Save current set */
825 set = inb(iobase+SSR);
826
827 iobase = self->io.fir_base;
828
829 /* Read status FIFO */
830 switch_bank(iobase, SET5);
831 while ((status = inb(iobase+FS_FO)) & FS_FO_FSFDR) {
832 st_fifo->entries[st_fifo->tail].status = status;
833
834 st_fifo->entries[st_fifo->tail].len = inb(iobase+RFLFL);
835 st_fifo->entries[st_fifo->tail].len |= inb(iobase+RFLFH) << 8;
836
837 st_fifo->tail++;
838 st_fifo->len++;
839 }
840
841 while (st_fifo->len) {
842 /* Get first entry */
843 status = st_fifo->entries[st_fifo->head].status;
844 len = st_fifo->entries[st_fifo->head].len;
845 st_fifo->head++;
846 st_fifo->len--;
847
848 /* Check for errors */
849 if (status & FS_FO_ERR_MSK) {
850 if (status & FS_FO_LST_FR) {
851 /* Add number of lost frames to stats */
852 self->stats.rx_errors += len;
853 } else {
854 /* Skip frame */
855 self->stats.rx_errors++;
856
857 self->rx_buff.data += len;
858
859 if (status & FS_FO_MX_LEX)
860 self->stats.rx_length_errors++;
861
862 if (status & FS_FO_PHY_ERR)
863 self->stats.rx_frame_errors++;
864
865 if (status & FS_FO_CRC_ERR)
866 self->stats.rx_crc_errors++;
867 }
868 /* The errors below can be reported in both cases */
869 if (status & FS_FO_RX_OV)
870 self->stats.rx_fifo_errors++;
871
872 if (status & FS_FO_FSF_OV)
873 self->stats.rx_fifo_errors++;
874
875 } else {
876 /* Check if we have transferred all data to memory */
877 switch_bank(iobase, SET0);
878 if (inb(iobase+USR) & USR_RDR) {
879 #ifdef CONFIG_USE_INTERNAL_TIMER
880 /* Put this entry back in fifo */
881 st_fifo->head--;
882 st_fifo->len++;
883 st_fifo->entries[st_fifo->head].status = status;
884 st_fifo->entries[st_fifo->head].len = len;
885
886 /* Restore set register */
887 outb(set, iobase+SSR);
888
889 return FALSE; /* I'll be back! */
890 #else
891 udelay(80); /* Should be enough!? */
892 #endif
893 }
894
895 skb = dev_alloc_skb(len+1);
896 if (skb == NULL) {
897 printk(KERN_INFO "%s(), memory squeeze, dropping frame.\n", __FUNCTION__);
898 /* Restore set register */
899 outb(set, iobase+SSR);
900
901 return FALSE;
902 }
903
904 /* Align to 20 bytes */
905 skb_reserve(skb, 1);
906
907 /* Copy frame without CRC */
908 if (self->io.speed < 4000000) {
909 skb_put(skb, len-2);
910 memcpy(skb->data, self->rx_buff.data, len-2);
911 } else {
912 skb_put(skb, len-4);
913 memcpy(skb->data, self->rx_buff.data, len-4);
914 }
915
916 /* Move to next frame */
917 self->rx_buff.data += len;
918 self->stats.rx_packets++;
919
920 skb->dev = self->netdev;
921 skb->mac.raw = skb->data;
922 skb->protocol = htons(ETH_P_IRDA);
923 netif_rx(skb);
924 }
925 }
926 /* Restore set register */
927 outb(set, iobase+SSR);
928
929 return TRUE;
930 }
931
932 /*
933 * Function pc87108_pio_receive (self)
934 *
935 * Receive all data in receiver FIFO
936 *
937 */
w83977af_pio_receive(struct w83977af_ir * self)938 static void w83977af_pio_receive(struct w83977af_ir *self)
939 {
940 __u8 byte = 0x00;
941 int iobase;
942
943 IRDA_DEBUG(4, "%s\n", __FUNCTION__);
944
945 ASSERT(self != NULL, return;);
946
947 iobase = self->io.fir_base;
948
949 /* Receive all characters in Rx FIFO */
950 do {
951 byte = inb(iobase+RBR);
952 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
953 byte);
954 } while (inb(iobase+USR) & USR_RDR); /* Data available */
955 }
956
957 /*
958 * Function w83977af_sir_interrupt (self, eir)
959 *
960 * Handle SIR interrupt
961 *
962 */
w83977af_sir_interrupt(struct w83977af_ir * self,int isr)963 static __u8 w83977af_sir_interrupt(struct w83977af_ir *self, int isr)
964 {
965 int actual;
966 __u8 new_icr = 0;
967 __u8 set;
968 int iobase;
969
970 IRDA_DEBUG(4, "%s(), isr=%#x\n", __FUNCTION__, isr);
971
972 iobase = self->io.fir_base;
973 /* Transmit FIFO low on data */
974 if (isr & ISR_TXTH_I) {
975 /* Write data left in transmit buffer */
976 actual = w83977af_pio_write(self->io.fir_base,
977 self->tx_buff.data,
978 self->tx_buff.len,
979 self->io.fifo_size);
980
981 self->tx_buff.data += actual;
982 self->tx_buff.len -= actual;
983
984 self->io.direction = IO_XMIT;
985
986 /* Check if finished */
987 if (self->tx_buff.len > 0) {
988 new_icr |= ICR_ETXTHI;
989 } else {
990 set = inb(iobase+SSR);
991 switch_bank(iobase, SET0);
992 outb(AUDR_SFEND, iobase+AUDR);
993 outb(set, iobase+SSR);
994
995 self->stats.tx_packets++;
996
997 /* Feed me more packets */
998 netif_wake_queue(self->netdev);
999 new_icr |= ICR_ETBREI;
1000 }
1001 }
1002 /* Check if transmission has completed */
1003 if (isr & ISR_TXEMP_I) {
1004 /* Check if we need to change the speed? */
1005 if (self->new_speed) {
1006 IRDA_DEBUG(2, "%s(), Changing speed!\n", __FUNCTION__);
1007 w83977af_change_speed(self, self->new_speed);
1008 self->new_speed = 0;
1009 }
1010
1011 /* Turn around and get ready to receive some data */
1012 self->io.direction = IO_RECV;
1013 new_icr |= ICR_ERBRI;
1014 }
1015
1016 /* Rx FIFO threshold or timeout */
1017 if (isr & ISR_RXTH_I) {
1018 w83977af_pio_receive(self);
1019
1020 /* Keep receiving */
1021 new_icr |= ICR_ERBRI;
1022 }
1023 return new_icr;
1024 }
1025
1026 /*
1027 * Function pc87108_fir_interrupt (self, eir)
1028 *
1029 * Handle MIR/FIR interrupt
1030 *
1031 */
w83977af_fir_interrupt(struct w83977af_ir * self,int isr)1032 static __u8 w83977af_fir_interrupt(struct w83977af_ir *self, int isr)
1033 {
1034 __u8 new_icr = 0;
1035 __u8 set;
1036 int iobase;
1037
1038 iobase = self->io.fir_base;
1039 set = inb(iobase+SSR);
1040
1041 /* End of frame detected in FIFO */
1042 if (isr & (ISR_FEND_I|ISR_FSF_I)) {
1043 if (w83977af_dma_receive_complete(self)) {
1044
1045 /* Wait for next status FIFO interrupt */
1046 new_icr |= ICR_EFSFI;
1047 } else {
1048 /* DMA not finished yet */
1049
1050 /* Set timer value, resolution 1 ms */
1051 switch_bank(iobase, SET4);
1052 outb(0x01, iobase+TMRL); /* 1 ms */
1053 outb(0x00, iobase+TMRH);
1054
1055 /* Start timer */
1056 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
1057
1058 new_icr |= ICR_ETMRI;
1059 }
1060 }
1061 /* Timer finished */
1062 if (isr & ISR_TMR_I) {
1063 /* Disable timer */
1064 switch_bank(iobase, SET4);
1065 outb(0, iobase+IR_MSL);
1066
1067 /* Clear timer event */
1068 /* switch_bank(iobase, SET0); */
1069 /* outb(ASCR_CTE, iobase+ASCR); */
1070
1071 /* Check if this is a TX timer interrupt */
1072 if (self->io.direction == IO_XMIT) {
1073 w83977af_dma_write(self, iobase);
1074
1075 new_icr |= ICR_EDMAI;
1076 } else {
1077 /* Check if DMA has now finished */
1078 w83977af_dma_receive_complete(self);
1079
1080 new_icr |= ICR_EFSFI;
1081 }
1082 }
1083 /* Finished with DMA */
1084 if (isr & ISR_DMA_I) {
1085 w83977af_dma_xmit_complete(self);
1086
1087 /* Check if there are more frames to be transmitted */
1088 /* if (irda_device_txqueue_empty(self)) { */
1089
1090 /* Prepare for receive
1091 *
1092 * ** Netwinder Tx DMA likes that we do this anyway **
1093 */
1094 w83977af_dma_receive(self);
1095 new_icr = ICR_EFSFI;
1096 /* } */
1097 }
1098
1099 /* Restore set */
1100 outb(set, iobase+SSR);
1101
1102 return new_icr;
1103 }
1104
1105 /*
1106 * Function w83977af_interrupt (irq, dev_id, regs)
1107 *
1108 * An interrupt from the chip has arrived. Time to do some work
1109 *
1110 */
w83977af_interrupt(int irq,void * dev_id,struct pt_regs * regs)1111 static void w83977af_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1112 {
1113 struct net_device *dev = (struct net_device *) dev_id;
1114 struct w83977af_ir *self;
1115 __u8 set, icr, isr;
1116 int iobase;
1117
1118 if (!dev) {
1119 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1120 driver_name, irq);
1121 return;
1122 }
1123 self = (struct w83977af_ir *) dev->priv;
1124
1125 iobase = self->io.fir_base;
1126
1127 /* Save current bank */
1128 set = inb(iobase+SSR);
1129 switch_bank(iobase, SET0);
1130
1131 icr = inb(iobase+ICR);
1132 isr = inb(iobase+ISR) & icr; /* Mask out the interesting ones */
1133
1134 outb(0, iobase+ICR); /* Disable interrupts */
1135
1136 if (isr) {
1137 /* Dispatch interrupt handler for the current speed */
1138 if (self->io.speed > PIO_MAX_SPEED )
1139 icr = w83977af_fir_interrupt(self, isr);
1140 else
1141 icr = w83977af_sir_interrupt(self, isr);
1142 }
1143
1144 outb(icr, iobase+ICR); /* Restore (new) interrupts */
1145 outb(set, iobase+SSR); /* Restore bank register */
1146
1147 }
1148
1149 /*
1150 * Function w83977af_is_receiving (self)
1151 *
1152 * Return TRUE is we are currently receiving a frame
1153 *
1154 */
w83977af_is_receiving(struct w83977af_ir * self)1155 static int w83977af_is_receiving(struct w83977af_ir *self)
1156 {
1157 int status = FALSE;
1158 int iobase;
1159 __u8 set;
1160
1161 ASSERT(self != NULL, return FALSE;);
1162
1163 if (self->io.speed > 115200) {
1164 iobase = self->io.fir_base;
1165
1166 /* Check if rx FIFO is not empty */
1167 set = inb(iobase+SSR);
1168 switch_bank(iobase, SET2);
1169 if ((inb(iobase+RXFDTH) & 0x3f) != 0) {
1170 /* We are receiving something */
1171 status = TRUE;
1172 }
1173 outb(set, iobase+SSR);
1174 } else
1175 status = (self->rx_buff.state != OUTSIDE_FRAME);
1176
1177 return status;
1178 }
1179
1180 /*
1181 * Function w83977af_net_init (dev)
1182 *
1183 *
1184 *
1185 */
w83977af_net_init(struct net_device * dev)1186 static int w83977af_net_init(struct net_device *dev)
1187 {
1188 IRDA_DEBUG(0, "%s\n", __FUNCTION__);
1189
1190 /* Set up to be a normal IrDA network device driver */
1191 irda_device_setup(dev);
1192
1193 /* Insert overrides below this line! */
1194
1195 return 0;
1196 }
1197
1198
1199 /*
1200 * Function w83977af_net_open (dev)
1201 *
1202 * Start the device
1203 *
1204 */
w83977af_net_open(struct net_device * dev)1205 static int w83977af_net_open(struct net_device *dev)
1206 {
1207 struct w83977af_ir *self;
1208 int iobase;
1209 char hwname[32];
1210 __u8 set;
1211
1212 IRDA_DEBUG(0, "%s\n", __FUNCTION__);
1213
1214 ASSERT(dev != NULL, return -1;);
1215 self = (struct w83977af_ir *) dev->priv;
1216
1217 ASSERT(self != NULL, return 0;);
1218
1219 iobase = self->io.fir_base;
1220
1221 if (request_irq(self->io.irq, w83977af_interrupt, 0, dev->name,
1222 (void *) dev)) {
1223 return -EAGAIN;
1224 }
1225 /*
1226 * Always allocate the DMA channel after the IRQ,
1227 * and clean up on failure.
1228 */
1229 if (request_dma(self->io.dma, dev->name)) {
1230 free_irq(self->io.irq, self);
1231 return -EAGAIN;
1232 }
1233
1234 /* Save current set */
1235 set = inb(iobase+SSR);
1236
1237 /* Enable some interrupts so we can receive frames again */
1238 switch_bank(iobase, SET0);
1239 if (self->io.speed > 115200) {
1240 outb(ICR_EFSFI, iobase+ICR);
1241 w83977af_dma_receive(self);
1242 } else
1243 outb(ICR_ERBRI, iobase+ICR);
1244
1245 /* Restore bank register */
1246 outb(set, iobase+SSR);
1247
1248 /* Ready to play! */
1249 netif_start_queue(dev);
1250
1251 /* Give self a hardware name */
1252 sprintf(hwname, "w83977af @ 0x%03x", self->io.fir_base);
1253
1254 /*
1255 * Open new IrLAP layer instance, now that everything should be
1256 * initialized properly
1257 */
1258 self->irlap = irlap_open(dev, &self->qos, hwname);
1259
1260 MOD_INC_USE_COUNT;
1261
1262 return 0;
1263 }
1264
1265 /*
1266 * Function w83977af_net_close (dev)
1267 *
1268 * Stop the device
1269 *
1270 */
w83977af_net_close(struct net_device * dev)1271 static int w83977af_net_close(struct net_device *dev)
1272 {
1273 struct w83977af_ir *self;
1274 int iobase;
1275 __u8 set;
1276
1277 IRDA_DEBUG(0, "%s\n", __FUNCTION__);
1278
1279 ASSERT(dev != NULL, return -1;);
1280
1281 self = (struct w83977af_ir *) dev->priv;
1282
1283 ASSERT(self != NULL, return 0;);
1284
1285 iobase = self->io.fir_base;
1286
1287 /* Stop device */
1288 netif_stop_queue(dev);
1289
1290 /* Stop and remove instance of IrLAP */
1291 if (self->irlap)
1292 irlap_close(self->irlap);
1293 self->irlap = NULL;
1294
1295 disable_dma(self->io.dma);
1296
1297 /* Save current set */
1298 set = inb(iobase+SSR);
1299
1300 /* Disable interrupts */
1301 switch_bank(iobase, SET0);
1302 outb(0, iobase+ICR);
1303
1304 free_irq(self->io.irq, dev);
1305 free_dma(self->io.dma);
1306
1307 /* Restore bank register */
1308 outb(set, iobase+SSR);
1309
1310 MOD_DEC_USE_COUNT;
1311
1312 return 0;
1313 }
1314
1315 /*
1316 * Function w83977af_net_ioctl (dev, rq, cmd)
1317 *
1318 * Process IOCTL commands for this device
1319 *
1320 */
w83977af_net_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)1321 static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1322 {
1323 struct if_irda_req *irq = (struct if_irda_req *) rq;
1324 struct w83977af_ir *self;
1325 unsigned long flags;
1326 int ret = 0;
1327
1328 ASSERT(dev != NULL, return -1;);
1329
1330 self = dev->priv;
1331
1332 ASSERT(self != NULL, return -1;);
1333
1334 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name, cmd);
1335
1336 /* Disable interrupts & save flags */
1337 save_flags(flags);
1338 cli();
1339
1340 switch (cmd) {
1341 case SIOCSBANDWIDTH: /* Set bandwidth */
1342 if (!capable(CAP_NET_ADMIN)) {
1343 ret = -EPERM;
1344 goto out;
1345 }
1346 w83977af_change_speed(self, irq->ifr_baudrate);
1347 break;
1348 case SIOCSMEDIABUSY: /* Set media busy */
1349 if (!capable(CAP_NET_ADMIN)) {
1350 ret = -EPERM;
1351 goto out;
1352 }
1353 irda_device_set_media_busy(self->netdev, TRUE);
1354 break;
1355 case SIOCGRECEIVING: /* Check if we are receiving right now */
1356 irq->ifr_receiving = w83977af_is_receiving(self);
1357 break;
1358 default:
1359 ret = -EOPNOTSUPP;
1360 }
1361 out:
1362 restore_flags(flags);
1363 return ret;
1364 }
1365
w83977af_net_get_stats(struct net_device * dev)1366 static struct net_device_stats *w83977af_net_get_stats(struct net_device *dev)
1367 {
1368 struct w83977af_ir *self = (struct w83977af_ir *) dev->priv;
1369
1370 return &self->stats;
1371 }
1372
1373 #ifdef MODULE
1374
1375 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
1376 MODULE_DESCRIPTION("Winbond W83977AF IrDA Device Driver");
1377 MODULE_LICENSE("GPL");
1378
1379
1380 MODULE_PARM(qos_mtt_bits, "i");
1381 MODULE_PARM_DESC(qos_mtt_bits, "Mimimum Turn Time");
1382 MODULE_PARM(io, "1-4i");
1383 MODULE_PARM_DESC(io, "Base I/O addresses");
1384 MODULE_PARM(irq, "1-4i");
1385 MODULE_PARM_DESC(irq, "IRQ lines");
1386
1387 /*
1388 * Function init_module (void)
1389 *
1390 *
1391 *
1392 */
init_module(void)1393 int init_module(void)
1394 {
1395 return w83977af_init();
1396 }
1397
1398 /*
1399 * Function cleanup_module (void)
1400 *
1401 *
1402 *
1403 */
cleanup_module(void)1404 void cleanup_module(void)
1405 {
1406 w83977af_cleanup();
1407 }
1408 #endif /* MODULE */
1409