1 // SPDX-License-Identifier: GPL-2.0-only
2 #include <linux/kvm_host.h>
3
4 #include <asm/irq_remapping.h>
5 #include <asm/cpu.h>
6
7 #include "lapic.h"
8 #include "irq.h"
9 #include "posted_intr.h"
10 #include "trace.h"
11 #include "vmx.h"
12
13 /*
14 * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler()
15 * when a WAKEUP_VECTOR interrupted is posted. vCPUs are added to the list when
16 * the vCPU is scheduled out and is blocking (e.g. in HLT) with IRQs enabled.
17 * The vCPUs posted interrupt descriptor is updated at the same time to set its
18 * notification vector to WAKEUP_VECTOR, so that posted interrupt from devices
19 * wake the target vCPUs. vCPUs are removed from the list and the notification
20 * vector is reset when the vCPU is scheduled in.
21 */
22 static DEFINE_PER_CPU(struct list_head, wakeup_vcpus_on_cpu);
23 /*
24 * Protect the per-CPU list with a per-CPU spinlock to handle task migration.
25 * When a blocking vCPU is awakened _and_ migrated to a different pCPU, the
26 * ->sched_in() path will need to take the vCPU off the list of the _previous_
27 * CPU. IRQs must be disabled when taking this lock, otherwise deadlock will
28 * occur if a wakeup IRQ arrives and attempts to acquire the lock.
29 */
30 static DEFINE_PER_CPU(raw_spinlock_t, wakeup_vcpus_on_cpu_lock);
31
vcpu_to_pi_desc(struct kvm_vcpu * vcpu)32 static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)
33 {
34 return &(to_vmx(vcpu)->pi_desc);
35 }
36
pi_try_set_control(struct pi_desc * pi_desc,u64 * pold,u64 new)37 static int pi_try_set_control(struct pi_desc *pi_desc, u64 *pold, u64 new)
38 {
39 /*
40 * PID.ON can be set at any time by a different vCPU or by hardware,
41 * e.g. a device. PID.control must be written atomically, and the
42 * update must be retried with a fresh snapshot an ON change causes
43 * the cmpxchg to fail.
44 */
45 if (!try_cmpxchg64(&pi_desc->control, pold, new))
46 return -EBUSY;
47
48 return 0;
49 }
50
vmx_vcpu_pi_load(struct kvm_vcpu * vcpu,int cpu)51 void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
52 {
53 struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
54 struct vcpu_vmx *vmx = to_vmx(vcpu);
55 struct pi_desc old, new;
56 unsigned long flags;
57 unsigned int dest;
58
59 /*
60 * To simplify hot-plug and dynamic toggling of APICv, keep PI.NDST and
61 * PI.SN up-to-date even if there is no assigned device or if APICv is
62 * deactivated due to a dynamic inhibit bit, e.g. for Hyper-V's SyncIC.
63 */
64 if (!enable_apicv || !lapic_in_kernel(vcpu))
65 return;
66
67 /*
68 * If the vCPU wasn't on the wakeup list and wasn't migrated, then the
69 * full update can be skipped as neither the vector nor the destination
70 * needs to be changed.
71 */
72 if (pi_desc->nv != POSTED_INTR_WAKEUP_VECTOR && vcpu->cpu == cpu) {
73 /*
74 * Clear SN if it was set due to being preempted. Again, do
75 * this even if there is no assigned device for simplicity.
76 */
77 if (pi_test_and_clear_sn(pi_desc))
78 goto after_clear_sn;
79 return;
80 }
81
82 local_irq_save(flags);
83
84 /*
85 * If the vCPU was waiting for wakeup, remove the vCPU from the wakeup
86 * list of the _previous_ pCPU, which will not be the same as the
87 * current pCPU if the task was migrated.
88 */
89 if (pi_desc->nv == POSTED_INTR_WAKEUP_VECTOR) {
90 raw_spin_lock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
91 list_del(&vmx->pi_wakeup_list);
92 raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
93 }
94
95 dest = cpu_physical_id(cpu);
96 if (!x2apic_mode)
97 dest = (dest << 8) & 0xFF00;
98
99 old.control = READ_ONCE(pi_desc->control);
100 do {
101 new.control = old.control;
102
103 /*
104 * Clear SN (as above) and refresh the destination APIC ID to
105 * handle task migration (@cpu != vcpu->cpu).
106 */
107 new.ndst = dest;
108 new.sn = 0;
109
110 /*
111 * Restore the notification vector; in the blocking case, the
112 * descriptor was modified on "put" to use the wakeup vector.
113 */
114 new.nv = POSTED_INTR_VECTOR;
115 } while (pi_try_set_control(pi_desc, &old.control, new.control));
116
117 local_irq_restore(flags);
118
119 after_clear_sn:
120
121 /*
122 * Clear SN before reading the bitmap. The VT-d firmware
123 * writes the bitmap and reads SN atomically (5.2.3 in the
124 * spec), so it doesn't really have a memory barrier that
125 * pairs with this, but we cannot do that and we need one.
126 */
127 smp_mb__after_atomic();
128
129 if (!pi_is_pir_empty(pi_desc))
130 pi_set_on(pi_desc);
131 }
132
vmx_can_use_vtd_pi(struct kvm * kvm)133 static bool vmx_can_use_vtd_pi(struct kvm *kvm)
134 {
135 return irqchip_in_kernel(kvm) && enable_apicv &&
136 kvm_arch_has_assigned_device(kvm) &&
137 irq_remapping_cap(IRQ_POSTING_CAP);
138 }
139
140 /*
141 * Put the vCPU on this pCPU's list of vCPUs that needs to be awakened and set
142 * WAKEUP as the notification vector in the PI descriptor.
143 */
pi_enable_wakeup_handler(struct kvm_vcpu * vcpu)144 static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)
145 {
146 struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
147 struct vcpu_vmx *vmx = to_vmx(vcpu);
148 struct pi_desc old, new;
149 unsigned long flags;
150
151 local_irq_save(flags);
152
153 raw_spin_lock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
154 list_add_tail(&vmx->pi_wakeup_list,
155 &per_cpu(wakeup_vcpus_on_cpu, vcpu->cpu));
156 raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
157
158 WARN(pi_desc->sn, "PI descriptor SN field set before blocking");
159
160 old.control = READ_ONCE(pi_desc->control);
161 do {
162 /* set 'NV' to 'wakeup vector' */
163 new.control = old.control;
164 new.nv = POSTED_INTR_WAKEUP_VECTOR;
165 } while (pi_try_set_control(pi_desc, &old.control, new.control));
166
167 /*
168 * Send a wakeup IPI to this CPU if an interrupt may have been posted
169 * before the notification vector was updated, in which case the IRQ
170 * will arrive on the non-wakeup vector. An IPI is needed as calling
171 * try_to_wake_up() from ->sched_out() isn't allowed (IRQs are not
172 * enabled until it is safe to call try_to_wake_up() on the task being
173 * scheduled out).
174 */
175 if (pi_test_on(&new))
176 apic->send_IPI_self(POSTED_INTR_WAKEUP_VECTOR);
177
178 local_irq_restore(flags);
179 }
180
vmx_needs_pi_wakeup(struct kvm_vcpu * vcpu)181 static bool vmx_needs_pi_wakeup(struct kvm_vcpu *vcpu)
182 {
183 /*
184 * The default posted interrupt vector does nothing when
185 * invoked outside guest mode. Return whether a blocked vCPU
186 * can be the target of posted interrupts, as is the case when
187 * using either IPI virtualization or VT-d PI, so that the
188 * notification vector is switched to the one that calls
189 * back to the pi_wakeup_handler() function.
190 */
191 return vmx_can_use_ipiv(vcpu) || vmx_can_use_vtd_pi(vcpu->kvm);
192 }
193
vmx_vcpu_pi_put(struct kvm_vcpu * vcpu)194 void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu)
195 {
196 struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
197
198 if (!vmx_needs_pi_wakeup(vcpu))
199 return;
200
201 if (kvm_vcpu_is_blocking(vcpu) && !vmx_interrupt_blocked(vcpu))
202 pi_enable_wakeup_handler(vcpu);
203
204 /*
205 * Set SN when the vCPU is preempted. Note, the vCPU can both be seen
206 * as blocking and preempted, e.g. if it's preempted between setting
207 * its wait state and manually scheduling out.
208 */
209 if (vcpu->preempted)
210 pi_set_sn(pi_desc);
211 }
212
213 /*
214 * Handler for POSTED_INTERRUPT_WAKEUP_VECTOR.
215 */
pi_wakeup_handler(void)216 void pi_wakeup_handler(void)
217 {
218 int cpu = smp_processor_id();
219 struct list_head *wakeup_list = &per_cpu(wakeup_vcpus_on_cpu, cpu);
220 raw_spinlock_t *spinlock = &per_cpu(wakeup_vcpus_on_cpu_lock, cpu);
221 struct vcpu_vmx *vmx;
222
223 raw_spin_lock(spinlock);
224 list_for_each_entry(vmx, wakeup_list, pi_wakeup_list) {
225
226 if (pi_test_on(&vmx->pi_desc))
227 kvm_vcpu_wake_up(&vmx->vcpu);
228 }
229 raw_spin_unlock(spinlock);
230 }
231
pi_init_cpu(int cpu)232 void __init pi_init_cpu(int cpu)
233 {
234 INIT_LIST_HEAD(&per_cpu(wakeup_vcpus_on_cpu, cpu));
235 raw_spin_lock_init(&per_cpu(wakeup_vcpus_on_cpu_lock, cpu));
236 }
237
pi_has_pending_interrupt(struct kvm_vcpu * vcpu)238 bool pi_has_pending_interrupt(struct kvm_vcpu *vcpu)
239 {
240 struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
241
242 return pi_test_on(pi_desc) ||
243 (pi_test_sn(pi_desc) && !pi_is_pir_empty(pi_desc));
244 }
245
246
247 /*
248 * Bail out of the block loop if the VM has an assigned
249 * device, but the blocking vCPU didn't reconfigure the
250 * PI.NV to the wakeup vector, i.e. the assigned device
251 * came along after the initial check in vmx_vcpu_pi_put().
252 */
vmx_pi_start_assignment(struct kvm * kvm)253 void vmx_pi_start_assignment(struct kvm *kvm)
254 {
255 if (!irq_remapping_cap(IRQ_POSTING_CAP))
256 return;
257
258 kvm_make_all_cpus_request(kvm, KVM_REQ_UNBLOCK);
259 }
260
261 /*
262 * vmx_pi_update_irte - set IRTE for Posted-Interrupts
263 *
264 * @kvm: kvm
265 * @host_irq: host irq of the interrupt
266 * @guest_irq: gsi of the interrupt
267 * @set: set or unset PI
268 * returns 0 on success, < 0 on failure
269 */
vmx_pi_update_irte(struct kvm * kvm,unsigned int host_irq,uint32_t guest_irq,bool set)270 int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
271 uint32_t guest_irq, bool set)
272 {
273 struct kvm_kernel_irq_routing_entry *e;
274 struct kvm_irq_routing_table *irq_rt;
275 struct kvm_lapic_irq irq;
276 struct kvm_vcpu *vcpu;
277 struct vcpu_data vcpu_info;
278 int idx, ret = 0;
279
280 if (!vmx_can_use_vtd_pi(kvm))
281 return 0;
282
283 idx = srcu_read_lock(&kvm->irq_srcu);
284 irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
285 if (guest_irq >= irq_rt->nr_rt_entries ||
286 hlist_empty(&irq_rt->map[guest_irq])) {
287 pr_warn_once("no route for guest_irq %u/%u (broken user space?)\n",
288 guest_irq, irq_rt->nr_rt_entries);
289 goto out;
290 }
291
292 hlist_for_each_entry(e, &irq_rt->map[guest_irq], link) {
293 if (e->type != KVM_IRQ_ROUTING_MSI)
294 continue;
295 /*
296 * VT-d PI cannot support posting multicast/broadcast
297 * interrupts to a vCPU, we still use interrupt remapping
298 * for these kind of interrupts.
299 *
300 * For lowest-priority interrupts, we only support
301 * those with single CPU as the destination, e.g. user
302 * configures the interrupts via /proc/irq or uses
303 * irqbalance to make the interrupts single-CPU.
304 *
305 * We will support full lowest-priority interrupt later.
306 *
307 * In addition, we can only inject generic interrupts using
308 * the PI mechanism, refuse to route others through it.
309 */
310
311 kvm_set_msi_irq(kvm, e, &irq);
312 if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||
313 !kvm_irq_is_postable(&irq)) {
314 /*
315 * Make sure the IRTE is in remapped mode if
316 * we don't handle it in posted mode.
317 */
318 ret = irq_set_vcpu_affinity(host_irq, NULL);
319 if (ret < 0) {
320 printk(KERN_INFO
321 "failed to back to remapped mode, irq: %u\n",
322 host_irq);
323 goto out;
324 }
325
326 continue;
327 }
328
329 vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));
330 vcpu_info.vector = irq.vector;
331
332 trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, e->gsi,
333 vcpu_info.vector, vcpu_info.pi_desc_addr, set);
334
335 if (set)
336 ret = irq_set_vcpu_affinity(host_irq, &vcpu_info);
337 else
338 ret = irq_set_vcpu_affinity(host_irq, NULL);
339
340 if (ret < 0) {
341 printk(KERN_INFO "%s: failed to update PI IRTE\n",
342 __func__);
343 goto out;
344 }
345 }
346
347 ret = 0;
348 out:
349 srcu_read_unlock(&kvm->irq_srcu, idx);
350 return ret;
351 }
352