1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /******************************************************************************
3  *
4  * COPYRIGHT (C) 2014-2022 VMware, Inc., Palo Alto, CA., USA
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  ******************************************************************************/
27 
28 #include <drm/drm_atomic.h>
29 #include <drm/drm_atomic_helper.h>
30 #include <drm/drm_damage_helper.h>
31 #include <drm/drm_fourcc.h>
32 #include <drm/drm_vblank.h>
33 
34 #include "vmwgfx_kms.h"
35 #include "vmw_surface_cache.h"
36 
37 #define vmw_crtc_to_stdu(x) \
38 	container_of(x, struct vmw_screen_target_display_unit, base.crtc)
39 #define vmw_encoder_to_stdu(x) \
40 	container_of(x, struct vmw_screen_target_display_unit, base.encoder)
41 #define vmw_connector_to_stdu(x) \
42 	container_of(x, struct vmw_screen_target_display_unit, base.connector)
43 
44 
45 
46 enum stdu_content_type {
47 	SAME_AS_DISPLAY = 0,
48 	SEPARATE_SURFACE,
49 	SEPARATE_BO
50 };
51 
52 /**
53  * struct vmw_stdu_dirty - closure structure for the update functions
54  *
55  * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
56  * @transfer: Transfer direction for DMA command.
57  * @left: Left side of bounding box.
58  * @right: Right side of bounding box.
59  * @top: Top side of bounding box.
60  * @bottom: Bottom side of bounding box.
61  * @fb_left: Left side of the framebuffer/content bounding box
62  * @fb_top: Top of the framebuffer/content bounding box
63  * @pitch: framebuffer pitch (stride)
64  * @buf: buffer object when DMA-ing between buffer and screen targets.
65  * @sid: Surface ID when copying between surface and screen targets.
66  */
67 struct vmw_stdu_dirty {
68 	struct vmw_kms_dirty base;
69 	SVGA3dTransferType  transfer;
70 	s32 left, right, top, bottom;
71 	s32 fb_left, fb_top;
72 	u32 pitch;
73 	union {
74 		struct vmw_buffer_object *buf;
75 		u32 sid;
76 	};
77 };
78 
79 /*
80  * SVGA commands that are used by this code. Please see the device headers
81  * for explanation.
82  */
83 struct vmw_stdu_update {
84 	SVGA3dCmdHeader header;
85 	SVGA3dCmdUpdateGBScreenTarget body;
86 };
87 
88 struct vmw_stdu_dma {
89 	SVGA3dCmdHeader     header;
90 	SVGA3dCmdSurfaceDMA body;
91 };
92 
93 struct vmw_stdu_surface_copy {
94 	SVGA3dCmdHeader      header;
95 	SVGA3dCmdSurfaceCopy body;
96 };
97 
98 struct vmw_stdu_update_gb_image {
99 	SVGA3dCmdHeader header;
100 	SVGA3dCmdUpdateGBImage body;
101 };
102 
103 /**
104  * struct vmw_screen_target_display_unit
105  *
106  * @base: VMW specific DU structure
107  * @display_srf: surface to be displayed.  The dimension of this will always
108  *               match the display mode.  If the display mode matches
109  *               content_vfbs dimensions, then this is a pointer into the
110  *               corresponding field in content_vfbs.  If not, then this
111  *               is a separate buffer to which content_vfbs will blit to.
112  * @content_fb_type: content_fb type
113  * @display_width:  display width
114  * @display_height: display height
115  * @defined:     true if the current display unit has been initialized
116  * @cpp:         Bytes per pixel
117  */
118 struct vmw_screen_target_display_unit {
119 	struct vmw_display_unit base;
120 	struct vmw_surface *display_srf;
121 	enum stdu_content_type content_fb_type;
122 	s32 display_width, display_height;
123 
124 	bool defined;
125 
126 	/* For CPU Blit */
127 	unsigned int cpp;
128 };
129 
130 
131 
132 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
133 
134 
135 
136 /******************************************************************************
137  * Screen Target Display Unit CRTC Functions
138  *****************************************************************************/
139 
vmw_stdu_use_cpu_blit(const struct vmw_private * vmw)140 static bool vmw_stdu_use_cpu_blit(const struct vmw_private *vmw)
141 {
142 	return !(vmw->capabilities & SVGA_CAP_3D) || vmw->vram_size < (32 * 1024 * 1024);
143 }
144 
145 
146 /**
147  * vmw_stdu_crtc_destroy - cleans up the STDU
148  *
149  * @crtc: used to get a reference to the containing STDU
150  */
vmw_stdu_crtc_destroy(struct drm_crtc * crtc)151 static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
152 {
153 	vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
154 }
155 
156 /**
157  * vmw_stdu_define_st - Defines a Screen Target
158  *
159  * @dev_priv:  VMW DRM device
160  * @stdu: display unit to create a Screen Target for
161  * @mode: The mode to set.
162  * @crtc_x: X coordinate of screen target relative to framebuffer origin.
163  * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
164  *
165  * Creates a STDU that we can used later.  This function is called whenever the
166  * framebuffer size changes.
167  *
168  * RETURNs:
169  * 0 on success, error code on failure
170  */
vmw_stdu_define_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu,struct drm_display_mode * mode,int crtc_x,int crtc_y)171 static int vmw_stdu_define_st(struct vmw_private *dev_priv,
172 			      struct vmw_screen_target_display_unit *stdu,
173 			      struct drm_display_mode *mode,
174 			      int crtc_x, int crtc_y)
175 {
176 	struct {
177 		SVGA3dCmdHeader header;
178 		SVGA3dCmdDefineGBScreenTarget body;
179 	} *cmd;
180 
181 	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
182 	if (unlikely(cmd == NULL))
183 		return -ENOMEM;
184 
185 	cmd->header.id   = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
186 	cmd->header.size = sizeof(cmd->body);
187 
188 	cmd->body.stid   = stdu->base.unit;
189 	cmd->body.width  = mode->hdisplay;
190 	cmd->body.height = mode->vdisplay;
191 	cmd->body.flags  = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
192 	cmd->body.dpi    = 0;
193 	cmd->body.xRoot  = crtc_x;
194 	cmd->body.yRoot  = crtc_y;
195 
196 	stdu->base.set_gui_x = cmd->body.xRoot;
197 	stdu->base.set_gui_y = cmd->body.yRoot;
198 
199 	vmw_cmd_commit(dev_priv, sizeof(*cmd));
200 
201 	stdu->defined = true;
202 	stdu->display_width  = mode->hdisplay;
203 	stdu->display_height = mode->vdisplay;
204 
205 	return 0;
206 }
207 
208 
209 
210 /**
211  * vmw_stdu_bind_st - Binds a surface to a Screen Target
212  *
213  * @dev_priv: VMW DRM device
214  * @stdu: display unit affected
215  * @res: Buffer to bind to the screen target.  Set to NULL to blank screen.
216  *
217  * Binding a surface to a Screen Target the same as flipping
218  */
vmw_stdu_bind_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu,const struct vmw_resource * res)219 static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
220 			    struct vmw_screen_target_display_unit *stdu,
221 			    const struct vmw_resource *res)
222 {
223 	SVGA3dSurfaceImageId image;
224 
225 	struct {
226 		SVGA3dCmdHeader header;
227 		SVGA3dCmdBindGBScreenTarget body;
228 	} *cmd;
229 
230 
231 	if (!stdu->defined) {
232 		DRM_ERROR("No screen target defined\n");
233 		return -EINVAL;
234 	}
235 
236 	/* Set up image using information in vfb */
237 	memset(&image, 0, sizeof(image));
238 	image.sid = res ? res->id : SVGA3D_INVALID_ID;
239 
240 	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
241 	if (unlikely(cmd == NULL))
242 		return -ENOMEM;
243 
244 	cmd->header.id   = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
245 	cmd->header.size = sizeof(cmd->body);
246 
247 	cmd->body.stid   = stdu->base.unit;
248 	cmd->body.image  = image;
249 
250 	vmw_cmd_commit(dev_priv, sizeof(*cmd));
251 
252 	return 0;
253 }
254 
255 /**
256  * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
257  * bounding box.
258  *
259  * @cmd: Pointer to command stream.
260  * @unit: Screen target unit.
261  * @left: Left side of bounding box.
262  * @right: Right side of bounding box.
263  * @top: Top side of bounding box.
264  * @bottom: Bottom side of bounding box.
265  */
vmw_stdu_populate_update(void * cmd,int unit,s32 left,s32 right,s32 top,s32 bottom)266 static void vmw_stdu_populate_update(void *cmd, int unit,
267 				     s32 left, s32 right, s32 top, s32 bottom)
268 {
269 	struct vmw_stdu_update *update = cmd;
270 
271 	update->header.id   = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
272 	update->header.size = sizeof(update->body);
273 
274 	update->body.stid   = unit;
275 	update->body.rect.x = left;
276 	update->body.rect.y = top;
277 	update->body.rect.w = right - left;
278 	update->body.rect.h = bottom - top;
279 }
280 
281 /**
282  * vmw_stdu_update_st - Full update of a Screen Target
283  *
284  * @dev_priv: VMW DRM device
285  * @stdu: display unit affected
286  *
287  * This function needs to be called whenever the content of a screen
288  * target has changed completely. Typically as a result of a backing
289  * surface change.
290  *
291  * RETURNS:
292  * 0 on success, error code on failure
293  */
vmw_stdu_update_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu)294 static int vmw_stdu_update_st(struct vmw_private *dev_priv,
295 			      struct vmw_screen_target_display_unit *stdu)
296 {
297 	struct vmw_stdu_update *cmd;
298 
299 	if (!stdu->defined) {
300 		DRM_ERROR("No screen target defined");
301 		return -EINVAL;
302 	}
303 
304 	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
305 	if (unlikely(cmd == NULL))
306 		return -ENOMEM;
307 
308 	vmw_stdu_populate_update(cmd, stdu->base.unit,
309 				 0, stdu->display_width,
310 				 0, stdu->display_height);
311 
312 	vmw_cmd_commit(dev_priv, sizeof(*cmd));
313 
314 	return 0;
315 }
316 
317 
318 
319 /**
320  * vmw_stdu_destroy_st - Destroy a Screen Target
321  *
322  * @dev_priv:  VMW DRM device
323  * @stdu: display unit to destroy
324  */
vmw_stdu_destroy_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu)325 static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
326 			       struct vmw_screen_target_display_unit *stdu)
327 {
328 	int    ret;
329 
330 	struct {
331 		SVGA3dCmdHeader header;
332 		SVGA3dCmdDestroyGBScreenTarget body;
333 	} *cmd;
334 
335 
336 	/* Nothing to do if not successfully defined */
337 	if (unlikely(!stdu->defined))
338 		return 0;
339 
340 	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
341 	if (unlikely(cmd == NULL))
342 		return -ENOMEM;
343 
344 	cmd->header.id   = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
345 	cmd->header.size = sizeof(cmd->body);
346 
347 	cmd->body.stid   = stdu->base.unit;
348 
349 	vmw_cmd_commit(dev_priv, sizeof(*cmd));
350 
351 	/* Force sync */
352 	ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
353 	if (unlikely(ret != 0))
354 		DRM_ERROR("Failed to sync with HW");
355 
356 	stdu->defined = false;
357 	stdu->display_width  = 0;
358 	stdu->display_height = 0;
359 
360 	return ret;
361 }
362 
363 
364 /**
365  * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
366  *
367  * @crtc: CRTC associated with the screen target
368  *
369  * This function defines/destroys a screen target
370  *
371  */
vmw_stdu_crtc_mode_set_nofb(struct drm_crtc * crtc)372 static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
373 {
374 	struct vmw_private *dev_priv;
375 	struct vmw_screen_target_display_unit *stdu;
376 	struct drm_connector_state *conn_state;
377 	struct vmw_connector_state *vmw_conn_state;
378 	int x, y, ret;
379 
380 	stdu = vmw_crtc_to_stdu(crtc);
381 	dev_priv = vmw_priv(crtc->dev);
382 	conn_state = stdu->base.connector.state;
383 	vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
384 
385 	if (stdu->defined) {
386 		ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
387 		if (ret)
388 			DRM_ERROR("Failed to blank CRTC\n");
389 
390 		(void) vmw_stdu_update_st(dev_priv, stdu);
391 
392 		ret = vmw_stdu_destroy_st(dev_priv, stdu);
393 		if (ret)
394 			DRM_ERROR("Failed to destroy Screen Target\n");
395 
396 		stdu->content_fb_type = SAME_AS_DISPLAY;
397 	}
398 
399 	if (!crtc->state->enable)
400 		return;
401 
402 	x = vmw_conn_state->gui_x;
403 	y = vmw_conn_state->gui_y;
404 
405 	vmw_svga_enable(dev_priv);
406 	ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y);
407 
408 	if (ret)
409 		DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
410 			  crtc->x, crtc->y);
411 }
412 
413 
vmw_stdu_crtc_helper_prepare(struct drm_crtc * crtc)414 static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
415 {
416 }
417 
vmw_stdu_crtc_atomic_enable(struct drm_crtc * crtc,struct drm_atomic_state * state)418 static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
419 					struct drm_atomic_state *state)
420 {
421 }
422 
vmw_stdu_crtc_atomic_disable(struct drm_crtc * crtc,struct drm_atomic_state * state)423 static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,
424 					 struct drm_atomic_state *state)
425 {
426 	struct vmw_private *dev_priv;
427 	struct vmw_screen_target_display_unit *stdu;
428 	int ret;
429 
430 
431 	if (!crtc) {
432 		DRM_ERROR("CRTC is NULL\n");
433 		return;
434 	}
435 
436 	stdu     = vmw_crtc_to_stdu(crtc);
437 	dev_priv = vmw_priv(crtc->dev);
438 
439 	if (stdu->defined) {
440 		ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
441 		if (ret)
442 			DRM_ERROR("Failed to blank CRTC\n");
443 
444 		(void) vmw_stdu_update_st(dev_priv, stdu);
445 
446 		ret = vmw_stdu_destroy_st(dev_priv, stdu);
447 		if (ret)
448 			DRM_ERROR("Failed to destroy Screen Target\n");
449 
450 		stdu->content_fb_type = SAME_AS_DISPLAY;
451 	}
452 }
453 
454 /**
455  * vmw_stdu_bo_clip - Callback to encode a suface DMA command cliprect
456  *
457  * @dirty: The closure structure.
458  *
459  * Encodes a surface DMA command cliprect and updates the bounding box
460  * for the DMA.
461  */
vmw_stdu_bo_clip(struct vmw_kms_dirty * dirty)462 static void vmw_stdu_bo_clip(struct vmw_kms_dirty *dirty)
463 {
464 	struct vmw_stdu_dirty *ddirty =
465 		container_of(dirty, struct vmw_stdu_dirty, base);
466 	struct vmw_stdu_dma *cmd = dirty->cmd;
467 	struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
468 
469 	blit += dirty->num_hits;
470 	blit->srcx = dirty->fb_x;
471 	blit->srcy = dirty->fb_y;
472 	blit->x = dirty->unit_x1;
473 	blit->y = dirty->unit_y1;
474 	blit->d = 1;
475 	blit->w = dirty->unit_x2 - dirty->unit_x1;
476 	blit->h = dirty->unit_y2 - dirty->unit_y1;
477 	dirty->num_hits++;
478 
479 	if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
480 		return;
481 
482 	/* Destination bounding box */
483 	ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
484 	ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
485 	ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
486 	ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
487 }
488 
489 /**
490  * vmw_stdu_bo_fifo_commit - Callback to fill in and submit a DMA command.
491  *
492  * @dirty: The closure structure.
493  *
494  * Fills in the missing fields in a DMA command, and optionally encodes
495  * a screen target update command, depending on transfer direction.
496  */
vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty * dirty)497 static void vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty *dirty)
498 {
499 	struct vmw_stdu_dirty *ddirty =
500 		container_of(dirty, struct vmw_stdu_dirty, base);
501 	struct vmw_screen_target_display_unit *stdu =
502 		container_of(dirty->unit, typeof(*stdu), base);
503 	struct vmw_stdu_dma *cmd = dirty->cmd;
504 	struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
505 	SVGA3dCmdSurfaceDMASuffix *suffix =
506 		(SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
507 	size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
508 
509 	if (!dirty->num_hits) {
510 		vmw_cmd_commit(dirty->dev_priv, 0);
511 		return;
512 	}
513 
514 	cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
515 	cmd->header.size = sizeof(cmd->body) + blit_size;
516 	vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
517 	cmd->body.guest.pitch = ddirty->pitch;
518 	cmd->body.host.sid = stdu->display_srf->res.id;
519 	cmd->body.host.face = 0;
520 	cmd->body.host.mipmap = 0;
521 	cmd->body.transfer = ddirty->transfer;
522 	suffix->suffixSize = sizeof(*suffix);
523 	suffix->maximumOffset = ddirty->buf->base.base.size;
524 
525 	if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
526 		blit_size += sizeof(struct vmw_stdu_update);
527 
528 		vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
529 					 ddirty->left, ddirty->right,
530 					 ddirty->top, ddirty->bottom);
531 	}
532 
533 	vmw_cmd_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
534 
535 	stdu->display_srf->res.res_dirty = true;
536 	ddirty->left = ddirty->top = S32_MAX;
537 	ddirty->right = ddirty->bottom = S32_MIN;
538 }
539 
540 
541 /**
542  * vmw_stdu_bo_cpu_clip - Callback to encode a CPU blit
543  *
544  * @dirty: The closure structure.
545  *
546  * This function calculates the bounding box for all the incoming clips.
547  */
vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty * dirty)548 static void vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty *dirty)
549 {
550 	struct vmw_stdu_dirty *ddirty =
551 		container_of(dirty, struct vmw_stdu_dirty, base);
552 
553 	dirty->num_hits = 1;
554 
555 	/* Calculate destination bounding box */
556 	ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
557 	ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
558 	ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
559 	ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
560 
561 	/*
562 	 * Calculate content bounding box.  We only need the top-left
563 	 * coordinate because width and height will be the same as the
564 	 * destination bounding box above
565 	 */
566 	ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
567 	ddirty->fb_top  = min_t(s32, ddirty->fb_top, dirty->fb_y);
568 }
569 
570 
571 /**
572  * vmw_stdu_bo_cpu_commit - Callback to do a CPU blit from buffer object
573  *
574  * @dirty: The closure structure.
575  *
576  * For the special case when we cannot create a proxy surface in a
577  * 2D VM, we have to do a CPU blit ourselves.
578  */
vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty * dirty)579 static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty)
580 {
581 	struct vmw_stdu_dirty *ddirty =
582 		container_of(dirty, struct vmw_stdu_dirty, base);
583 	struct vmw_screen_target_display_unit *stdu =
584 		container_of(dirty->unit, typeof(*stdu), base);
585 	s32 width, height;
586 	s32 src_pitch, dst_pitch;
587 	struct ttm_buffer_object *src_bo, *dst_bo;
588 	u32 src_offset, dst_offset;
589 	struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp);
590 
591 	if (!dirty->num_hits)
592 		return;
593 
594 	width = ddirty->right - ddirty->left;
595 	height = ddirty->bottom - ddirty->top;
596 
597 	if (width == 0 || height == 0)
598 		return;
599 
600 	/* Assume we are blitting from Guest (bo) to Host (display_srf) */
601 	dst_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp;
602 	dst_bo = &stdu->display_srf->res.backup->base;
603 	dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp;
604 
605 	src_pitch = ddirty->pitch;
606 	src_bo = &ddirty->buf->base;
607 	src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
608 
609 	/* Swap src and dst if the assumption was wrong. */
610 	if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) {
611 		swap(dst_pitch, src_pitch);
612 		swap(dst_bo, src_bo);
613 		swap(src_offset, dst_offset);
614 	}
615 
616 	(void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch,
617 			       src_bo, src_offset, src_pitch,
618 			       width * stdu->cpp, height, &diff);
619 
620 	if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM &&
621 	    drm_rect_visible(&diff.rect)) {
622 		struct vmw_private *dev_priv;
623 		struct vmw_stdu_update *cmd;
624 		struct drm_clip_rect region;
625 		int ret;
626 
627 		/* We are updating the actual surface, not a proxy */
628 		region.x1 = diff.rect.x1;
629 		region.x2 = diff.rect.x2;
630 		region.y1 = diff.rect.y1;
631 		region.y2 = diff.rect.y2;
632 		ret = vmw_kms_update_proxy(&stdu->display_srf->res, &region,
633 					   1, 1);
634 		if (ret)
635 			goto out_cleanup;
636 
637 
638 		dev_priv = vmw_priv(stdu->base.crtc.dev);
639 		cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
640 		if (!cmd)
641 			goto out_cleanup;
642 
643 		vmw_stdu_populate_update(cmd, stdu->base.unit,
644 					 region.x1, region.x2,
645 					 region.y1, region.y2);
646 
647 		vmw_cmd_commit(dev_priv, sizeof(*cmd));
648 	}
649 
650 out_cleanup:
651 	ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
652 	ddirty->right = ddirty->bottom = S32_MIN;
653 }
654 
655 /**
656  * vmw_kms_stdu_dma - Perform a DMA transfer between a buffer-object backed
657  * framebuffer and the screen target system.
658  *
659  * @dev_priv: Pointer to the device private structure.
660  * @file_priv: Pointer to a struct drm-file identifying the caller. May be
661  * set to NULL, but then @user_fence_rep must also be set to NULL.
662  * @vfb: Pointer to the buffer-object backed framebuffer.
663  * @user_fence_rep: User-space provided structure for fence information.
664  * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
665  * @vclips: Alternate array of clip rects. Either @clips or @vclips must
666  * be NULL.
667  * @num_clips: Number of clip rects in @clips or @vclips.
668  * @increment: Increment to use when looping over @clips or @vclips.
669  * @to_surface: Whether to DMA to the screen target system as opposed to
670  * from the screen target system.
671  * @interruptible: Whether to perform waits interruptible if possible.
672  * @crtc: If crtc is passed, perform stdu dma on that crtc only.
673  *
674  * If DMA-ing till the screen target system, the function will also notify
675  * the screen target system that a bounding box of the cliprects has been
676  * updated.
677  * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
678  * interrupted.
679  */
vmw_kms_stdu_dma(struct vmw_private * dev_priv,struct drm_file * file_priv,struct vmw_framebuffer * vfb,struct drm_vmw_fence_rep __user * user_fence_rep,struct drm_clip_rect * clips,struct drm_vmw_rect * vclips,uint32_t num_clips,int increment,bool to_surface,bool interruptible,struct drm_crtc * crtc)680 int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
681 		     struct drm_file *file_priv,
682 		     struct vmw_framebuffer *vfb,
683 		     struct drm_vmw_fence_rep __user *user_fence_rep,
684 		     struct drm_clip_rect *clips,
685 		     struct drm_vmw_rect *vclips,
686 		     uint32_t num_clips,
687 		     int increment,
688 		     bool to_surface,
689 		     bool interruptible,
690 		     struct drm_crtc *crtc)
691 {
692 	struct vmw_buffer_object *buf =
693 		container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
694 	struct vmw_stdu_dirty ddirty;
695 	int ret;
696 	bool cpu_blit = vmw_stdu_use_cpu_blit(dev_priv);
697 	DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
698 
699 	/*
700 	 * VMs without 3D support don't have the surface DMA command and
701 	 * we'll be using a CPU blit, and the framebuffer should be moved out
702 	 * of VRAM.
703 	 */
704 	ret = vmw_validation_add_bo(&val_ctx, buf, false, cpu_blit);
705 	if (ret)
706 		return ret;
707 
708 	ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
709 	if (ret)
710 		goto out_unref;
711 
712 	ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
713 		SVGA3D_READ_HOST_VRAM;
714 	ddirty.left = ddirty.top = S32_MAX;
715 	ddirty.right = ddirty.bottom = S32_MIN;
716 	ddirty.fb_left = ddirty.fb_top = S32_MAX;
717 	ddirty.pitch = vfb->base.pitches[0];
718 	ddirty.buf = buf;
719 	ddirty.base.fifo_commit = vmw_stdu_bo_fifo_commit;
720 	ddirty.base.clip = vmw_stdu_bo_clip;
721 	ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
722 		num_clips * sizeof(SVGA3dCopyBox) +
723 		sizeof(SVGA3dCmdSurfaceDMASuffix);
724 	if (to_surface)
725 		ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
726 
727 
728 	if (cpu_blit) {
729 		ddirty.base.fifo_commit = vmw_stdu_bo_cpu_commit;
730 		ddirty.base.clip = vmw_stdu_bo_cpu_clip;
731 		ddirty.base.fifo_reserve_size = 0;
732 	}
733 
734 	ddirty.base.crtc = crtc;
735 
736 	ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
737 				   0, 0, num_clips, increment, &ddirty.base);
738 
739 	vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
740 					 user_fence_rep);
741 	return ret;
742 
743 out_unref:
744 	vmw_validation_unref_lists(&val_ctx);
745 	return ret;
746 }
747 
748 /**
749  * vmw_kms_stdu_surface_clip - Callback to encode a surface copy command cliprect
750  *
751  * @dirty: The closure structure.
752  *
753  * Encodes a surface copy command cliprect and updates the bounding box
754  * for the copy.
755  */
vmw_kms_stdu_surface_clip(struct vmw_kms_dirty * dirty)756 static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
757 {
758 	struct vmw_stdu_dirty *sdirty =
759 		container_of(dirty, struct vmw_stdu_dirty, base);
760 	struct vmw_stdu_surface_copy *cmd = dirty->cmd;
761 	struct vmw_screen_target_display_unit *stdu =
762 		container_of(dirty->unit, typeof(*stdu), base);
763 
764 	if (sdirty->sid != stdu->display_srf->res.id) {
765 		struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
766 
767 		blit += dirty->num_hits;
768 		blit->srcx = dirty->fb_x;
769 		blit->srcy = dirty->fb_y;
770 		blit->x = dirty->unit_x1;
771 		blit->y = dirty->unit_y1;
772 		blit->d = 1;
773 		blit->w = dirty->unit_x2 - dirty->unit_x1;
774 		blit->h = dirty->unit_y2 - dirty->unit_y1;
775 	}
776 
777 	dirty->num_hits++;
778 
779 	/* Destination bounding box */
780 	sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
781 	sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
782 	sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
783 	sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
784 }
785 
786 /**
787  * vmw_kms_stdu_surface_fifo_commit - Callback to fill in and submit a surface
788  * copy command.
789  *
790  * @dirty: The closure structure.
791  *
792  * Fills in the missing fields in a surface copy command, and encodes a screen
793  * target update command.
794  */
vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty * dirty)795 static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
796 {
797 	struct vmw_stdu_dirty *sdirty =
798 		container_of(dirty, struct vmw_stdu_dirty, base);
799 	struct vmw_screen_target_display_unit *stdu =
800 		container_of(dirty->unit, typeof(*stdu), base);
801 	struct vmw_stdu_surface_copy *cmd = dirty->cmd;
802 	struct vmw_stdu_update *update;
803 	size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
804 	size_t commit_size;
805 
806 	if (!dirty->num_hits) {
807 		vmw_cmd_commit(dirty->dev_priv, 0);
808 		return;
809 	}
810 
811 	if (sdirty->sid != stdu->display_srf->res.id) {
812 		struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
813 
814 		cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
815 		cmd->header.size = sizeof(cmd->body) + blit_size;
816 		cmd->body.src.sid = sdirty->sid;
817 		cmd->body.dest.sid = stdu->display_srf->res.id;
818 		update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
819 		commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
820 		stdu->display_srf->res.res_dirty = true;
821 	} else {
822 		update = dirty->cmd;
823 		commit_size = sizeof(*update);
824 	}
825 
826 	vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
827 				 sdirty->right, sdirty->top, sdirty->bottom);
828 
829 	vmw_cmd_commit(dirty->dev_priv, commit_size);
830 
831 	sdirty->left = sdirty->top = S32_MAX;
832 	sdirty->right = sdirty->bottom = S32_MIN;
833 }
834 
835 /**
836  * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
837  *
838  * @dev_priv: Pointer to the device private structure.
839  * @framebuffer: Pointer to the surface-buffer backed framebuffer.
840  * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
841  * @vclips: Alternate array of clip rects. Either @clips or @vclips must
842  * be NULL.
843  * @srf: Pointer to surface to blit from. If NULL, the surface attached
844  * to @framebuffer will be used.
845  * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
846  * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
847  * @num_clips: Number of clip rects in @clips.
848  * @inc: Increment to use when looping over @clips.
849  * @out_fence: If non-NULL, will return a ref-counted pointer to a
850  * struct vmw_fence_obj. The returned fence pointer may be NULL in which
851  * case the device has already synchronized.
852  * @crtc: If crtc is passed, perform surface dirty on that crtc only.
853  *
854  * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
855  * interrupted.
856  */
vmw_kms_stdu_surface_dirty(struct vmw_private * dev_priv,struct vmw_framebuffer * framebuffer,struct drm_clip_rect * clips,struct drm_vmw_rect * vclips,struct vmw_resource * srf,s32 dest_x,s32 dest_y,unsigned num_clips,int inc,struct vmw_fence_obj ** out_fence,struct drm_crtc * crtc)857 int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
858 			       struct vmw_framebuffer *framebuffer,
859 			       struct drm_clip_rect *clips,
860 			       struct drm_vmw_rect *vclips,
861 			       struct vmw_resource *srf,
862 			       s32 dest_x,
863 			       s32 dest_y,
864 			       unsigned num_clips, int inc,
865 			       struct vmw_fence_obj **out_fence,
866 			       struct drm_crtc *crtc)
867 {
868 	struct vmw_framebuffer_surface *vfbs =
869 		container_of(framebuffer, typeof(*vfbs), base);
870 	struct vmw_stdu_dirty sdirty;
871 	DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
872 	int ret;
873 
874 	if (!srf)
875 		srf = &vfbs->surface->res;
876 
877 	ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
878 					  NULL, NULL);
879 	if (ret)
880 		return ret;
881 
882 	ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
883 	if (ret)
884 		goto out_unref;
885 
886 	if (vfbs->is_bo_proxy) {
887 		ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
888 		if (ret)
889 			goto out_finish;
890 	}
891 
892 	sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
893 	sdirty.base.clip = vmw_kms_stdu_surface_clip;
894 	sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
895 		sizeof(SVGA3dCopyBox) * num_clips +
896 		sizeof(struct vmw_stdu_update);
897 	sdirty.base.crtc = crtc;
898 	sdirty.sid = srf->id;
899 	sdirty.left = sdirty.top = S32_MAX;
900 	sdirty.right = sdirty.bottom = S32_MIN;
901 
902 	ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
903 				   dest_x, dest_y, num_clips, inc,
904 				   &sdirty.base);
905 out_finish:
906 	vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
907 					 NULL);
908 
909 	return ret;
910 
911 out_unref:
912 	vmw_validation_unref_lists(&val_ctx);
913 	return ret;
914 }
915 
916 
917 /*
918  *  Screen Target CRTC dispatch table
919  */
920 static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
921 	.gamma_set = vmw_du_crtc_gamma_set,
922 	.destroy = vmw_stdu_crtc_destroy,
923 	.reset = vmw_du_crtc_reset,
924 	.atomic_duplicate_state = vmw_du_crtc_duplicate_state,
925 	.atomic_destroy_state = vmw_du_crtc_destroy_state,
926 	.set_config = drm_atomic_helper_set_config,
927 	.page_flip = drm_atomic_helper_page_flip,
928 	.get_vblank_counter = vmw_get_vblank_counter,
929 	.enable_vblank = vmw_enable_vblank,
930 	.disable_vblank = vmw_disable_vblank,
931 };
932 
933 
934 
935 /******************************************************************************
936  * Screen Target Display Unit Encoder Functions
937  *****************************************************************************/
938 
939 /**
940  * vmw_stdu_encoder_destroy - cleans up the STDU
941  *
942  * @encoder: used the get the containing STDU
943  *
944  * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
945  * this can be a no-op.  Nevertheless, it doesn't hurt of have this in case
946  * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
947  * get called.
948  */
vmw_stdu_encoder_destroy(struct drm_encoder * encoder)949 static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
950 {
951 	vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
952 }
953 
954 static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
955 	.destroy = vmw_stdu_encoder_destroy,
956 };
957 
958 
959 
960 /******************************************************************************
961  * Screen Target Display Unit Connector Functions
962  *****************************************************************************/
963 
964 /**
965  * vmw_stdu_connector_destroy - cleans up the STDU
966  *
967  * @connector: used to get the containing STDU
968  *
969  * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
970  * this can be a no-op.  Nevertheless, it doesn't hurt of have this in case
971  * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
972  * get called.
973  */
vmw_stdu_connector_destroy(struct drm_connector * connector)974 static void vmw_stdu_connector_destroy(struct drm_connector *connector)
975 {
976 	vmw_stdu_destroy(vmw_connector_to_stdu(connector));
977 }
978 
979 
980 
981 static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
982 	.dpms = vmw_du_connector_dpms,
983 	.detect = vmw_du_connector_detect,
984 	.fill_modes = vmw_du_connector_fill_modes,
985 	.destroy = vmw_stdu_connector_destroy,
986 	.reset = vmw_du_connector_reset,
987 	.atomic_duplicate_state = vmw_du_connector_duplicate_state,
988 	.atomic_destroy_state = vmw_du_connector_destroy_state,
989 };
990 
991 
992 static const struct
993 drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
994 };
995 
996 
997 
998 /******************************************************************************
999  * Screen Target Display Plane Functions
1000  *****************************************************************************/
1001 
1002 
1003 
1004 /**
1005  * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
1006  *
1007  * @plane:  display plane
1008  * @old_state: Contains the FB to clean up
1009  *
1010  * Unpins the display surface
1011  *
1012  * Returns 0 on success
1013  */
1014 static void
vmw_stdu_primary_plane_cleanup_fb(struct drm_plane * plane,struct drm_plane_state * old_state)1015 vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1016 				  struct drm_plane_state *old_state)
1017 {
1018 	struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1019 
1020 	if (vps->surf)
1021 		WARN_ON(!vps->pinned);
1022 
1023 	vmw_du_plane_cleanup_fb(plane, old_state);
1024 
1025 	vps->content_fb_type = SAME_AS_DISPLAY;
1026 	vps->cpp = 0;
1027 }
1028 
1029 
1030 
1031 /**
1032  * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1033  *
1034  * @plane:  display plane
1035  * @new_state: info on the new plane state, including the FB
1036  *
1037  * This function allocates a new display surface if the content is
1038  * backed by a buffer object.  The display surface is pinned here, and it'll
1039  * be unpinned in .cleanup_fb()
1040  *
1041  * Returns 0 on success
1042  */
1043 static int
vmw_stdu_primary_plane_prepare_fb(struct drm_plane * plane,struct drm_plane_state * new_state)1044 vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1045 				  struct drm_plane_state *new_state)
1046 {
1047 	struct vmw_private *dev_priv = vmw_priv(plane->dev);
1048 	struct drm_framebuffer *new_fb = new_state->fb;
1049 	struct vmw_framebuffer *vfb;
1050 	struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1051 	enum stdu_content_type new_content_type;
1052 	struct vmw_framebuffer_surface *new_vfbs;
1053 	uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1054 	int ret;
1055 
1056 	/* No FB to prepare */
1057 	if (!new_fb) {
1058 		if (vps->surf) {
1059 			WARN_ON(vps->pinned != 0);
1060 			vmw_surface_unreference(&vps->surf);
1061 		}
1062 
1063 		return 0;
1064 	}
1065 
1066 	vfb = vmw_framebuffer_to_vfb(new_fb);
1067 	new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1068 
1069 	if (new_vfbs &&
1070 	    new_vfbs->surface->metadata.base_size.width == hdisplay &&
1071 	    new_vfbs->surface->metadata.base_size.height == vdisplay)
1072 		new_content_type = SAME_AS_DISPLAY;
1073 	else if (vfb->bo)
1074 		new_content_type = SEPARATE_BO;
1075 	else
1076 		new_content_type = SEPARATE_SURFACE;
1077 
1078 	if (new_content_type != SAME_AS_DISPLAY) {
1079 		struct vmw_surface_metadata metadata = {0};
1080 
1081 		/*
1082 		 * If content buffer is a buffer object, then we have to
1083 		 * construct surface info
1084 		 */
1085 		if (new_content_type == SEPARATE_BO) {
1086 
1087 			switch (new_fb->format->cpp[0]*8) {
1088 			case 32:
1089 				metadata.format = SVGA3D_X8R8G8B8;
1090 				break;
1091 
1092 			case 16:
1093 				metadata.format = SVGA3D_R5G6B5;
1094 				break;
1095 
1096 			case 8:
1097 				metadata.format = SVGA3D_P8;
1098 				break;
1099 
1100 			default:
1101 				DRM_ERROR("Invalid format\n");
1102 				return -EINVAL;
1103 			}
1104 
1105 			metadata.mip_levels[0] = 1;
1106 			metadata.num_sizes = 1;
1107 			metadata.scanout = true;
1108 		} else {
1109 			metadata = new_vfbs->surface->metadata;
1110 		}
1111 
1112 		metadata.base_size.width = hdisplay;
1113 		metadata.base_size.height = vdisplay;
1114 		metadata.base_size.depth = 1;
1115 
1116 		if (vps->surf) {
1117 			struct drm_vmw_size cur_base_size =
1118 				vps->surf->metadata.base_size;
1119 
1120 			if (cur_base_size.width != metadata.base_size.width ||
1121 			    cur_base_size.height != metadata.base_size.height ||
1122 			    vps->surf->metadata.format != metadata.format) {
1123 				WARN_ON(vps->pinned != 0);
1124 				vmw_surface_unreference(&vps->surf);
1125 			}
1126 
1127 		}
1128 
1129 		if (!vps->surf) {
1130 			ret = vmw_gb_surface_define(dev_priv, &metadata,
1131 						    &vps->surf);
1132 			if (ret != 0) {
1133 				DRM_ERROR("Couldn't allocate STDU surface.\n");
1134 				return ret;
1135 			}
1136 		}
1137 	} else {
1138 		/*
1139 		 * prepare_fb and clean_fb should only take care of pinning
1140 		 * and unpinning.  References are tracked by state objects.
1141 		 * The only time we add a reference in prepare_fb is if the
1142 		 * state object doesn't have a reference to begin with
1143 		 */
1144 		if (vps->surf) {
1145 			WARN_ON(vps->pinned != 0);
1146 			vmw_surface_unreference(&vps->surf);
1147 		}
1148 
1149 		vps->surf = vmw_surface_reference(new_vfbs->surface);
1150 	}
1151 
1152 	if (vps->surf) {
1153 
1154 		/* Pin new surface before flipping */
1155 		ret = vmw_resource_pin(&vps->surf->res, false);
1156 		if (ret)
1157 			goto out_srf_unref;
1158 
1159 		vps->pinned++;
1160 	}
1161 
1162 	vps->content_fb_type = new_content_type;
1163 
1164 	/*
1165 	 * This should only happen if the buffer object is too large to create a
1166 	 * proxy surface for.
1167 	 * If we are a 2D VM with a buffer object then we have to use CPU blit
1168 	 * so cache these mappings
1169 	 */
1170 	if (vps->content_fb_type == SEPARATE_BO &&
1171 	    vmw_stdu_use_cpu_blit(dev_priv))
1172 		vps->cpp = new_fb->pitches[0] / new_fb->width;
1173 
1174 	return 0;
1175 
1176 out_srf_unref:
1177 	vmw_surface_unreference(&vps->surf);
1178 	return ret;
1179 }
1180 
vmw_stdu_bo_fifo_size(struct vmw_du_update_plane * update,uint32_t num_hits)1181 static uint32_t vmw_stdu_bo_fifo_size(struct vmw_du_update_plane *update,
1182 				      uint32_t num_hits)
1183 {
1184 	return sizeof(struct vmw_stdu_dma) + sizeof(SVGA3dCopyBox) * num_hits +
1185 		sizeof(SVGA3dCmdSurfaceDMASuffix) +
1186 		sizeof(struct vmw_stdu_update);
1187 }
1188 
vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane * update,uint32_t num_hits)1189 static uint32_t vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane *update,
1190 					  uint32_t num_hits)
1191 {
1192 	return sizeof(struct vmw_stdu_update_gb_image) +
1193 		sizeof(struct vmw_stdu_update);
1194 }
1195 
vmw_stdu_bo_populate_dma(struct vmw_du_update_plane * update,void * cmd,uint32_t num_hits)1196 static uint32_t vmw_stdu_bo_populate_dma(struct vmw_du_update_plane  *update,
1197 					 void *cmd, uint32_t num_hits)
1198 {
1199 	struct vmw_screen_target_display_unit *stdu;
1200 	struct vmw_framebuffer_bo *vfbbo;
1201 	struct vmw_stdu_dma *cmd_dma = cmd;
1202 
1203 	stdu = container_of(update->du, typeof(*stdu), base);
1204 	vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1205 
1206 	cmd_dma->header.id = SVGA_3D_CMD_SURFACE_DMA;
1207 	cmd_dma->header.size = sizeof(cmd_dma->body) +
1208 		sizeof(struct SVGA3dCopyBox) * num_hits +
1209 		sizeof(SVGA3dCmdSurfaceDMASuffix);
1210 	vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &cmd_dma->body.guest.ptr);
1211 	cmd_dma->body.guest.pitch = update->vfb->base.pitches[0];
1212 	cmd_dma->body.host.sid = stdu->display_srf->res.id;
1213 	cmd_dma->body.host.face = 0;
1214 	cmd_dma->body.host.mipmap = 0;
1215 	cmd_dma->body.transfer = SVGA3D_WRITE_HOST_VRAM;
1216 
1217 	return sizeof(*cmd_dma);
1218 }
1219 
vmw_stdu_bo_populate_clip(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * clip,uint32_t fb_x,uint32_t fb_y)1220 static uint32_t vmw_stdu_bo_populate_clip(struct vmw_du_update_plane  *update,
1221 					  void *cmd, struct drm_rect *clip,
1222 					  uint32_t fb_x, uint32_t fb_y)
1223 {
1224 	struct SVGA3dCopyBox *box = cmd;
1225 
1226 	box->srcx = fb_x;
1227 	box->srcy = fb_y;
1228 	box->srcz = 0;
1229 	box->x = clip->x1;
1230 	box->y = clip->y1;
1231 	box->z = 0;
1232 	box->w = drm_rect_width(clip);
1233 	box->h = drm_rect_height(clip);
1234 	box->d = 1;
1235 
1236 	return sizeof(*box);
1237 }
1238 
vmw_stdu_bo_populate_update(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * bb)1239 static uint32_t vmw_stdu_bo_populate_update(struct vmw_du_update_plane  *update,
1240 					    void *cmd, struct drm_rect *bb)
1241 {
1242 	struct vmw_screen_target_display_unit *stdu;
1243 	struct vmw_framebuffer_bo *vfbbo;
1244 	SVGA3dCmdSurfaceDMASuffix *suffix = cmd;
1245 
1246 	stdu = container_of(update->du, typeof(*stdu), base);
1247 	vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1248 
1249 	suffix->suffixSize = sizeof(*suffix);
1250 	suffix->maximumOffset = vfbbo->buffer->base.base.size;
1251 
1252 	vmw_stdu_populate_update(&suffix[1], stdu->base.unit, bb->x1, bb->x2,
1253 				 bb->y1, bb->y2);
1254 
1255 	return sizeof(*suffix) + sizeof(struct vmw_stdu_update);
1256 }
1257 
vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane * update,void * cmd,uint32_t num_hits)1258 static uint32_t vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane  *update,
1259 					 void *cmd, uint32_t num_hits)
1260 {
1261 	struct vmw_du_update_plane_buffer *bo_update =
1262 		container_of(update, typeof(*bo_update), base);
1263 
1264 	bo_update->fb_left = INT_MAX;
1265 	bo_update->fb_top = INT_MAX;
1266 
1267 	return 0;
1268 }
1269 
vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * clip,uint32_t fb_x,uint32_t fb_y)1270 static uint32_t vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane  *update,
1271 				     void *cmd, struct drm_rect *clip,
1272 				     uint32_t fb_x, uint32_t fb_y)
1273 {
1274 	struct vmw_du_update_plane_buffer *bo_update =
1275 		container_of(update, typeof(*bo_update), base);
1276 
1277 	bo_update->fb_left = min_t(int, bo_update->fb_left, fb_x);
1278 	bo_update->fb_top = min_t(int, bo_update->fb_top, fb_y);
1279 
1280 	return 0;
1281 }
1282 
1283 static uint32_t
vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * bb)1284 vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane  *update, void *cmd,
1285 				struct drm_rect *bb)
1286 {
1287 	struct vmw_du_update_plane_buffer *bo_update;
1288 	struct vmw_screen_target_display_unit *stdu;
1289 	struct vmw_framebuffer_bo *vfbbo;
1290 	struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(0);
1291 	struct vmw_stdu_update_gb_image *cmd_img = cmd;
1292 	struct vmw_stdu_update *cmd_update;
1293 	struct ttm_buffer_object *src_bo, *dst_bo;
1294 	u32 src_offset, dst_offset;
1295 	s32 src_pitch, dst_pitch;
1296 	s32 width, height;
1297 
1298 	bo_update = container_of(update, typeof(*bo_update), base);
1299 	stdu = container_of(update->du, typeof(*stdu), base);
1300 	vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1301 
1302 	width = bb->x2 - bb->x1;
1303 	height = bb->y2 - bb->y1;
1304 
1305 	diff.cpp = stdu->cpp;
1306 
1307 	dst_bo = &stdu->display_srf->res.backup->base;
1308 	dst_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp;
1309 	dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp;
1310 
1311 	src_bo = &vfbbo->buffer->base;
1312 	src_pitch = update->vfb->base.pitches[0];
1313 	src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left *
1314 		stdu->cpp;
1315 
1316 	(void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, src_bo,
1317 			       src_offset, src_pitch, width * stdu->cpp, height,
1318 			       &diff);
1319 
1320 	if (drm_rect_visible(&diff.rect)) {
1321 		SVGA3dBox *box = &cmd_img->body.box;
1322 
1323 		cmd_img->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1324 		cmd_img->header.size = sizeof(cmd_img->body);
1325 		cmd_img->body.image.sid = stdu->display_srf->res.id;
1326 		cmd_img->body.image.face = 0;
1327 		cmd_img->body.image.mipmap = 0;
1328 
1329 		box->x = diff.rect.x1;
1330 		box->y = diff.rect.y1;
1331 		box->z = 0;
1332 		box->w = drm_rect_width(&diff.rect);
1333 		box->h = drm_rect_height(&diff.rect);
1334 		box->d = 1;
1335 
1336 		cmd_update = (struct vmw_stdu_update *)&cmd_img[1];
1337 		vmw_stdu_populate_update(cmd_update, stdu->base.unit,
1338 					 diff.rect.x1, diff.rect.x2,
1339 					 diff.rect.y1, diff.rect.y2);
1340 
1341 		return sizeof(*cmd_img) + sizeof(*cmd_update);
1342 	}
1343 
1344 	return 0;
1345 }
1346 
1347 /**
1348  * vmw_stdu_plane_update_bo - Update display unit for bo backed fb.
1349  * @dev_priv: device private.
1350  * @plane: plane state.
1351  * @old_state: old plane state.
1352  * @vfb: framebuffer which is blitted to display unit.
1353  * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1354  *             The returned fence pointer may be NULL in which case the device
1355  *             has already synchronized.
1356  *
1357  * Return: 0 on success or a negative error code on failure.
1358  */
vmw_stdu_plane_update_bo(struct vmw_private * dev_priv,struct drm_plane * plane,struct drm_plane_state * old_state,struct vmw_framebuffer * vfb,struct vmw_fence_obj ** out_fence)1359 static int vmw_stdu_plane_update_bo(struct vmw_private *dev_priv,
1360 				    struct drm_plane *plane,
1361 				    struct drm_plane_state *old_state,
1362 				    struct vmw_framebuffer *vfb,
1363 				    struct vmw_fence_obj **out_fence)
1364 {
1365 	struct vmw_du_update_plane_buffer bo_update;
1366 
1367 	memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer));
1368 	bo_update.base.plane = plane;
1369 	bo_update.base.old_state = old_state;
1370 	bo_update.base.dev_priv = dev_priv;
1371 	bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
1372 	bo_update.base.vfb = vfb;
1373 	bo_update.base.out_fence = out_fence;
1374 	bo_update.base.mutex = NULL;
1375 	bo_update.base.cpu_blit = vmw_stdu_use_cpu_blit(dev_priv);
1376 	bo_update.base.intr = false;
1377 
1378 	/*
1379 	 * VM without 3D support don't have surface DMA command and framebuffer
1380 	 * should be moved out of VRAM.
1381 	 */
1382 	if (bo_update.base.cpu_blit) {
1383 		bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size_cpu;
1384 		bo_update.base.pre_clip = vmw_stdu_bo_pre_clip_cpu;
1385 		bo_update.base.clip = vmw_stdu_bo_clip_cpu;
1386 		bo_update.base.post_clip = vmw_stdu_bo_populate_update_cpu;
1387 	} else {
1388 		bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size;
1389 		bo_update.base.pre_clip = vmw_stdu_bo_populate_dma;
1390 		bo_update.base.clip = vmw_stdu_bo_populate_clip;
1391 		bo_update.base.post_clip = vmw_stdu_bo_populate_update;
1392 	}
1393 
1394 	return vmw_du_helper_plane_update(&bo_update.base);
1395 }
1396 
1397 static uint32_t
vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane * update,uint32_t num_hits)1398 vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update,
1399 					uint32_t num_hits)
1400 {
1401 	struct vmw_framebuffer_surface *vfbs;
1402 	uint32_t size = 0;
1403 
1404 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1405 
1406 	if (vfbs->is_bo_proxy)
1407 		size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1408 
1409 	size += sizeof(struct vmw_stdu_update);
1410 
1411 	return size;
1412 }
1413 
vmw_stdu_surface_fifo_size(struct vmw_du_update_plane * update,uint32_t num_hits)1414 static uint32_t vmw_stdu_surface_fifo_size(struct vmw_du_update_plane *update,
1415 					   uint32_t num_hits)
1416 {
1417 	struct vmw_framebuffer_surface *vfbs;
1418 	uint32_t size = 0;
1419 
1420 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1421 
1422 	if (vfbs->is_bo_proxy)
1423 		size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1424 
1425 	size += sizeof(struct vmw_stdu_surface_copy) + sizeof(SVGA3dCopyBox) *
1426 		num_hits + sizeof(struct vmw_stdu_update);
1427 
1428 	return size;
1429 }
1430 
1431 static uint32_t
vmw_stdu_surface_update_proxy(struct vmw_du_update_plane * update,void * cmd)1432 vmw_stdu_surface_update_proxy(struct vmw_du_update_plane *update, void *cmd)
1433 {
1434 	struct vmw_framebuffer_surface *vfbs;
1435 	struct drm_plane_state *state = update->plane->state;
1436 	struct drm_plane_state *old_state = update->old_state;
1437 	struct vmw_stdu_update_gb_image *cmd_update = cmd;
1438 	struct drm_atomic_helper_damage_iter iter;
1439 	struct drm_rect clip;
1440 	uint32_t copy_size = 0;
1441 
1442 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1443 
1444 	/*
1445 	 * proxy surface is special where a buffer object type fb is wrapped
1446 	 * in a surface and need an update gb image command to sync with device.
1447 	 */
1448 	drm_atomic_helper_damage_iter_init(&iter, old_state, state);
1449 	drm_atomic_for_each_plane_damage(&iter, &clip) {
1450 		SVGA3dBox *box = &cmd_update->body.box;
1451 
1452 		cmd_update->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1453 		cmd_update->header.size = sizeof(cmd_update->body);
1454 		cmd_update->body.image.sid = vfbs->surface->res.id;
1455 		cmd_update->body.image.face = 0;
1456 		cmd_update->body.image.mipmap = 0;
1457 
1458 		box->x = clip.x1;
1459 		box->y = clip.y1;
1460 		box->z = 0;
1461 		box->w = drm_rect_width(&clip);
1462 		box->h = drm_rect_height(&clip);
1463 		box->d = 1;
1464 
1465 		copy_size += sizeof(*cmd_update);
1466 		cmd_update++;
1467 	}
1468 
1469 	return copy_size;
1470 }
1471 
1472 static uint32_t
vmw_stdu_surface_populate_copy(struct vmw_du_update_plane * update,void * cmd,uint32_t num_hits)1473 vmw_stdu_surface_populate_copy(struct vmw_du_update_plane  *update, void *cmd,
1474 			       uint32_t num_hits)
1475 {
1476 	struct vmw_screen_target_display_unit *stdu;
1477 	struct vmw_framebuffer_surface *vfbs;
1478 	struct vmw_stdu_surface_copy *cmd_copy = cmd;
1479 
1480 	stdu = container_of(update->du, typeof(*stdu), base);
1481 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1482 
1483 	cmd_copy->header.id = SVGA_3D_CMD_SURFACE_COPY;
1484 	cmd_copy->header.size = sizeof(cmd_copy->body) + sizeof(SVGA3dCopyBox) *
1485 		num_hits;
1486 	cmd_copy->body.src.sid = vfbs->surface->res.id;
1487 	cmd_copy->body.dest.sid = stdu->display_srf->res.id;
1488 
1489 	return sizeof(*cmd_copy);
1490 }
1491 
1492 static uint32_t
vmw_stdu_surface_populate_clip(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * clip,uint32_t fb_x,uint32_t fb_y)1493 vmw_stdu_surface_populate_clip(struct vmw_du_update_plane  *update, void *cmd,
1494 			       struct drm_rect *clip, uint32_t fb_x,
1495 			       uint32_t fb_y)
1496 {
1497 	struct SVGA3dCopyBox *box = cmd;
1498 
1499 	box->srcx = fb_x;
1500 	box->srcy = fb_y;
1501 	box->srcz = 0;
1502 	box->x = clip->x1;
1503 	box->y = clip->y1;
1504 	box->z = 0;
1505 	box->w = drm_rect_width(clip);
1506 	box->h = drm_rect_height(clip);
1507 	box->d = 1;
1508 
1509 	return sizeof(*box);
1510 }
1511 
1512 static uint32_t
vmw_stdu_surface_populate_update(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * bb)1513 vmw_stdu_surface_populate_update(struct vmw_du_update_plane  *update, void *cmd,
1514 				 struct drm_rect *bb)
1515 {
1516 	vmw_stdu_populate_update(cmd, update->du->unit, bb->x1, bb->x2, bb->y1,
1517 				 bb->y2);
1518 
1519 	return sizeof(struct vmw_stdu_update);
1520 }
1521 
1522 /**
1523  * vmw_stdu_plane_update_surface - Update display unit for surface backed fb
1524  * @dev_priv: Device private
1525  * @plane: Plane state
1526  * @old_state: Old plane state
1527  * @vfb: Framebuffer which is blitted to display unit
1528  * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1529  *             The returned fence pointer may be NULL in which case the device
1530  *             has already synchronized.
1531  *
1532  * Return: 0 on success or a negative error code on failure.
1533  */
vmw_stdu_plane_update_surface(struct vmw_private * dev_priv,struct drm_plane * plane,struct drm_plane_state * old_state,struct vmw_framebuffer * vfb,struct vmw_fence_obj ** out_fence)1534 static int vmw_stdu_plane_update_surface(struct vmw_private *dev_priv,
1535 					 struct drm_plane *plane,
1536 					 struct drm_plane_state *old_state,
1537 					 struct vmw_framebuffer *vfb,
1538 					 struct vmw_fence_obj **out_fence)
1539 {
1540 	struct vmw_du_update_plane srf_update;
1541 	struct vmw_screen_target_display_unit *stdu;
1542 	struct vmw_framebuffer_surface *vfbs;
1543 
1544 	stdu = vmw_crtc_to_stdu(plane->state->crtc);
1545 	vfbs = container_of(vfb, typeof(*vfbs), base);
1546 
1547 	memset(&srf_update, 0, sizeof(struct vmw_du_update_plane));
1548 	srf_update.plane = plane;
1549 	srf_update.old_state = old_state;
1550 	srf_update.dev_priv = dev_priv;
1551 	srf_update.du = vmw_crtc_to_du(plane->state->crtc);
1552 	srf_update.vfb = vfb;
1553 	srf_update.out_fence = out_fence;
1554 	srf_update.mutex = &dev_priv->cmdbuf_mutex;
1555 	srf_update.cpu_blit = false;
1556 	srf_update.intr = true;
1557 
1558 	if (vfbs->is_bo_proxy)
1559 		srf_update.post_prepare = vmw_stdu_surface_update_proxy;
1560 
1561 	if (vfbs->surface->res.id != stdu->display_srf->res.id) {
1562 		srf_update.calc_fifo_size = vmw_stdu_surface_fifo_size;
1563 		srf_update.pre_clip = vmw_stdu_surface_populate_copy;
1564 		srf_update.clip = vmw_stdu_surface_populate_clip;
1565 	} else {
1566 		srf_update.calc_fifo_size =
1567 			vmw_stdu_surface_fifo_size_same_display;
1568 	}
1569 
1570 	srf_update.post_clip = vmw_stdu_surface_populate_update;
1571 
1572 	return vmw_du_helper_plane_update(&srf_update);
1573 }
1574 
1575 /**
1576  * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1577  * @plane: display plane
1578  * @state: Only used to get crtc info
1579  *
1580  * Formally update stdu->display_srf to the new plane, and bind the new
1581  * plane STDU.  This function is called during the commit phase when
1582  * all the preparation have been done and all the configurations have
1583  * been checked.
1584  */
1585 static void
vmw_stdu_primary_plane_atomic_update(struct drm_plane * plane,struct drm_atomic_state * state)1586 vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1587 				     struct drm_atomic_state *state)
1588 {
1589 	struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);
1590 	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);
1591 	struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1592 	struct drm_crtc *crtc = new_state->crtc;
1593 	struct vmw_screen_target_display_unit *stdu;
1594 	struct drm_pending_vblank_event *event;
1595 	struct vmw_fence_obj *fence = NULL;
1596 	struct vmw_private *dev_priv;
1597 	int ret;
1598 
1599 	/* If case of device error, maintain consistent atomic state */
1600 	if (crtc && new_state->fb) {
1601 		struct vmw_framebuffer *vfb =
1602 			vmw_framebuffer_to_vfb(new_state->fb);
1603 		stdu = vmw_crtc_to_stdu(crtc);
1604 		dev_priv = vmw_priv(crtc->dev);
1605 
1606 		stdu->display_srf = vps->surf;
1607 		stdu->content_fb_type = vps->content_fb_type;
1608 		stdu->cpp = vps->cpp;
1609 
1610 		ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1611 		if (ret)
1612 			DRM_ERROR("Failed to bind surface to STDU.\n");
1613 
1614 		if (vfb->bo)
1615 			ret = vmw_stdu_plane_update_bo(dev_priv, plane,
1616 						       old_state, vfb, &fence);
1617 		else
1618 			ret = vmw_stdu_plane_update_surface(dev_priv, plane,
1619 							    old_state, vfb,
1620 							    &fence);
1621 		if (ret)
1622 			DRM_ERROR("Failed to update STDU.\n");
1623 	} else {
1624 		crtc = old_state->crtc;
1625 		stdu = vmw_crtc_to_stdu(crtc);
1626 		dev_priv = vmw_priv(crtc->dev);
1627 
1628 		/* Blank STDU when fb and crtc are NULL */
1629 		if (!stdu->defined)
1630 			return;
1631 
1632 		ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1633 		if (ret)
1634 			DRM_ERROR("Failed to blank STDU\n");
1635 
1636 		ret = vmw_stdu_update_st(dev_priv, stdu);
1637 		if (ret)
1638 			DRM_ERROR("Failed to update STDU.\n");
1639 
1640 		return;
1641 	}
1642 
1643 	/* In case of error, vblank event is send in vmw_du_crtc_atomic_flush */
1644 	event = crtc->state->event;
1645 	if (event && fence) {
1646 		struct drm_file *file_priv = event->base.file_priv;
1647 
1648 		ret = vmw_event_fence_action_queue(file_priv,
1649 						   fence,
1650 						   &event->base,
1651 						   &event->event.vbl.tv_sec,
1652 						   &event->event.vbl.tv_usec,
1653 						   true);
1654 		if (ret)
1655 			DRM_ERROR("Failed to queue event on fence.\n");
1656 		else
1657 			crtc->state->event = NULL;
1658 	}
1659 
1660 	if (fence)
1661 		vmw_fence_obj_unreference(&fence);
1662 }
1663 
1664 
1665 static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
1666 	.update_plane = drm_atomic_helper_update_plane,
1667 	.disable_plane = drm_atomic_helper_disable_plane,
1668 	.destroy = vmw_du_primary_plane_destroy,
1669 	.reset = vmw_du_plane_reset,
1670 	.atomic_duplicate_state = vmw_du_plane_duplicate_state,
1671 	.atomic_destroy_state = vmw_du_plane_destroy_state,
1672 };
1673 
1674 static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
1675 	.update_plane = drm_atomic_helper_update_plane,
1676 	.disable_plane = drm_atomic_helper_disable_plane,
1677 	.destroy = vmw_du_cursor_plane_destroy,
1678 	.reset = vmw_du_plane_reset,
1679 	.atomic_duplicate_state = vmw_du_plane_duplicate_state,
1680 	.atomic_destroy_state = vmw_du_plane_destroy_state,
1681 };
1682 
1683 
1684 /*
1685  * Atomic Helpers
1686  */
1687 static const struct
1688 drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1689 	.atomic_check = vmw_du_cursor_plane_atomic_check,
1690 	.atomic_update = vmw_du_cursor_plane_atomic_update,
1691 	.prepare_fb = vmw_du_cursor_plane_prepare_fb,
1692 	.cleanup_fb = vmw_du_cursor_plane_cleanup_fb,
1693 };
1694 
1695 static const struct
1696 drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1697 	.atomic_check = vmw_du_primary_plane_atomic_check,
1698 	.atomic_update = vmw_stdu_primary_plane_atomic_update,
1699 	.prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1700 	.cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1701 };
1702 
1703 static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1704 	.prepare = vmw_stdu_crtc_helper_prepare,
1705 	.mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1706 	.atomic_check = vmw_du_crtc_atomic_check,
1707 	.atomic_begin = vmw_du_crtc_atomic_begin,
1708 	.atomic_flush = vmw_du_crtc_atomic_flush,
1709 	.atomic_enable = vmw_stdu_crtc_atomic_enable,
1710 	.atomic_disable = vmw_stdu_crtc_atomic_disable,
1711 };
1712 
1713 
1714 /**
1715  * vmw_stdu_init - Sets up a Screen Target Display Unit
1716  *
1717  * @dev_priv: VMW DRM device
1718  * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1719  *
1720  * This function is called once per CRTC, and allocates one Screen Target
1721  * display unit to represent that CRTC.  Since the SVGA device does not separate
1722  * out encoder and connector, they are represented as part of the STDU as well.
1723  */
vmw_stdu_init(struct vmw_private * dev_priv,unsigned unit)1724 static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1725 {
1726 	struct vmw_screen_target_display_unit *stdu;
1727 	struct drm_device *dev = &dev_priv->drm;
1728 	struct drm_connector *connector;
1729 	struct drm_encoder *encoder;
1730 	struct drm_plane *primary;
1731 	struct vmw_cursor_plane *cursor;
1732 	struct drm_crtc *crtc;
1733 	int    ret;
1734 
1735 	stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1736 	if (!stdu)
1737 		return -ENOMEM;
1738 
1739 	stdu->base.unit = unit;
1740 	crtc = &stdu->base.crtc;
1741 	encoder = &stdu->base.encoder;
1742 	connector = &stdu->base.connector;
1743 	primary = &stdu->base.primary;
1744 	cursor = &stdu->base.cursor;
1745 
1746 	stdu->base.pref_active = (unit == 0);
1747 	stdu->base.pref_width  = dev_priv->initial_width;
1748 	stdu->base.pref_height = dev_priv->initial_height;
1749 	stdu->base.is_implicit = false;
1750 
1751 	/* Initialize primary plane */
1752 	ret = drm_universal_plane_init(dev, primary,
1753 				       0, &vmw_stdu_plane_funcs,
1754 				       vmw_primary_plane_formats,
1755 				       ARRAY_SIZE(vmw_primary_plane_formats),
1756 				       NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
1757 	if (ret) {
1758 		DRM_ERROR("Failed to initialize primary plane");
1759 		goto err_free;
1760 	}
1761 
1762 	drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1763 	drm_plane_enable_fb_damage_clips(primary);
1764 
1765 	/* Initialize cursor plane */
1766 	ret = drm_universal_plane_init(dev, &cursor->base,
1767 			0, &vmw_stdu_cursor_funcs,
1768 			vmw_cursor_plane_formats,
1769 			ARRAY_SIZE(vmw_cursor_plane_formats),
1770 			NULL, DRM_PLANE_TYPE_CURSOR, NULL);
1771 	if (ret) {
1772 		DRM_ERROR("Failed to initialize cursor plane");
1773 		drm_plane_cleanup(&stdu->base.primary);
1774 		goto err_free;
1775 	}
1776 
1777 	drm_plane_helper_add(&cursor->base, &vmw_stdu_cursor_plane_helper_funcs);
1778 
1779 	ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1780 				 DRM_MODE_CONNECTOR_VIRTUAL);
1781 	if (ret) {
1782 		DRM_ERROR("Failed to initialize connector\n");
1783 		goto err_free;
1784 	}
1785 
1786 	drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
1787 	connector->status = vmw_du_connector_detect(connector, false);
1788 
1789 	ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1790 			       DRM_MODE_ENCODER_VIRTUAL, NULL);
1791 	if (ret) {
1792 		DRM_ERROR("Failed to initialize encoder\n");
1793 		goto err_free_connector;
1794 	}
1795 
1796 	(void) drm_connector_attach_encoder(connector, encoder);
1797 	encoder->possible_crtcs = (1 << unit);
1798 	encoder->possible_clones = 0;
1799 
1800 	ret = drm_connector_register(connector);
1801 	if (ret) {
1802 		DRM_ERROR("Failed to register connector\n");
1803 		goto err_free_encoder;
1804 	}
1805 
1806 	ret = drm_crtc_init_with_planes(dev, crtc, primary,
1807 					&cursor->base,
1808 					&vmw_stdu_crtc_funcs, NULL);
1809 	if (ret) {
1810 		DRM_ERROR("Failed to initialize CRTC\n");
1811 		goto err_free_unregister;
1812 	}
1813 
1814 	drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1815 
1816 	drm_mode_crtc_set_gamma_size(crtc, 256);
1817 
1818 	drm_object_attach_property(&connector->base,
1819 				   dev_priv->hotplug_mode_update_property, 1);
1820 	drm_object_attach_property(&connector->base,
1821 				   dev->mode_config.suggested_x_property, 0);
1822 	drm_object_attach_property(&connector->base,
1823 				   dev->mode_config.suggested_y_property, 0);
1824 	return 0;
1825 
1826 err_free_unregister:
1827 	drm_connector_unregister(connector);
1828 err_free_encoder:
1829 	drm_encoder_cleanup(encoder);
1830 err_free_connector:
1831 	drm_connector_cleanup(connector);
1832 err_free:
1833 	kfree(stdu);
1834 	return ret;
1835 }
1836 
1837 
1838 
1839 /**
1840  *  vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1841  *
1842  *  @stdu:  Screen Target Display Unit to be destroyed
1843  *
1844  *  Clean up after vmw_stdu_init
1845  */
vmw_stdu_destroy(struct vmw_screen_target_display_unit * stdu)1846 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1847 {
1848 	vmw_du_cleanup(&stdu->base);
1849 	kfree(stdu);
1850 }
1851 
1852 
1853 
1854 /******************************************************************************
1855  * Screen Target Display KMS Functions
1856  *
1857  * These functions are called by the common KMS code in vmwgfx_kms.c
1858  *****************************************************************************/
1859 
1860 /**
1861  * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1862  *
1863  * @dev_priv: VMW DRM device
1864  *
1865  * This function initialize a Screen Target based display device.  It checks
1866  * the capability bits to make sure the underlying hardware can support
1867  * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1868  * Units, as supported by the display hardware.
1869  *
1870  * RETURNS:
1871  * 0 on success, error code otherwise
1872  */
vmw_kms_stdu_init_display(struct vmw_private * dev_priv)1873 int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1874 {
1875 	struct drm_device *dev = &dev_priv->drm;
1876 	int i, ret;
1877 
1878 
1879 	/* Do nothing if there's no support for MOBs */
1880 	if (!dev_priv->has_mob)
1881 		return -ENOSYS;
1882 
1883 	if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
1884 		return -ENOSYS;
1885 
1886 	ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1887 	if (unlikely(ret != 0))
1888 		return ret;
1889 
1890 	dev_priv->active_display_unit = vmw_du_screen_target;
1891 
1892 	for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1893 		ret = vmw_stdu_init(dev_priv, i);
1894 
1895 		if (unlikely(ret != 0)) {
1896 			drm_err(&dev_priv->drm,
1897 				"Failed to initialize STDU %d", i);
1898 			return ret;
1899 		}
1900 	}
1901 
1902 	drm_mode_config_reset(dev);
1903 
1904 	return 0;
1905 }
1906