1 /*
2 * Copyright (C) 2010 Bluecherry, LLC www.bluecherrydvr.com
3 * Copyright (C) 2010 Ben Collins <bcollins@bluecherry.net>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 */
19
20 #ifndef __SOLO6X10_H
21 #define __SOLO6X10_H
22
23 #include <linux/version.h>
24 #include <linux/pci.h>
25 #include <linux/i2c.h>
26 #include <linux/semaphore.h>
27 #include <linux/mutex.h>
28 #include <linux/list.h>
29 #include <linux/wait.h>
30 #include <linux/delay.h>
31 #include <asm/io.h>
32 #include <asm/atomic.h>
33 #include <linux/videodev2.h>
34 #include <media/v4l2-dev.h>
35 #include <media/videobuf-core.h>
36 #include "registers.h"
37
38 #ifndef PCI_VENDOR_ID_SOFTLOGIC
39 #define PCI_VENDOR_ID_SOFTLOGIC 0x9413
40 #define PCI_DEVICE_ID_SOLO6010 0x6010
41 #define PCI_DEVICE_ID_SOLO6110 0x6110
42 #endif
43
44 #ifndef PCI_VENDOR_ID_BLUECHERRY
45 #define PCI_VENDOR_ID_BLUECHERRY 0x1BB3
46 /* Neugent Softlogic 6010 based cards */
47 #define PCI_DEVICE_ID_NEUSOLO_4 0x4304
48 #define PCI_DEVICE_ID_NEUSOLO_9 0x4309
49 #define PCI_DEVICE_ID_NEUSOLO_16 0x4310
50 /* Bluecherry Softlogic 6010 based cards */
51 #define PCI_DEVICE_ID_BC_SOLO_4 0x4E04
52 #define PCI_DEVICE_ID_BC_SOLO_9 0x4E09
53 #define PCI_DEVICE_ID_BC_SOLO_16 0x4E10
54 /* Bluecherry Softlogic 6110 based cards */
55 #define PCI_DEVICE_ID_BC_6110_4 0x5304
56 #define PCI_DEVICE_ID_BC_6110_8 0x5308
57 #define PCI_DEVICE_ID_BC_6110_16 0x5310
58 #endif /* Bluecherry */
59
60 #define SOLO6X10_NAME "solo6x10"
61
62 #define SOLO_MAX_CHANNELS 16
63
64 /* Make sure these two match */
65 #define SOLO6X10_VERSION "2.1.0"
66 #define SOLO6X10_VER_MAJOR 2
67 #define SOLO6X10_VER_MINOR 0
68 #define SOLO6X10_VER_SUB 0
69 #define SOLO6X10_VER_NUM \
70 KERNEL_VERSION(SOLO6X10_VER_MAJOR, SOLO6X10_VER_MINOR, SOLO6X10_VER_SUB)
71
72 #define FLAGS_6110 1
73
74 /*
75 * The SOLO6x10 actually has 8 i2c channels, but we only use 2.
76 * 0 - Techwell chip(s)
77 * 1 - SAA7128
78 */
79 #define SOLO_I2C_ADAPTERS 2
80 #define SOLO_I2C_TW 0
81 #define SOLO_I2C_SAA 1
82
83 /* DMA Engine setup */
84 #define SOLO_NR_P2M 4
85 #define SOLO_NR_P2M_DESC 256
86 /* MPEG and JPEG share the same interrupt and locks so they must be together
87 * in the same dma channel. */
88 #define SOLO_P2M_DMA_ID_MP4E 0
89 #define SOLO_P2M_DMA_ID_JPEG 0
90 #define SOLO_P2M_DMA_ID_MP4D 1
91 #define SOLO_P2M_DMA_ID_G723D 1
92 #define SOLO_P2M_DMA_ID_DISP 2
93 #define SOLO_P2M_DMA_ID_OSG 2
94 #define SOLO_P2M_DMA_ID_G723E 3
95 #define SOLO_P2M_DMA_ID_VIN 3
96
97 /* Encoder standard modes */
98 #define SOLO_ENC_MODE_CIF 2
99 #define SOLO_ENC_MODE_HD1 1
100 #define SOLO_ENC_MODE_D1 9
101
102 #define SOLO_DEFAULT_GOP 30
103 #define SOLO_DEFAULT_QP 3
104
105 /* There is 8MB memory available for solo to buffer MPEG4 frames.
106 * This gives us 512 * 16kbyte queues. */
107 #define SOLO_NR_RING_BUFS 512
108
109 #define SOLO_CLOCK_MHZ 108
110
111 #ifndef V4L2_BUF_FLAG_MOTION_ON
112 #define V4L2_BUF_FLAG_MOTION_ON 0x0400
113 #define V4L2_BUF_FLAG_MOTION_DETECTED 0x0800
114 #endif
115 #ifndef V4L2_CID_MOTION_ENABLE
116 #define PRIVATE_CIDS
117 #define V4L2_CID_MOTION_ENABLE (V4L2_CID_PRIVATE_BASE+0)
118 #define V4L2_CID_MOTION_THRESHOLD (V4L2_CID_PRIVATE_BASE+1)
119 #define V4L2_CID_MOTION_TRACE (V4L2_CID_PRIVATE_BASE+2)
120 #endif
121
122 enum SOLO_I2C_STATE {
123 IIC_STATE_IDLE,
124 IIC_STATE_START,
125 IIC_STATE_READ,
126 IIC_STATE_WRITE,
127 IIC_STATE_STOP
128 };
129
130 struct p2m_desc {
131 u32 ctrl;
132 u32 ext;
133 u32 ta;
134 u32 fa;
135 };
136
137 struct solo_p2m_dev {
138 struct mutex mutex;
139 struct completion completion;
140 int error;
141 };
142
143 #define OSD_TEXT_MAX 30
144
145 enum solo_enc_types {
146 SOLO_ENC_TYPE_STD,
147 SOLO_ENC_TYPE_EXT,
148 };
149
150 struct solo_enc_dev {
151 struct solo_dev *solo_dev;
152 /* V4L2 Items */
153 struct video_device *vfd;
154 /* General accounting */
155 wait_queue_head_t thread_wait;
156 spinlock_t lock;
157 atomic_t readers;
158 u8 ch;
159 u8 mode, gop, qp, interlaced, interval;
160 u8 reset_gop;
161 u8 bw_weight;
162 u8 motion_detected;
163 u16 motion_thresh;
164 u16 width;
165 u16 height;
166 char osd_text[OSD_TEXT_MAX + 1];
167 };
168
169 struct solo_enc_buf {
170 u8 vop;
171 u8 ch;
172 enum solo_enc_types type;
173 u32 off;
174 u32 size;
175 u32 jpeg_off;
176 u32 jpeg_size;
177 struct timeval ts;
178 };
179
180 /* The SOLO6x10 PCI Device */
181 struct solo_dev {
182 /* General stuff */
183 struct pci_dev *pdev;
184 u8 __iomem *reg_base;
185 int nr_chans;
186 int nr_ext;
187 u32 flags;
188 u32 irq_mask;
189 u32 motion_mask;
190 spinlock_t reg_io_lock;
191
192 /* tw28xx accounting */
193 u8 tw2865, tw2864, tw2815;
194 u8 tw28_cnt;
195
196 /* i2c related items */
197 struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS];
198 enum SOLO_I2C_STATE i2c_state;
199 struct mutex i2c_mutex;
200 int i2c_id;
201 wait_queue_head_t i2c_wait;
202 struct i2c_msg *i2c_msg;
203 unsigned int i2c_msg_num;
204 unsigned int i2c_msg_ptr;
205
206 /* P2M DMA Engine */
207 struct solo_p2m_dev p2m_dev[SOLO_NR_P2M];
208
209 /* V4L2 Display items */
210 struct video_device *vfd;
211 unsigned int erasing;
212 unsigned int frame_blank;
213 u8 cur_disp_ch;
214 wait_queue_head_t disp_thread_wait;
215
216 /* V4L2 Encoder items */
217 struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS];
218 u16 enc_bw_remain;
219 /* IDX into hw mp4 encoder */
220 u8 enc_idx;
221 /* Our software ring of enc buf references */
222 u16 enc_wr_idx;
223 struct solo_enc_buf enc_buf[SOLO_NR_RING_BUFS];
224
225 /* Current video settings */
226 u32 video_type;
227 u16 video_hsize, video_vsize;
228 u16 vout_hstart, vout_vstart;
229 u16 vin_hstart, vin_vstart;
230 u8 fps;
231
232 /* Audio components */
233 struct snd_card *snd_card;
234 struct snd_pcm *snd_pcm;
235 atomic_t snd_users;
236 int g723_hw_idx;
237 };
238
solo_reg_read(struct solo_dev * solo_dev,int reg)239 static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
240 {
241 unsigned long flags;
242 u32 ret;
243 u16 val;
244
245 spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
246
247 ret = readl(solo_dev->reg_base + reg);
248 rmb();
249 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
250 rmb();
251
252 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
253
254 return ret;
255 }
256
solo_reg_write(struct solo_dev * solo_dev,int reg,u32 data)257 static inline void solo_reg_write(struct solo_dev *solo_dev, int reg, u32 data)
258 {
259 unsigned long flags;
260 u16 val;
261
262 spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
263
264 writel(data, solo_dev->reg_base + reg);
265 wmb();
266 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
267 rmb();
268
269 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
270 }
271
272 void solo_irq_on(struct solo_dev *solo_dev, u32 mask);
273 void solo_irq_off(struct solo_dev *solo_dev, u32 mask);
274
275 /* Init/exit routeines for subsystems */
276 int solo_disp_init(struct solo_dev *solo_dev);
277 void solo_disp_exit(struct solo_dev *solo_dev);
278
279 int solo_gpio_init(struct solo_dev *solo_dev);
280 void solo_gpio_exit(struct solo_dev *solo_dev);
281
282 int solo_i2c_init(struct solo_dev *solo_dev);
283 void solo_i2c_exit(struct solo_dev *solo_dev);
284
285 int solo_p2m_init(struct solo_dev *solo_dev);
286 void solo_p2m_exit(struct solo_dev *solo_dev);
287
288 int solo_v4l2_init(struct solo_dev *solo_dev);
289 void solo_v4l2_exit(struct solo_dev *solo_dev);
290
291 int solo_enc_init(struct solo_dev *solo_dev);
292 void solo_enc_exit(struct solo_dev *solo_dev);
293
294 int solo_enc_v4l2_init(struct solo_dev *solo_dev);
295 void solo_enc_v4l2_exit(struct solo_dev *solo_dev);
296
297 int solo_g723_init(struct solo_dev *solo_dev);
298 void solo_g723_exit(struct solo_dev *solo_dev);
299
300 /* ISR's */
301 int solo_i2c_isr(struct solo_dev *solo_dev);
302 void solo_p2m_isr(struct solo_dev *solo_dev, int id);
303 void solo_p2m_error_isr(struct solo_dev *solo_dev, u32 status);
304 void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
305 void solo_g723_isr(struct solo_dev *solo_dev);
306 void solo_motion_isr(struct solo_dev *solo_dev);
307 void solo_video_in_isr(struct solo_dev *solo_dev);
308
309 /* i2c read/write */
310 u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
311 void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
312 u8 data);
313
314 /* P2M DMA */
315 int solo_p2m_dma_t(struct solo_dev *solo_dev, u8 id, int wr,
316 dma_addr_t dma_addr, u32 ext_addr, u32 size);
317 int solo_p2m_dma(struct solo_dev *solo_dev, u8 id, int wr,
318 void *sys_addr, u32 ext_addr, u32 size);
319 int solo_p2m_dma_sg(struct solo_dev *solo_dev, u8 id,
320 struct p2m_desc *pdesc, int wr,
321 struct scatterlist *sglist, u32 sg_off,
322 u32 ext_addr, u32 size);
323 void solo_p2m_push_desc(struct p2m_desc *desc, int wr, dma_addr_t dma_addr,
324 u32 ext_addr, u32 size, int repeat, u32 ext_size);
325 int solo_p2m_dma_desc(struct solo_dev *solo_dev, u8 id,
326 struct p2m_desc *desc, int desc_count);
327
328 /* Set the threshold for motion detection */
329 void solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
330 #define SOLO_DEF_MOT_THRESH 0x0300
331
332 /* Write text on OSD */
333 int solo_osd_print(struct solo_enc_dev *solo_enc);
334
335 #endif /* __SOLO6X10_H */
336