1 /*
2 * Device driver for the via ADB on (many) Mac II-class machines
3 *
4 * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
5 * Also derived from code Copyright (C) 1996 Paul Mackerras.
6 *
7 * With various updates provided over the years by Michael Schmitz,
8 * Guideo Koerber and others.
9 *
10 * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
11 *
12 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
13 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
14 * - Big overhaul, should actually work now.
15 * 2006-12-31 Finn Thain <fthain@telegraphics.com.au> - Another overhaul.
16 *
17 * Suggested reading:
18 * Inside Macintosh, ch. 5 ADB Manager
19 * Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
20 * Rockwell R6522 VIA datasheet
21 *
22 * Apple's "ADB Analyzer" bus sniffer is invaluable:
23 * ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
24 */
25
26 #include <stdarg.h>
27 #include <linux/types.h>
28 #include <linux/errno.h>
29 #include <linux/kernel.h>
30 #include <linux/delay.h>
31 #include <linux/adb.h>
32 #include <linux/interrupt.h>
33 #include <linux/init.h>
34 #include <asm/macintosh.h>
35 #include <asm/macints.h>
36 #include <asm/mac_via.h>
37
38 static volatile unsigned char *via;
39
40 /* VIA registers - spaced 0x200 bytes apart */
41 #define RS 0x200 /* skip between registers */
42 #define B 0 /* B-side data */
43 #define A RS /* A-side data */
44 #define DIRB (2*RS) /* B-side direction (1=output) */
45 #define DIRA (3*RS) /* A-side direction (1=output) */
46 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
47 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
48 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
49 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
50 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
51 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
52 #define SR (10*RS) /* Shift register */
53 #define ACR (11*RS) /* Auxiliary control register */
54 #define PCR (12*RS) /* Peripheral control register */
55 #define IFR (13*RS) /* Interrupt flag register */
56 #define IER (14*RS) /* Interrupt enable register */
57 #define ANH (15*RS) /* A-side data, no handshake */
58
59 /* Bits in B data register: all active low */
60 #define CTLR_IRQ 0x08 /* Controller rcv status (input) */
61 #define ST_MASK 0x30 /* mask for selecting ADB state bits */
62
63 /* Bits in ACR */
64 #define SR_CTRL 0x1c /* Shift register control bits */
65 #define SR_EXT 0x0c /* Shift on external clock */
66 #define SR_OUT 0x10 /* Shift out if 1 */
67
68 /* Bits in IFR and IER */
69 #define IER_SET 0x80 /* set bits in IER */
70 #define IER_CLR 0 /* clear bits in IER */
71 #define SR_INT 0x04 /* Shift register full/empty */
72
73 /* ADB transaction states according to GMHW */
74 #define ST_CMD 0x00 /* ADB state: command byte */
75 #define ST_EVEN 0x10 /* ADB state: even data byte */
76 #define ST_ODD 0x20 /* ADB state: odd data byte */
77 #define ST_IDLE 0x30 /* ADB state: idle, nothing to send */
78
79 static int macii_init_via(void);
80 static void macii_start(void);
81 static irqreturn_t macii_interrupt(int irq, void *arg);
82 static void macii_queue_poll(void);
83
84 static int macii_probe(void);
85 static int macii_init(void);
86 static int macii_send_request(struct adb_request *req, int sync);
87 static int macii_write(struct adb_request *req);
88 static int macii_autopoll(int devs);
89 static void macii_poll(void);
90 static int macii_reset_bus(void);
91
92 struct adb_driver via_macii_driver = {
93 "Mac II",
94 macii_probe,
95 macii_init,
96 macii_send_request,
97 macii_autopoll,
98 macii_poll,
99 macii_reset_bus
100 };
101
102 static enum macii_state {
103 idle,
104 sending,
105 reading,
106 read_done,
107 } macii_state;
108
109 static struct adb_request *current_req; /* first request struct in the queue */
110 static struct adb_request *last_req; /* last request struct in the queue */
111 static unsigned char reply_buf[16]; /* storage for autopolled replies */
112 static unsigned char *reply_ptr; /* next byte in reply_buf or req->reply */
113 static int reading_reply; /* store reply in reply_buf else req->reply */
114 static int data_index; /* index of the next byte to send from req->data */
115 static int reply_len; /* number of bytes received in reply_buf or req->reply */
116 static int status; /* VIA's ADB status bits captured upon interrupt */
117 static int last_status; /* status bits as at previous interrupt */
118 static int srq_asserted; /* have to poll for the device that asserted it */
119 static int command_byte; /* the most recent command byte transmitted */
120 static int autopoll_devs; /* bits set are device addresses to be polled */
121
122 /* Sanity check for request queue. Doesn't check for cycles. */
request_is_queued(struct adb_request * req)123 static int request_is_queued(struct adb_request *req) {
124 struct adb_request *cur;
125 unsigned long flags;
126 local_irq_save(flags);
127 cur = current_req;
128 while (cur) {
129 if (cur == req) {
130 local_irq_restore(flags);
131 return 1;
132 }
133 cur = cur->next;
134 }
135 local_irq_restore(flags);
136 return 0;
137 }
138
139 /* Check for MacII style ADB */
macii_probe(void)140 static int macii_probe(void)
141 {
142 if (macintosh_config->adb_type != MAC_ADB_II) return -ENODEV;
143
144 via = via1;
145
146 printk("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
147 return 0;
148 }
149
150 /* Initialize the driver */
macii_init(void)151 int macii_init(void)
152 {
153 unsigned long flags;
154 int err;
155
156 local_irq_save(flags);
157
158 err = macii_init_via();
159 if (err) goto out;
160
161 err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB",
162 macii_interrupt);
163 if (err) goto out;
164
165 macii_state = idle;
166 out:
167 local_irq_restore(flags);
168 return err;
169 }
170
171 /* initialize the hardware */
macii_init_via(void)172 static int macii_init_via(void)
173 {
174 unsigned char x;
175
176 /* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
177 via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;
178
179 /* Set up state: idle */
180 via[B] |= ST_IDLE;
181 last_status = via[B] & (ST_MASK|CTLR_IRQ);
182
183 /* Shift register on input */
184 via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
185
186 /* Wipe any pending data and int */
187 x = via[SR];
188
189 return 0;
190 }
191
192 /* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
macii_queue_poll(void)193 static void macii_queue_poll(void)
194 {
195 /* No point polling the active device as it will never assert SRQ, so
196 * poll the next device in the autopoll list. This could leave us
197 * stuck in a polling loop if an unprobed device is asserting SRQ.
198 * In theory, that could only happen if a device was plugged in after
199 * probing started. Unplugging it again will break the cycle.
200 * (Simply polling the next higher device often ends up polling almost
201 * every device (after wrapping around), which takes too long.)
202 */
203 int device_mask;
204 int next_device;
205 static struct adb_request req;
206
207 if (!autopoll_devs) return;
208
209 device_mask = (1 << (((command_byte & 0xF0) >> 4) + 1)) - 1;
210 if (autopoll_devs & ~device_mask)
211 next_device = ffs(autopoll_devs & ~device_mask) - 1;
212 else
213 next_device = ffs(autopoll_devs) - 1;
214
215 BUG_ON(request_is_queued(&req));
216
217 adb_request(&req, NULL, ADBREQ_NOSEND, 1,
218 ADB_READREG(next_device, 0));
219
220 req.sent = 0;
221 req.complete = 0;
222 req.reply_len = 0;
223 req.next = current_req;
224
225 if (current_req != NULL) {
226 current_req = &req;
227 } else {
228 current_req = &req;
229 last_req = &req;
230 }
231 }
232
233 /* Send an ADB request; if sync, poll out the reply 'till it's done */
macii_send_request(struct adb_request * req,int sync)234 static int macii_send_request(struct adb_request *req, int sync)
235 {
236 int err;
237 unsigned long flags;
238
239 BUG_ON(request_is_queued(req));
240
241 local_irq_save(flags);
242 err = macii_write(req);
243 local_irq_restore(flags);
244
245 if (!err && sync) {
246 while (!req->complete) {
247 macii_poll();
248 }
249 BUG_ON(request_is_queued(req));
250 }
251
252 return err;
253 }
254
255 /* Send an ADB request (append to request queue) */
macii_write(struct adb_request * req)256 static int macii_write(struct adb_request *req)
257 {
258 if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {
259 req->complete = 1;
260 return -EINVAL;
261 }
262
263 req->next = NULL;
264 req->sent = 0;
265 req->complete = 0;
266 req->reply_len = 0;
267
268 if (current_req != NULL) {
269 last_req->next = req;
270 last_req = req;
271 } else {
272 current_req = req;
273 last_req = req;
274 if (macii_state == idle) macii_start();
275 }
276 return 0;
277 }
278
279 /* Start auto-polling */
macii_autopoll(int devs)280 static int macii_autopoll(int devs)
281 {
282 static struct adb_request req;
283 unsigned long flags;
284 int err = 0;
285
286 /* bit 1 == device 1, and so on. */
287 autopoll_devs = devs & 0xFFFE;
288
289 if (!autopoll_devs) return 0;
290
291 local_irq_save(flags);
292
293 if (current_req == NULL) {
294 /* Send a Talk Reg 0. The controller will repeatedly transmit
295 * this as long as it is idle.
296 */
297 adb_request(&req, NULL, ADBREQ_NOSEND, 1,
298 ADB_READREG(ffs(autopoll_devs) - 1, 0));
299 err = macii_write(&req);
300 }
301
302 local_irq_restore(flags);
303 return err;
304 }
305
need_autopoll(void)306 static inline int need_autopoll(void) {
307 /* Was the last command Talk Reg 0
308 * and is the target on the autopoll list?
309 */
310 if ((command_byte & 0x0F) == 0x0C &&
311 ((1 << ((command_byte & 0xF0) >> 4)) & autopoll_devs))
312 return 0;
313 return 1;
314 }
315
316 /* Prod the chip without interrupts */
macii_poll(void)317 static void macii_poll(void)
318 {
319 disable_irq(IRQ_MAC_ADB);
320 macii_interrupt(0, NULL);
321 enable_irq(IRQ_MAC_ADB);
322 }
323
324 /* Reset the bus */
macii_reset_bus(void)325 static int macii_reset_bus(void)
326 {
327 static struct adb_request req;
328
329 if (request_is_queued(&req))
330 return 0;
331
332 /* Command = 0, Address = ignored */
333 adb_request(&req, NULL, 0, 1, ADB_BUSRESET);
334
335 /* Don't want any more requests during the Global Reset low time. */
336 udelay(3000);
337
338 return 0;
339 }
340
341 /* Start sending ADB packet */
macii_start(void)342 static void macii_start(void)
343 {
344 struct adb_request *req;
345
346 req = current_req;
347
348 BUG_ON(req == NULL);
349
350 BUG_ON(macii_state != idle);
351
352 /* Now send it. Be careful though, that first byte of the request
353 * is actually ADB_PACKET; the real data begins at index 1!
354 * And req->nbytes is the number of bytes of real data plus one.
355 */
356
357 /* store command byte */
358 command_byte = req->data[1];
359 /* Output mode */
360 via[ACR] |= SR_OUT;
361 /* Load data */
362 via[SR] = req->data[1];
363 /* set ADB state to 'command' */
364 via[B] = (via[B] & ~ST_MASK) | ST_CMD;
365
366 macii_state = sending;
367 data_index = 2;
368 }
369
370 /*
371 * The notorious ADB interrupt handler - does all of the protocol handling.
372 * Relies on the ADB controller sending and receiving data, thereby
373 * generating shift register interrupts (SR_INT) for us. This means there has
374 * to be activity on the ADB bus. The chip will poll to achieve this.
375 *
376 * The basic ADB state machine was left unchanged from the original MacII code
377 * by Alan Cox, which was based on the CUDA driver for PowerMac.
378 * The syntax of the ADB status lines is totally different on MacII,
379 * though. MacII uses the states Command -> Even -> Odd -> Even ->...-> Idle
380 * for sending and Idle -> Even -> Odd -> Even ->...-> Idle for receiving.
381 * Start and end of a receive packet are signalled by asserting /IRQ on the
382 * interrupt line (/IRQ means the CTLR_IRQ bit in port B; not to be confused
383 * with the VIA shift register interrupt. /IRQ never actually interrupts the
384 * processor, it's just an ordinary input.)
385 */
macii_interrupt(int irq,void * arg)386 static irqreturn_t macii_interrupt(int irq, void *arg)
387 {
388 int x;
389 static int entered;
390 struct adb_request *req;
391
392 if (!arg) {
393 /* Clear the SR IRQ flag when polling. */
394 if (via[IFR] & SR_INT)
395 via[IFR] = SR_INT;
396 else
397 return IRQ_NONE;
398 }
399
400 BUG_ON(entered++);
401
402 last_status = status;
403 status = via[B] & (ST_MASK|CTLR_IRQ);
404
405 switch (macii_state) {
406 case idle:
407 if (reading_reply) {
408 reply_ptr = current_req->reply;
409 } else {
410 BUG_ON(current_req != NULL);
411 reply_ptr = reply_buf;
412 }
413
414 x = via[SR];
415
416 if ((status & CTLR_IRQ) && (x == 0xFF)) {
417 /* Bus timeout without SRQ sequence:
418 * data is "FF" while CTLR_IRQ is "H"
419 */
420 reply_len = 0;
421 srq_asserted = 0;
422 macii_state = read_done;
423 } else {
424 macii_state = reading;
425 *reply_ptr = x;
426 reply_len = 1;
427 }
428
429 /* set ADB state = even for first data byte */
430 via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
431 break;
432
433 case sending:
434 req = current_req;
435 if (data_index >= req->nbytes) {
436 req->sent = 1;
437 macii_state = idle;
438
439 if (req->reply_expected) {
440 reading_reply = 1;
441 } else {
442 req->complete = 1;
443 current_req = req->next;
444 if (req->done) (*req->done)(req);
445
446 if (current_req)
447 macii_start();
448 else
449 if (need_autopoll())
450 macii_autopoll(autopoll_devs);
451 }
452
453 if (macii_state == idle) {
454 /* reset to shift in */
455 via[ACR] &= ~SR_OUT;
456 x = via[SR];
457 /* set ADB state idle - might get SRQ */
458 via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
459 }
460 } else {
461 via[SR] = req->data[data_index++];
462
463 if ( (via[B] & ST_MASK) == ST_CMD ) {
464 /* just sent the command byte, set to EVEN */
465 via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
466 } else {
467 /* invert state bits, toggle ODD/EVEN */
468 via[B] ^= ST_MASK;
469 }
470 }
471 break;
472
473 case reading:
474 x = via[SR];
475 BUG_ON((status & ST_MASK) == ST_CMD ||
476 (status & ST_MASK) == ST_IDLE);
477
478 /* Bus timeout with SRQ sequence:
479 * data is "XX FF" while CTLR_IRQ is "L L"
480 * End of packet without SRQ sequence:
481 * data is "XX...YY 00" while CTLR_IRQ is "L...H L"
482 * End of packet SRQ sequence:
483 * data is "XX...YY 00" while CTLR_IRQ is "L...L L"
484 * (where XX is the first response byte and
485 * YY is the last byte of valid response data.)
486 */
487
488 srq_asserted = 0;
489 if (!(status & CTLR_IRQ)) {
490 if (x == 0xFF) {
491 if (!(last_status & CTLR_IRQ)) {
492 macii_state = read_done;
493 reply_len = 0;
494 srq_asserted = 1;
495 }
496 } else if (x == 0x00) {
497 macii_state = read_done;
498 if (!(last_status & CTLR_IRQ))
499 srq_asserted = 1;
500 }
501 }
502
503 if (macii_state == reading) {
504 BUG_ON(reply_len > 15);
505 reply_ptr++;
506 *reply_ptr = x;
507 reply_len++;
508 }
509
510 /* invert state bits, toggle ODD/EVEN */
511 via[B] ^= ST_MASK;
512 break;
513
514 case read_done:
515 x = via[SR];
516
517 if (reading_reply) {
518 reading_reply = 0;
519 req = current_req;
520 req->reply_len = reply_len;
521 req->complete = 1;
522 current_req = req->next;
523 if (req->done) (*req->done)(req);
524 } else if (reply_len && autopoll_devs)
525 adb_input(reply_buf, reply_len, 0);
526
527 macii_state = idle;
528
529 /* SRQ seen before, initiate poll now */
530 if (srq_asserted)
531 macii_queue_poll();
532
533 if (current_req)
534 macii_start();
535 else
536 if (need_autopoll())
537 macii_autopoll(autopoll_devs);
538
539 if (macii_state == idle)
540 via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
541 break;
542
543 default:
544 break;
545 }
546
547 entered--;
548 return IRQ_HANDLED;
549 }
550