1 /*
2 * Mips Jazz DMA controller support
3 * Copyright (C) 1995, 1996 by Andreas Busse
4 *
5 * NOTE: Some of the argument checking could be removed when
6 * things have settled down. Also, instead of returning 0xffffffff
7 * on failure of vdma_alloc() one could leave page #0 unused
8 * and return the more usual NULL pointer as logical address.
9 */
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/mm.h>
14 #include <linux/bootmem.h>
15 #include <linux/spinlock.h>
16 #include <asm/mipsregs.h>
17 #include <asm/jazz.h>
18 #include <asm/io.h>
19 #include <asm/uaccess.h>
20 #include <asm/dma.h>
21 #include <asm/jazzdma.h>
22 #include <asm/pgtable.h>
23
24 /*
25 * Set this to one to enable additional vdma debug code.
26 */
27 #define CONF_DEBUG_VDMA 0
28
29 static spinlock_t jazz_dma_lock = SPIN_LOCK_UNLOCKED;
30
31 static unsigned long vdma_pagetable_start;
32
33 /*
34 * Debug stuff
35 */
36 #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
37
38 static int debuglvl = 3;
39
40 /*
41 * Initialize the pagetable with a one-to-one mapping of
42 * the first 16 Mbytes of main memory and declare all
43 * entries to be unused. Using this method will at least
44 * allow some early device driver operations to work.
45 */
vdma_pgtbl_init(void)46 static inline void vdma_pgtbl_init(void)
47 {
48 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
49 unsigned long paddr = 0;
50 int i;
51
52 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
53 pgtbl[i].frame = paddr;
54 pgtbl[i].owner = VDMA_PAGE_EMPTY;
55 paddr += VDMA_PAGESIZE;
56 }
57 }
58
59 /*
60 * Initialize the Jazz R4030 dma controller
61 */
vdma_init(void)62 void __init vdma_init(void)
63 {
64 /*
65 * Allocate 32k of memory for DMA page tables. This needs to be page
66 * aligned and should be uncached to avoid cache flushing after every
67 * update.
68 */
69 vdma_pagetable_start = alloc_bootmem_low_pages(VDMA_PGTBL_SIZE);
70 if (!vdma_pagetable_start)
71 BUG();
72 dma_cache_wback_inv(vdma_pagetable_start, VDMA_PGTBL_SIZE);
73 vdma_pagetable_start = KSEG1ADDR(vdma_pagetable_start);
74
75 /*
76 * Clear the R4030 translation table
77 */
78 vdma_pgtbl_init();
79
80 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
81 PHYSADDR(vdma_pagetable_start));
82 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
83 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
84
85 printk("VDMA: R4030 DMA pagetables initialized.\n");
86 }
87
88 /*
89 * Allocate DMA pagetables using a simple first-fit algorithm
90 */
vdma_alloc(unsigned long paddr,unsigned long size)91 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
92 {
93 VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
94 int first, last, pages, frame, i;
95 unsigned long laddr, flags;
96
97 /* check arguments */
98
99 if (paddr > 0x1fffffff) {
100 if (vdma_debug)
101 printk("vdma_alloc: Invalid physical address: %08lx\n",
102 paddr);
103 return VDMA_ERROR; /* invalid physical address */
104 }
105 if (size > 0x400000 || size == 0) {
106 if (vdma_debug)
107 printk("vdma_alloc: Invalid size: %08lx\n", size);
108 return VDMA_ERROR; /* invalid physical address */
109 }
110
111 spin_lock_irqsave(&jazz_dma_lock, flags);
112
113 /*
114 * Find free chunk
115 */
116 pages = (size + 4095) >> 12; /* no. of pages to allocate */
117 first = 0;
118 while (1) {
119 while (entry[first].owner != VDMA_PAGE_EMPTY &&
120 first < VDMA_PGTBL_ENTRIES) first++;
121 if (first + pages > VDMA_PGTBL_ENTRIES) {
122 /* nothing free */
123 spin_unlock_irqrestore(&jazz_dma_lock, flags);
124 return VDMA_ERROR;
125 }
126
127 last = first + 1;
128 while (entry[last].owner == VDMA_PAGE_EMPTY
129 && last - first < pages)
130 last++;
131
132 if (last - first == pages)
133 break; /* found */
134 }
135
136 /*
137 * Mark pages as allocated
138 */
139 laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
140 frame = paddr & ~(VDMA_PAGESIZE - 1);
141
142 for (i = first; i < last; i++) {
143 entry[i].frame = frame;
144 entry[i].owner = laddr;
145 frame += VDMA_PAGESIZE;
146 }
147
148 /*
149 * Update translation table and return logical start address
150 */
151 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
152
153 if (vdma_debug > 1)
154 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
155 pages, laddr);
156
157 if (vdma_debug > 2) {
158 printk("LADDR: ");
159 for (i = first; i < last; i++)
160 printk("%08x ", i << 12);
161 printk("\nPADDR: ");
162 for (i = first; i < last; i++)
163 printk("%08x ", entry[i].frame);
164 printk("\nOWNER: ");
165 for (i = first; i < last; i++)
166 printk("%08x ", entry[i].owner);
167 printk("\n");
168 }
169
170 spin_unlock_irqrestore(&jazz_dma_lock, flags);
171
172 return laddr;
173 }
174
175 /*
176 * Free previously allocated dma translation pages
177 * Note that this does NOT change the translation table,
178 * it just marks the free'd pages as unused!
179 */
vdma_free(unsigned long laddr)180 int vdma_free(unsigned long laddr)
181 {
182 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
183 int i;
184
185 i = laddr >> 12;
186
187 if (pgtbl[i].owner != laddr) {
188 printk
189 ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
190 laddr);
191 return -1;
192 }
193
194 while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) {
195 pgtbl[i].owner = VDMA_PAGE_EMPTY;
196 i++;
197 }
198
199 if (vdma_debug > 1)
200 printk("vdma_free: freed %ld pages starting from %08lx\n",
201 i - (laddr >> 12), laddr);
202
203 return 0;
204 }
205
206 /*
207 * Map certain page(s) to another physical address.
208 * Caller must have allocated the page(s) before.
209 */
vdma_remap(unsigned long laddr,unsigned long paddr,unsigned long size)210 int vdma_remap(unsigned long laddr, unsigned long paddr,
211 unsigned long size)
212 {
213 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
214 int first, pages, npages;
215
216 if (laddr > 0xffffff) {
217 if (vdma_debug)
218 printk("vdma_map: Invalid logical address: %08lx\n",
219 laddr);
220 return -EINVAL; /* invalid logical address */
221 }
222 if (paddr > 0x1fffffff) {
223 if (vdma_debug)
224 printk("vdma_map: Invalid physical address: %08lx\n",
225 paddr);
226 return -EINVAL; /* invalid physical address */
227 }
228
229 npages = pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
230 first = laddr >> 12;
231 if (vdma_debug)
232 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
233 if (first + pages > VDMA_PGTBL_ENTRIES) {
234 if (vdma_debug)
235 printk("vdma_alloc: Invalid size: %08lx\n", size);
236 return -EINVAL;
237 }
238
239 paddr &= ~(VDMA_PAGESIZE - 1);
240 while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
241 if (pgtbl[first].owner != laddr) {
242 if (vdma_debug)
243 printk("Trying to remap other's pages.\n");
244 return -EPERM; /* not owner */
245 }
246 pgtbl[first].frame = paddr;
247 paddr += VDMA_PAGESIZE;
248 first++;
249 pages--;
250 }
251
252 /*
253 * Update translation table
254 */
255 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
256
257 if (vdma_debug > 2) {
258 int i;
259 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
260 first = laddr >> 12;
261 printk("LADDR: ");
262 for (i = first; i < first + pages; i++)
263 printk("%08x ", i << 12);
264 printk("\nPADDR: ");
265 for (i = first; i < first + pages; i++)
266 printk("%08x ", pgtbl[i].frame);
267 printk("\nOWNER: ");
268 for (i = first; i < first + pages; i++)
269 printk("%08x ", pgtbl[i].owner);
270 printk("\n");
271 }
272
273 return 0;
274 }
275
276 /*
277 * Translate a physical address to a logical address.
278 * This will return the logical address of the first
279 * match.
280 */
vdma_phys2log(unsigned long paddr)281 unsigned long vdma_phys2log(unsigned long paddr)
282 {
283 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
284 int frame, i;
285
286 frame = paddr & ~(VDMA_PAGESIZE - 1);
287
288 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
289 if (pgtbl[i].frame == frame)
290 break;
291 }
292
293 if (i == VDMA_PGTBL_ENTRIES)
294 return ~0UL;
295
296 return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
297 }
298
299 /*
300 * Translate a logical DMA address to a physical address
301 */
vdma_log2phys(unsigned long laddr)302 unsigned long vdma_log2phys(unsigned long laddr)
303 {
304 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
305
306 return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
307 }
308
309 /*
310 * Print DMA statistics
311 */
vdma_stats(void)312 void vdma_stats(void)
313 {
314 int i;
315
316 printk("vdma_stats: CONFIG: %08x\n",
317 r4030_read_reg32(JAZZ_R4030_CONFIG));
318 printk("R4030 translation table base: %08x\n",
319 r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
320 printk("R4030 translation table limit: %08x\n",
321 r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
322 printk("vdma_stats: INV_ADDR: %08x\n",
323 r4030_read_reg32(JAZZ_R4030_INV_ADDR));
324 printk("vdma_stats: R_FAIL_ADDR: %08x\n",
325 r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
326 printk("vdma_stats: M_FAIL_ADDR: %08x\n",
327 r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
328 printk("vdma_stats: IRQ_SOURCE: %08x\n",
329 r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
330 printk("vdma_stats: I386_ERROR: %08x\n",
331 r4030_read_reg32(JAZZ_R4030_I386_ERROR));
332 printk("vdma_chnl_modes: ");
333 for (i = 0; i < 8; i++)
334 printk("%04x ",
335 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
336 (i << 5)));
337 printk("\n");
338 printk("vdma_chnl_enables: ");
339 for (i = 0; i < 8; i++)
340 printk("%04x ", r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
341 (i << 5)));
342 printk("\n");
343 }
344
345 /*
346 * DMA transfer functions
347 */
348
349 /*
350 * Enable a DMA channel. Also clear any error conditions.
351 */
vdma_enable(int channel)352 void vdma_enable(int channel)
353 {
354 int status;
355
356 if (vdma_debug)
357 printk("vdma_enable: channel %d\n", channel);
358
359 /*
360 * Check error conditions first
361 */
362 status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
363 if (status & 0x400)
364 printk("VDMA: Channel %d: Address error!\n", channel);
365 if (status & 0x200)
366 printk("VDMA: Channel %d: Memory error!\n", channel);
367
368 /*
369 * Clear all interrupt flags
370 */
371 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
372 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
373 (channel << 5)) | R4030_TC_INTR
374 | R4030_MEM_INTR | R4030_ADDR_INTR);
375
376 /*
377 * Enable the desired channel
378 */
379 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
380 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
381 (channel << 5)) |
382 R4030_CHNL_ENABLE);
383 }
384
385 /*
386 * Disable a DMA channel
387 */
vdma_disable(int channel)388 void vdma_disable(int channel)
389 {
390 if (vdma_debug) {
391 int status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
392 (channel << 5));
393
394 printk("vdma_disable: channel %d\n", channel);
395 printk("VDMA: channel %d status: %04x (%s) mode: "
396 "%02x addr: %06x count: %06x\n",
397 channel, status,
398 ((status & 0x600) ? "ERROR" : "OK"),
399 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
400 (channel << 5)),
401 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
402 (channel << 5)),
403 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
404 (channel << 5)));
405 }
406
407 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
408 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
409 (channel << 5)) &
410 ~R4030_CHNL_ENABLE);
411
412 /*
413 * After disabling a DMA channel a remote bus register should be
414 * read to ensure that the current DMA acknowledge cycle is completed.
415 */
416 *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
417 }
418
419 /*
420 * Set DMA mode. This function accepts the mode values used
421 * to set a PC-style DMA controller. For the SCSI and FDC
422 * channels, we also set the default modes each time we're
423 * called.
424 * NOTE: The FAST and BURST dma modes are supported by the
425 * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
426 * for now.
427 */
vdma_set_mode(int channel,int mode)428 void vdma_set_mode(int channel, int mode)
429 {
430 if (vdma_debug)
431 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
432 mode);
433
434 switch (channel) {
435 case JAZZ_SCSI_DMA: /* scsi */
436 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
437 /* R4030_MODE_FAST | */
438 /* R4030_MODE_BURST | */
439 R4030_MODE_INTR_EN |
440 R4030_MODE_WIDTH_16 |
441 R4030_MODE_ATIME_80);
442 break;
443
444 case JAZZ_FLOPPY_DMA: /* floppy */
445 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
446 /* R4030_MODE_FAST | */
447 /* R4030_MODE_BURST | */
448 R4030_MODE_INTR_EN |
449 R4030_MODE_WIDTH_8 |
450 R4030_MODE_ATIME_120);
451 break;
452
453 case JAZZ_AUDIOL_DMA:
454 case JAZZ_AUDIOR_DMA:
455 printk("VDMA: Audio DMA not supported yet.\n");
456 break;
457
458 default:
459 printk
460 ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
461 channel);
462 }
463
464 switch (mode) {
465 case DMA_MODE_READ:
466 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
467 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
468 (channel << 5)) &
469 ~R4030_CHNL_WRITE);
470 break;
471
472 case DMA_MODE_WRITE:
473 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
474 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
475 (channel << 5)) |
476 R4030_CHNL_WRITE);
477 break;
478
479 default:
480 printk
481 ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
482 mode);
483 }
484 }
485
486 /*
487 * Set Transfer Address
488 */
vdma_set_addr(int channel,long addr)489 void vdma_set_addr(int channel, long addr)
490 {
491 if (vdma_debug)
492 printk("vdma_set_addr: channel %d, addr %lx\n", channel,
493 addr);
494
495 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
496 }
497
498 /*
499 * Set Transfer Count
500 */
vdma_set_count(int channel,int count)501 void vdma_set_count(int channel, int count)
502 {
503 if (vdma_debug)
504 printk("vdma_set_count: channel %d, count %08x\n", channel,
505 (unsigned) count);
506
507 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
508 }
509
510 /*
511 * Get Residual
512 */
vdma_get_residue(int channel)513 int vdma_get_residue(int channel)
514 {
515 int residual;
516
517 residual =
518 r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
519
520 if (vdma_debug)
521 printk("vdma_get_residual: channel %d: residual=%d\n",
522 channel, residual);
523
524 return residual;
525 }
526
527 /*
528 * Get DMA channel enable register
529 */
vdma_get_enable(int channel)530 int vdma_get_enable(int channel)
531 {
532 int enable;
533
534 enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
535
536 if (vdma_debug)
537 printk("vdma_get_enable: channel %d: enable=%d\n", channel,
538 enable);
539
540 return enable;
541 }
542