1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /*
3 * Copyright (c) 2018, Mellanox Technologies inc. All rights reserved.
4 */
5
6 #include <rdma/ib_user_verbs.h>
7 #include <rdma/ib_verbs.h>
8 #include <rdma/uverbs_types.h>
9 #include <rdma/uverbs_ioctl.h>
10 #include <rdma/mlx5_user_ioctl_cmds.h>
11 #include <rdma/mlx5_user_ioctl_verbs.h>
12 #include <rdma/ib_umem.h>
13 #include <rdma/uverbs_std_types.h>
14 #include <linux/mlx5/driver.h>
15 #include <linux/mlx5/fs.h>
16 #include "mlx5_ib.h"
17 #include "devx.h"
18 #include "qp.h"
19 #include <linux/xarray.h>
20
21 #define UVERBS_MODULE_NAME mlx5_ib
22 #include <rdma/uverbs_named_ioctl.h>
23
24 static void dispatch_event_fd(struct list_head *fd_list, const void *data);
25
26 enum devx_obj_flags {
27 DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0,
28 DEVX_OBJ_FLAGS_DCT = 1 << 1,
29 DEVX_OBJ_FLAGS_CQ = 1 << 2,
30 };
31
32 struct devx_async_data {
33 struct mlx5_ib_dev *mdev;
34 struct list_head list;
35 struct devx_async_cmd_event_file *ev_file;
36 struct mlx5_async_work cb_work;
37 u16 cmd_out_len;
38 /* must be last field in this structure */
39 struct mlx5_ib_uapi_devx_async_cmd_hdr hdr;
40 };
41
42 struct devx_async_event_data {
43 struct list_head list; /* headed in ev_file->event_list */
44 struct mlx5_ib_uapi_devx_async_event_hdr hdr;
45 };
46
47 /* first level XA value data structure */
48 struct devx_event {
49 struct xarray object_ids; /* second XA level, Key = object id */
50 struct list_head unaffiliated_list;
51 };
52
53 /* second level XA value data structure */
54 struct devx_obj_event {
55 struct rcu_head rcu;
56 struct list_head obj_sub_list;
57 };
58
59 struct devx_event_subscription {
60 struct list_head file_list; /* headed in ev_file->
61 * subscribed_events_list
62 */
63 struct list_head xa_list; /* headed in devx_event->unaffiliated_list or
64 * devx_obj_event->obj_sub_list
65 */
66 struct list_head obj_list; /* headed in devx_object */
67 struct list_head event_list; /* headed in ev_file->event_list or in
68 * temp list via subscription
69 */
70
71 u8 is_cleaned:1;
72 u32 xa_key_level1;
73 u32 xa_key_level2;
74 struct rcu_head rcu;
75 u64 cookie;
76 struct devx_async_event_file *ev_file;
77 struct eventfd_ctx *eventfd;
78 };
79
80 struct devx_async_event_file {
81 struct ib_uobject uobj;
82 /* Head of events that are subscribed to this FD */
83 struct list_head subscribed_events_list;
84 spinlock_t lock;
85 wait_queue_head_t poll_wait;
86 struct list_head event_list;
87 struct mlx5_ib_dev *dev;
88 u8 omit_data:1;
89 u8 is_overflow_err:1;
90 u8 is_destroyed:1;
91 };
92
93 struct devx_umem {
94 struct mlx5_core_dev *mdev;
95 struct ib_umem *umem;
96 u32 dinlen;
97 u32 dinbox[MLX5_ST_SZ_DW(destroy_umem_in)];
98 };
99
100 struct devx_umem_reg_cmd {
101 void *in;
102 u32 inlen;
103 u32 out[MLX5_ST_SZ_DW(create_umem_out)];
104 };
105
106 static struct mlx5_ib_ucontext *
devx_ufile2uctx(const struct uverbs_attr_bundle * attrs)107 devx_ufile2uctx(const struct uverbs_attr_bundle *attrs)
108 {
109 return to_mucontext(ib_uverbs_get_ucontext(attrs));
110 }
111
mlx5_ib_devx_create(struct mlx5_ib_dev * dev,bool is_user)112 int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user)
113 {
114 u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {};
115 u32 out[MLX5_ST_SZ_DW(create_uctx_out)] = {};
116 void *uctx;
117 int err;
118 u16 uid;
119 u32 cap = 0;
120
121 /* 0 means not supported */
122 if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
123 return -EINVAL;
124
125 uctx = MLX5_ADDR_OF(create_uctx_in, in, uctx);
126 if (is_user && capable(CAP_NET_RAW) &&
127 (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
128 cap |= MLX5_UCTX_CAP_RAW_TX;
129 if (is_user && capable(CAP_SYS_RAWIO) &&
130 (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
131 MLX5_UCTX_CAP_INTERNAL_DEV_RES))
132 cap |= MLX5_UCTX_CAP_INTERNAL_DEV_RES;
133
134 MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
135 MLX5_SET(uctx, uctx, cap, cap);
136
137 err = mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
138 if (err)
139 return err;
140
141 uid = MLX5_GET(create_uctx_out, out, uid);
142 return uid;
143 }
144
mlx5_ib_devx_destroy(struct mlx5_ib_dev * dev,u16 uid)145 void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid)
146 {
147 u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {};
148 u32 out[MLX5_ST_SZ_DW(destroy_uctx_out)] = {};
149
150 MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
151 MLX5_SET(destroy_uctx_in, in, uid, uid);
152
153 mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
154 }
155
is_legacy_unaffiliated_event_num(u16 event_num)156 static bool is_legacy_unaffiliated_event_num(u16 event_num)
157 {
158 switch (event_num) {
159 case MLX5_EVENT_TYPE_PORT_CHANGE:
160 return true;
161 default:
162 return false;
163 }
164 }
165
is_legacy_obj_event_num(u16 event_num)166 static bool is_legacy_obj_event_num(u16 event_num)
167 {
168 switch (event_num) {
169 case MLX5_EVENT_TYPE_PATH_MIG:
170 case MLX5_EVENT_TYPE_COMM_EST:
171 case MLX5_EVENT_TYPE_SQ_DRAINED:
172 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
173 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
174 case MLX5_EVENT_TYPE_CQ_ERROR:
175 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
176 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
177 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
178 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
179 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
180 case MLX5_EVENT_TYPE_DCT_DRAINED:
181 case MLX5_EVENT_TYPE_COMP:
182 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
183 case MLX5_EVENT_TYPE_XRQ_ERROR:
184 return true;
185 default:
186 return false;
187 }
188 }
189
get_legacy_obj_type(u16 opcode)190 static u16 get_legacy_obj_type(u16 opcode)
191 {
192 switch (opcode) {
193 case MLX5_CMD_OP_CREATE_RQ:
194 return MLX5_EVENT_QUEUE_TYPE_RQ;
195 case MLX5_CMD_OP_CREATE_QP:
196 return MLX5_EVENT_QUEUE_TYPE_QP;
197 case MLX5_CMD_OP_CREATE_SQ:
198 return MLX5_EVENT_QUEUE_TYPE_SQ;
199 case MLX5_CMD_OP_CREATE_DCT:
200 return MLX5_EVENT_QUEUE_TYPE_DCT;
201 default:
202 return 0;
203 }
204 }
205
get_dec_obj_type(struct devx_obj * obj,u16 event_num)206 static u16 get_dec_obj_type(struct devx_obj *obj, u16 event_num)
207 {
208 u16 opcode;
209
210 opcode = (obj->obj_id >> 32) & 0xffff;
211
212 if (is_legacy_obj_event_num(event_num))
213 return get_legacy_obj_type(opcode);
214
215 switch (opcode) {
216 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
217 return (obj->obj_id >> 48);
218 case MLX5_CMD_OP_CREATE_RQ:
219 return MLX5_OBJ_TYPE_RQ;
220 case MLX5_CMD_OP_CREATE_QP:
221 return MLX5_OBJ_TYPE_QP;
222 case MLX5_CMD_OP_CREATE_SQ:
223 return MLX5_OBJ_TYPE_SQ;
224 case MLX5_CMD_OP_CREATE_DCT:
225 return MLX5_OBJ_TYPE_DCT;
226 case MLX5_CMD_OP_CREATE_TIR:
227 return MLX5_OBJ_TYPE_TIR;
228 case MLX5_CMD_OP_CREATE_TIS:
229 return MLX5_OBJ_TYPE_TIS;
230 case MLX5_CMD_OP_CREATE_PSV:
231 return MLX5_OBJ_TYPE_PSV;
232 case MLX5_OBJ_TYPE_MKEY:
233 return MLX5_OBJ_TYPE_MKEY;
234 case MLX5_CMD_OP_CREATE_RMP:
235 return MLX5_OBJ_TYPE_RMP;
236 case MLX5_CMD_OP_CREATE_XRC_SRQ:
237 return MLX5_OBJ_TYPE_XRC_SRQ;
238 case MLX5_CMD_OP_CREATE_XRQ:
239 return MLX5_OBJ_TYPE_XRQ;
240 case MLX5_CMD_OP_CREATE_RQT:
241 return MLX5_OBJ_TYPE_RQT;
242 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
243 return MLX5_OBJ_TYPE_FLOW_COUNTER;
244 case MLX5_CMD_OP_CREATE_CQ:
245 return MLX5_OBJ_TYPE_CQ;
246 default:
247 return 0;
248 }
249 }
250
get_event_obj_type(unsigned long event_type,struct mlx5_eqe * eqe)251 static u16 get_event_obj_type(unsigned long event_type, struct mlx5_eqe *eqe)
252 {
253 switch (event_type) {
254 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
255 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
256 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
257 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
258 case MLX5_EVENT_TYPE_PATH_MIG:
259 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
260 case MLX5_EVENT_TYPE_COMM_EST:
261 case MLX5_EVENT_TYPE_SQ_DRAINED:
262 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
263 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
264 return eqe->data.qp_srq.type;
265 case MLX5_EVENT_TYPE_CQ_ERROR:
266 case MLX5_EVENT_TYPE_XRQ_ERROR:
267 return 0;
268 case MLX5_EVENT_TYPE_DCT_DRAINED:
269 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
270 return MLX5_EVENT_QUEUE_TYPE_DCT;
271 default:
272 return MLX5_GET(affiliated_event_header, &eqe->data, obj_type);
273 }
274 }
275
get_dec_obj_id(u64 obj_id)276 static u32 get_dec_obj_id(u64 obj_id)
277 {
278 return (obj_id & 0xffffffff);
279 }
280
281 /*
282 * As the obj_id in the firmware is not globally unique the object type
283 * must be considered upon checking for a valid object id.
284 * For that the opcode of the creator command is encoded as part of the obj_id.
285 */
get_enc_obj_id(u32 opcode,u32 obj_id)286 static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
287 {
288 return ((u64)opcode << 32) | obj_id;
289 }
290
devx_get_created_obj_id(const void * in,const void * out,u16 opcode)291 static u32 devx_get_created_obj_id(const void *in, const void *out, u16 opcode)
292 {
293 switch (opcode) {
294 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
295 return MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
296 case MLX5_CMD_OP_CREATE_UMEM:
297 return MLX5_GET(create_umem_out, out, umem_id);
298 case MLX5_CMD_OP_CREATE_MKEY:
299 return MLX5_GET(create_mkey_out, out, mkey_index);
300 case MLX5_CMD_OP_CREATE_CQ:
301 return MLX5_GET(create_cq_out, out, cqn);
302 case MLX5_CMD_OP_ALLOC_PD:
303 return MLX5_GET(alloc_pd_out, out, pd);
304 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
305 return MLX5_GET(alloc_transport_domain_out, out,
306 transport_domain);
307 case MLX5_CMD_OP_CREATE_RMP:
308 return MLX5_GET(create_rmp_out, out, rmpn);
309 case MLX5_CMD_OP_CREATE_SQ:
310 return MLX5_GET(create_sq_out, out, sqn);
311 case MLX5_CMD_OP_CREATE_RQ:
312 return MLX5_GET(create_rq_out, out, rqn);
313 case MLX5_CMD_OP_CREATE_RQT:
314 return MLX5_GET(create_rqt_out, out, rqtn);
315 case MLX5_CMD_OP_CREATE_TIR:
316 return MLX5_GET(create_tir_out, out, tirn);
317 case MLX5_CMD_OP_CREATE_TIS:
318 return MLX5_GET(create_tis_out, out, tisn);
319 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
320 return MLX5_GET(alloc_q_counter_out, out, counter_set_id);
321 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
322 return MLX5_GET(create_flow_table_out, out, table_id);
323 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
324 return MLX5_GET(create_flow_group_out, out, group_id);
325 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
326 return MLX5_GET(set_fte_in, in, flow_index);
327 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
328 return MLX5_GET(alloc_flow_counter_out, out, flow_counter_id);
329 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
330 return MLX5_GET(alloc_packet_reformat_context_out, out,
331 packet_reformat_id);
332 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
333 return MLX5_GET(alloc_modify_header_context_out, out,
334 modify_header_id);
335 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
336 return MLX5_GET(create_scheduling_element_out, out,
337 scheduling_element_id);
338 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
339 return MLX5_GET(add_vxlan_udp_dport_in, in, vxlan_udp_port);
340 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
341 return MLX5_GET(set_l2_table_entry_in, in, table_index);
342 case MLX5_CMD_OP_CREATE_QP:
343 return MLX5_GET(create_qp_out, out, qpn);
344 case MLX5_CMD_OP_CREATE_SRQ:
345 return MLX5_GET(create_srq_out, out, srqn);
346 case MLX5_CMD_OP_CREATE_XRC_SRQ:
347 return MLX5_GET(create_xrc_srq_out, out, xrc_srqn);
348 case MLX5_CMD_OP_CREATE_DCT:
349 return MLX5_GET(create_dct_out, out, dctn);
350 case MLX5_CMD_OP_CREATE_XRQ:
351 return MLX5_GET(create_xrq_out, out, xrqn);
352 case MLX5_CMD_OP_ATTACH_TO_MCG:
353 return MLX5_GET(attach_to_mcg_in, in, qpn);
354 case MLX5_CMD_OP_ALLOC_XRCD:
355 return MLX5_GET(alloc_xrcd_out, out, xrcd);
356 case MLX5_CMD_OP_CREATE_PSV:
357 return MLX5_GET(create_psv_out, out, psv0_index);
358 default:
359 /* The entry must match to one of the devx_is_obj_create_cmd */
360 WARN_ON(true);
361 return 0;
362 }
363 }
364
devx_get_obj_id(const void * in)365 static u64 devx_get_obj_id(const void *in)
366 {
367 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
368 u64 obj_id;
369
370 switch (opcode) {
371 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
372 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
373 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_GENERAL_OBJECT |
374 MLX5_GET(general_obj_in_cmd_hdr, in,
375 obj_type) << 16,
376 MLX5_GET(general_obj_in_cmd_hdr, in,
377 obj_id));
378 break;
379 case MLX5_CMD_OP_QUERY_MKEY:
380 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_MKEY,
381 MLX5_GET(query_mkey_in, in,
382 mkey_index));
383 break;
384 case MLX5_CMD_OP_QUERY_CQ:
385 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
386 MLX5_GET(query_cq_in, in, cqn));
387 break;
388 case MLX5_CMD_OP_MODIFY_CQ:
389 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
390 MLX5_GET(modify_cq_in, in, cqn));
391 break;
392 case MLX5_CMD_OP_QUERY_SQ:
393 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
394 MLX5_GET(query_sq_in, in, sqn));
395 break;
396 case MLX5_CMD_OP_MODIFY_SQ:
397 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
398 MLX5_GET(modify_sq_in, in, sqn));
399 break;
400 case MLX5_CMD_OP_QUERY_RQ:
401 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
402 MLX5_GET(query_rq_in, in, rqn));
403 break;
404 case MLX5_CMD_OP_MODIFY_RQ:
405 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
406 MLX5_GET(modify_rq_in, in, rqn));
407 break;
408 case MLX5_CMD_OP_QUERY_RMP:
409 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
410 MLX5_GET(query_rmp_in, in, rmpn));
411 break;
412 case MLX5_CMD_OP_MODIFY_RMP:
413 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
414 MLX5_GET(modify_rmp_in, in, rmpn));
415 break;
416 case MLX5_CMD_OP_QUERY_RQT:
417 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
418 MLX5_GET(query_rqt_in, in, rqtn));
419 break;
420 case MLX5_CMD_OP_MODIFY_RQT:
421 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
422 MLX5_GET(modify_rqt_in, in, rqtn));
423 break;
424 case MLX5_CMD_OP_QUERY_TIR:
425 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
426 MLX5_GET(query_tir_in, in, tirn));
427 break;
428 case MLX5_CMD_OP_MODIFY_TIR:
429 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
430 MLX5_GET(modify_tir_in, in, tirn));
431 break;
432 case MLX5_CMD_OP_QUERY_TIS:
433 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
434 MLX5_GET(query_tis_in, in, tisn));
435 break;
436 case MLX5_CMD_OP_MODIFY_TIS:
437 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
438 MLX5_GET(modify_tis_in, in, tisn));
439 break;
440 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
441 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
442 MLX5_GET(query_flow_table_in, in,
443 table_id));
444 break;
445 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
446 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
447 MLX5_GET(modify_flow_table_in, in,
448 table_id));
449 break;
450 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
451 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_GROUP,
452 MLX5_GET(query_flow_group_in, in,
453 group_id));
454 break;
455 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
456 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
457 MLX5_GET(query_fte_in, in,
458 flow_index));
459 break;
460 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
461 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
462 MLX5_GET(set_fte_in, in, flow_index));
463 break;
464 case MLX5_CMD_OP_QUERY_Q_COUNTER:
465 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_Q_COUNTER,
466 MLX5_GET(query_q_counter_in, in,
467 counter_set_id));
468 break;
469 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
470 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_FLOW_COUNTER,
471 MLX5_GET(query_flow_counter_in, in,
472 flow_counter_id));
473 break;
474 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
475 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT,
476 MLX5_GET(query_modify_header_context_in,
477 in, modify_header_id));
478 break;
479 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
480 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
481 MLX5_GET(query_scheduling_element_in,
482 in, scheduling_element_id));
483 break;
484 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
485 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
486 MLX5_GET(modify_scheduling_element_in,
487 in, scheduling_element_id));
488 break;
489 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
490 obj_id = get_enc_obj_id(MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT,
491 MLX5_GET(add_vxlan_udp_dport_in, in,
492 vxlan_udp_port));
493 break;
494 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
495 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
496 MLX5_GET(query_l2_table_entry_in, in,
497 table_index));
498 break;
499 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
500 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
501 MLX5_GET(set_l2_table_entry_in, in,
502 table_index));
503 break;
504 case MLX5_CMD_OP_QUERY_QP:
505 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
506 MLX5_GET(query_qp_in, in, qpn));
507 break;
508 case MLX5_CMD_OP_RST2INIT_QP:
509 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
510 MLX5_GET(rst2init_qp_in, in, qpn));
511 break;
512 case MLX5_CMD_OP_INIT2INIT_QP:
513 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
514 MLX5_GET(init2init_qp_in, in, qpn));
515 break;
516 case MLX5_CMD_OP_INIT2RTR_QP:
517 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
518 MLX5_GET(init2rtr_qp_in, in, qpn));
519 break;
520 case MLX5_CMD_OP_RTR2RTS_QP:
521 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
522 MLX5_GET(rtr2rts_qp_in, in, qpn));
523 break;
524 case MLX5_CMD_OP_RTS2RTS_QP:
525 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
526 MLX5_GET(rts2rts_qp_in, in, qpn));
527 break;
528 case MLX5_CMD_OP_SQERR2RTS_QP:
529 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
530 MLX5_GET(sqerr2rts_qp_in, in, qpn));
531 break;
532 case MLX5_CMD_OP_2ERR_QP:
533 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
534 MLX5_GET(qp_2err_in, in, qpn));
535 break;
536 case MLX5_CMD_OP_2RST_QP:
537 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
538 MLX5_GET(qp_2rst_in, in, qpn));
539 break;
540 case MLX5_CMD_OP_QUERY_DCT:
541 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
542 MLX5_GET(query_dct_in, in, dctn));
543 break;
544 case MLX5_CMD_OP_QUERY_XRQ:
545 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
546 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
547 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
548 MLX5_GET(query_xrq_in, in, xrqn));
549 break;
550 case MLX5_CMD_OP_QUERY_XRC_SRQ:
551 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
552 MLX5_GET(query_xrc_srq_in, in,
553 xrc_srqn));
554 break;
555 case MLX5_CMD_OP_ARM_XRC_SRQ:
556 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
557 MLX5_GET(arm_xrc_srq_in, in, xrc_srqn));
558 break;
559 case MLX5_CMD_OP_QUERY_SRQ:
560 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SRQ,
561 MLX5_GET(query_srq_in, in, srqn));
562 break;
563 case MLX5_CMD_OP_ARM_RQ:
564 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
565 MLX5_GET(arm_rq_in, in, srq_number));
566 break;
567 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
568 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
569 MLX5_GET(drain_dct_in, in, dctn));
570 break;
571 case MLX5_CMD_OP_ARM_XRQ:
572 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
573 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
574 case MLX5_CMD_OP_MODIFY_XRQ:
575 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
576 MLX5_GET(arm_xrq_in, in, xrqn));
577 break;
578 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
579 obj_id = get_enc_obj_id
580 (MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT,
581 MLX5_GET(query_packet_reformat_context_in,
582 in, packet_reformat_id));
583 break;
584 default:
585 obj_id = 0;
586 }
587
588 return obj_id;
589 }
590
devx_is_valid_obj_id(struct uverbs_attr_bundle * attrs,struct ib_uobject * uobj,const void * in)591 static bool devx_is_valid_obj_id(struct uverbs_attr_bundle *attrs,
592 struct ib_uobject *uobj, const void *in)
593 {
594 struct mlx5_ib_dev *dev = mlx5_udata_to_mdev(&attrs->driver_udata);
595 u64 obj_id = devx_get_obj_id(in);
596
597 if (!obj_id)
598 return false;
599
600 switch (uobj_get_object_id(uobj)) {
601 case UVERBS_OBJECT_CQ:
602 return get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
603 to_mcq(uobj->object)->mcq.cqn) ==
604 obj_id;
605
606 case UVERBS_OBJECT_SRQ:
607 {
608 struct mlx5_core_srq *srq = &(to_msrq(uobj->object)->msrq);
609 u16 opcode;
610
611 switch (srq->common.res) {
612 case MLX5_RES_XSRQ:
613 opcode = MLX5_CMD_OP_CREATE_XRC_SRQ;
614 break;
615 case MLX5_RES_XRQ:
616 opcode = MLX5_CMD_OP_CREATE_XRQ;
617 break;
618 default:
619 if (!dev->mdev->issi)
620 opcode = MLX5_CMD_OP_CREATE_SRQ;
621 else
622 opcode = MLX5_CMD_OP_CREATE_RMP;
623 }
624
625 return get_enc_obj_id(opcode,
626 to_msrq(uobj->object)->msrq.srqn) ==
627 obj_id;
628 }
629
630 case UVERBS_OBJECT_QP:
631 {
632 struct mlx5_ib_qp *qp = to_mqp(uobj->object);
633
634 if (qp->type == IB_QPT_RAW_PACKET ||
635 (qp->flags & IB_QP_CREATE_SOURCE_QPN)) {
636 struct mlx5_ib_raw_packet_qp *raw_packet_qp =
637 &qp->raw_packet_qp;
638 struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
639 struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
640
641 return (get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
642 rq->base.mqp.qpn) == obj_id ||
643 get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
644 sq->base.mqp.qpn) == obj_id ||
645 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
646 rq->tirn) == obj_id ||
647 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
648 sq->tisn) == obj_id);
649 }
650
651 if (qp->type == MLX5_IB_QPT_DCT)
652 return get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
653 qp->dct.mdct.mqp.qpn) == obj_id;
654 return get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
655 qp->ibqp.qp_num) == obj_id;
656 }
657
658 case UVERBS_OBJECT_WQ:
659 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
660 to_mrwq(uobj->object)->core_qp.qpn) ==
661 obj_id;
662
663 case UVERBS_OBJECT_RWQ_IND_TBL:
664 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
665 to_mrwq_ind_table(uobj->object)->rqtn) ==
666 obj_id;
667
668 case MLX5_IB_OBJECT_DEVX_OBJ:
669 return ((struct devx_obj *)uobj->object)->obj_id == obj_id;
670
671 default:
672 return false;
673 }
674 }
675
devx_set_umem_valid(const void * in)676 static void devx_set_umem_valid(const void *in)
677 {
678 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
679
680 switch (opcode) {
681 case MLX5_CMD_OP_CREATE_MKEY:
682 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
683 break;
684 case MLX5_CMD_OP_CREATE_CQ:
685 {
686 void *cqc;
687
688 MLX5_SET(create_cq_in, in, cq_umem_valid, 1);
689 cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);
690 MLX5_SET(cqc, cqc, dbr_umem_valid, 1);
691 break;
692 }
693 case MLX5_CMD_OP_CREATE_QP:
694 {
695 void *qpc;
696
697 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
698 MLX5_SET(qpc, qpc, dbr_umem_valid, 1);
699 MLX5_SET(create_qp_in, in, wq_umem_valid, 1);
700 break;
701 }
702
703 case MLX5_CMD_OP_CREATE_RQ:
704 {
705 void *rqc, *wq;
706
707 rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
708 wq = MLX5_ADDR_OF(rqc, rqc, wq);
709 MLX5_SET(wq, wq, dbr_umem_valid, 1);
710 MLX5_SET(wq, wq, wq_umem_valid, 1);
711 break;
712 }
713
714 case MLX5_CMD_OP_CREATE_SQ:
715 {
716 void *sqc, *wq;
717
718 sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
719 wq = MLX5_ADDR_OF(sqc, sqc, wq);
720 MLX5_SET(wq, wq, dbr_umem_valid, 1);
721 MLX5_SET(wq, wq, wq_umem_valid, 1);
722 break;
723 }
724
725 case MLX5_CMD_OP_MODIFY_CQ:
726 MLX5_SET(modify_cq_in, in, cq_umem_valid, 1);
727 break;
728
729 case MLX5_CMD_OP_CREATE_RMP:
730 {
731 void *rmpc, *wq;
732
733 rmpc = MLX5_ADDR_OF(create_rmp_in, in, ctx);
734 wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
735 MLX5_SET(wq, wq, dbr_umem_valid, 1);
736 MLX5_SET(wq, wq, wq_umem_valid, 1);
737 break;
738 }
739
740 case MLX5_CMD_OP_CREATE_XRQ:
741 {
742 void *xrqc, *wq;
743
744 xrqc = MLX5_ADDR_OF(create_xrq_in, in, xrq_context);
745 wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
746 MLX5_SET(wq, wq, dbr_umem_valid, 1);
747 MLX5_SET(wq, wq, wq_umem_valid, 1);
748 break;
749 }
750
751 case MLX5_CMD_OP_CREATE_XRC_SRQ:
752 {
753 void *xrc_srqc;
754
755 MLX5_SET(create_xrc_srq_in, in, xrc_srq_umem_valid, 1);
756 xrc_srqc = MLX5_ADDR_OF(create_xrc_srq_in, in,
757 xrc_srq_context_entry);
758 MLX5_SET(xrc_srqc, xrc_srqc, dbr_umem_valid, 1);
759 break;
760 }
761
762 default:
763 return;
764 }
765 }
766
devx_is_obj_create_cmd(const void * in,u16 * opcode)767 static bool devx_is_obj_create_cmd(const void *in, u16 *opcode)
768 {
769 *opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
770
771 switch (*opcode) {
772 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
773 case MLX5_CMD_OP_CREATE_MKEY:
774 case MLX5_CMD_OP_CREATE_CQ:
775 case MLX5_CMD_OP_ALLOC_PD:
776 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
777 case MLX5_CMD_OP_CREATE_RMP:
778 case MLX5_CMD_OP_CREATE_SQ:
779 case MLX5_CMD_OP_CREATE_RQ:
780 case MLX5_CMD_OP_CREATE_RQT:
781 case MLX5_CMD_OP_CREATE_TIR:
782 case MLX5_CMD_OP_CREATE_TIS:
783 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
784 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
785 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
786 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
787 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
788 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
789 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
790 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
791 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
792 case MLX5_CMD_OP_CREATE_QP:
793 case MLX5_CMD_OP_CREATE_SRQ:
794 case MLX5_CMD_OP_CREATE_XRC_SRQ:
795 case MLX5_CMD_OP_CREATE_DCT:
796 case MLX5_CMD_OP_CREATE_XRQ:
797 case MLX5_CMD_OP_ATTACH_TO_MCG:
798 case MLX5_CMD_OP_ALLOC_XRCD:
799 return true;
800 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
801 {
802 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
803 if (op_mod == 0)
804 return true;
805 return false;
806 }
807 case MLX5_CMD_OP_CREATE_PSV:
808 {
809 u8 num_psv = MLX5_GET(create_psv_in, in, num_psv);
810
811 if (num_psv == 1)
812 return true;
813 return false;
814 }
815 default:
816 return false;
817 }
818 }
819
devx_is_obj_modify_cmd(const void * in)820 static bool devx_is_obj_modify_cmd(const void *in)
821 {
822 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
823
824 switch (opcode) {
825 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
826 case MLX5_CMD_OP_MODIFY_CQ:
827 case MLX5_CMD_OP_MODIFY_RMP:
828 case MLX5_CMD_OP_MODIFY_SQ:
829 case MLX5_CMD_OP_MODIFY_RQ:
830 case MLX5_CMD_OP_MODIFY_RQT:
831 case MLX5_CMD_OP_MODIFY_TIR:
832 case MLX5_CMD_OP_MODIFY_TIS:
833 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
834 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
835 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
836 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
837 case MLX5_CMD_OP_RST2INIT_QP:
838 case MLX5_CMD_OP_INIT2RTR_QP:
839 case MLX5_CMD_OP_INIT2INIT_QP:
840 case MLX5_CMD_OP_RTR2RTS_QP:
841 case MLX5_CMD_OP_RTS2RTS_QP:
842 case MLX5_CMD_OP_SQERR2RTS_QP:
843 case MLX5_CMD_OP_2ERR_QP:
844 case MLX5_CMD_OP_2RST_QP:
845 case MLX5_CMD_OP_ARM_XRC_SRQ:
846 case MLX5_CMD_OP_ARM_RQ:
847 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
848 case MLX5_CMD_OP_ARM_XRQ:
849 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
850 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
851 case MLX5_CMD_OP_MODIFY_XRQ:
852 return true;
853 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
854 {
855 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
856
857 if (op_mod == 1)
858 return true;
859 return false;
860 }
861 default:
862 return false;
863 }
864 }
865
devx_is_obj_query_cmd(const void * in)866 static bool devx_is_obj_query_cmd(const void *in)
867 {
868 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
869
870 switch (opcode) {
871 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
872 case MLX5_CMD_OP_QUERY_MKEY:
873 case MLX5_CMD_OP_QUERY_CQ:
874 case MLX5_CMD_OP_QUERY_RMP:
875 case MLX5_CMD_OP_QUERY_SQ:
876 case MLX5_CMD_OP_QUERY_RQ:
877 case MLX5_CMD_OP_QUERY_RQT:
878 case MLX5_CMD_OP_QUERY_TIR:
879 case MLX5_CMD_OP_QUERY_TIS:
880 case MLX5_CMD_OP_QUERY_Q_COUNTER:
881 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
882 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
883 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
884 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
885 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
886 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
887 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
888 case MLX5_CMD_OP_QUERY_QP:
889 case MLX5_CMD_OP_QUERY_SRQ:
890 case MLX5_CMD_OP_QUERY_XRC_SRQ:
891 case MLX5_CMD_OP_QUERY_DCT:
892 case MLX5_CMD_OP_QUERY_XRQ:
893 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
894 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
895 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
896 return true;
897 default:
898 return false;
899 }
900 }
901
devx_is_whitelist_cmd(void * in)902 static bool devx_is_whitelist_cmd(void *in)
903 {
904 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
905
906 switch (opcode) {
907 case MLX5_CMD_OP_QUERY_HCA_CAP:
908 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
909 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
910 case MLX5_CMD_OP_QUERY_ESW_FUNCTIONS:
911 return true;
912 default:
913 return false;
914 }
915 }
916
devx_get_uid(struct mlx5_ib_ucontext * c,void * cmd_in)917 static int devx_get_uid(struct mlx5_ib_ucontext *c, void *cmd_in)
918 {
919 if (devx_is_whitelist_cmd(cmd_in)) {
920 struct mlx5_ib_dev *dev;
921
922 if (c->devx_uid)
923 return c->devx_uid;
924
925 dev = to_mdev(c->ibucontext.device);
926 if (dev->devx_whitelist_uid)
927 return dev->devx_whitelist_uid;
928
929 return -EOPNOTSUPP;
930 }
931
932 if (!c->devx_uid)
933 return -EINVAL;
934
935 return c->devx_uid;
936 }
937
devx_is_general_cmd(void * in,struct mlx5_ib_dev * dev)938 static bool devx_is_general_cmd(void *in, struct mlx5_ib_dev *dev)
939 {
940 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
941
942 /* Pass all cmds for vhca_tunnel as general, tracking is done in FW */
943 if ((MLX5_CAP_GEN_64(dev->mdev, vhca_tunnel_commands) &&
944 MLX5_GET(general_obj_in_cmd_hdr, in, vhca_tunnel_id)) ||
945 (opcode >= MLX5_CMD_OP_GENERAL_START &&
946 opcode < MLX5_CMD_OP_GENERAL_END))
947 return true;
948
949 switch (opcode) {
950 case MLX5_CMD_OP_QUERY_HCA_CAP:
951 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
952 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
953 case MLX5_CMD_OP_QUERY_VPORT_STATE:
954 case MLX5_CMD_OP_QUERY_ADAPTER:
955 case MLX5_CMD_OP_QUERY_ISSI:
956 case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
957 case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
958 case MLX5_CMD_OP_QUERY_VNIC_ENV:
959 case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
960 case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
961 case MLX5_CMD_OP_NOP:
962 case MLX5_CMD_OP_QUERY_CONG_STATUS:
963 case MLX5_CMD_OP_QUERY_CONG_PARAMS:
964 case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
965 case MLX5_CMD_OP_QUERY_LAG:
966 case MLX5_CMD_OP_QUERY_ESW_FUNCTIONS:
967 return true;
968 default:
969 return false;
970 }
971 }
972
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)973 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
974 struct uverbs_attr_bundle *attrs)
975 {
976 struct mlx5_ib_ucontext *c;
977 struct mlx5_ib_dev *dev;
978 int user_vector;
979 int dev_eqn;
980 int err;
981
982 if (uverbs_copy_from(&user_vector, attrs,
983 MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC))
984 return -EFAULT;
985
986 c = devx_ufile2uctx(attrs);
987 if (IS_ERR(c))
988 return PTR_ERR(c);
989 dev = to_mdev(c->ibucontext.device);
990
991 err = mlx5_vector2eqn(dev->mdev, user_vector, &dev_eqn);
992 if (err < 0)
993 return err;
994
995 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
996 &dev_eqn, sizeof(dev_eqn)))
997 return -EFAULT;
998
999 return 0;
1000 }
1001
1002 /*
1003 *Security note:
1004 * The hardware protection mechanism works like this: Each device object that
1005 * is subject to UAR doorbells (QP/SQ/CQ) gets a UAR ID (called uar_page in
1006 * the device specification manual) upon its creation. Then upon doorbell,
1007 * hardware fetches the object context for which the doorbell was rang, and
1008 * validates that the UAR through which the DB was rang matches the UAR ID
1009 * of the object.
1010 * If no match the doorbell is silently ignored by the hardware. Of course,
1011 * the user cannot ring a doorbell on a UAR that was not mapped to it.
1012 * Now in devx, as the devx kernel does not manipulate the QP/SQ/CQ command
1013 * mailboxes (except tagging them with UID), we expose to the user its UAR
1014 * ID, so it can embed it in these objects in the expected specification
1015 * format. So the only thing the user can do is hurt itself by creating a
1016 * QP/SQ/CQ with a UAR ID other than his, and then in this case other users
1017 * may ring a doorbell on its objects.
1018 * The consequence of that will be that another user can schedule a QP/SQ
1019 * of the buggy user for execution (just insert it to the hardware schedule
1020 * queue or arm its CQ for event generation), no further harm is expected.
1021 */
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)1022 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)(
1023 struct uverbs_attr_bundle *attrs)
1024 {
1025 struct mlx5_ib_ucontext *c;
1026 struct mlx5_ib_dev *dev;
1027 u32 user_idx;
1028 s32 dev_idx;
1029
1030 c = devx_ufile2uctx(attrs);
1031 if (IS_ERR(c))
1032 return PTR_ERR(c);
1033 dev = to_mdev(c->ibucontext.device);
1034
1035 if (uverbs_copy_from(&user_idx, attrs,
1036 MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX))
1037 return -EFAULT;
1038
1039 dev_idx = bfregn_to_uar_index(dev, &c->bfregi, user_idx, true);
1040 if (dev_idx < 0)
1041 return dev_idx;
1042
1043 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
1044 &dev_idx, sizeof(dev_idx)))
1045 return -EFAULT;
1046
1047 return 0;
1048 }
1049
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)1050 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)(
1051 struct uverbs_attr_bundle *attrs)
1052 {
1053 struct mlx5_ib_ucontext *c;
1054 struct mlx5_ib_dev *dev;
1055 void *cmd_in = uverbs_attr_get_alloced_ptr(
1056 attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN);
1057 int cmd_out_len = uverbs_attr_get_len(attrs,
1058 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT);
1059 void *cmd_out;
1060 int err, err2;
1061 int uid;
1062
1063 c = devx_ufile2uctx(attrs);
1064 if (IS_ERR(c))
1065 return PTR_ERR(c);
1066 dev = to_mdev(c->ibucontext.device);
1067
1068 uid = devx_get_uid(c, cmd_in);
1069 if (uid < 0)
1070 return uid;
1071
1072 /* Only white list of some general HCA commands are allowed for this method. */
1073 if (!devx_is_general_cmd(cmd_in, dev))
1074 return -EINVAL;
1075
1076 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1077 if (IS_ERR(cmd_out))
1078 return PTR_ERR(cmd_out);
1079
1080 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1081 err = mlx5_cmd_do(dev->mdev, cmd_in,
1082 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN),
1083 cmd_out, cmd_out_len);
1084 if (err && err != -EREMOTEIO)
1085 return err;
1086
1087 err2 = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, cmd_out,
1088 cmd_out_len);
1089
1090 return err2 ?: err;
1091 }
1092
devx_obj_build_destroy_cmd(void * in,void * out,void * din,u32 * dinlen,u32 * obj_id)1093 static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
1094 u32 *dinlen,
1095 u32 *obj_id)
1096 {
1097 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
1098 u16 uid = MLX5_GET(general_obj_in_cmd_hdr, in, uid);
1099
1100 *obj_id = devx_get_created_obj_id(in, out, opcode);
1101 *dinlen = MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr);
1102 MLX5_SET(general_obj_in_cmd_hdr, din, uid, uid);
1103
1104 switch (opcode) {
1105 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
1106 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_GENERAL_OBJECT);
1107 MLX5_SET(general_obj_in_cmd_hdr, din, obj_id, *obj_id);
1108 MLX5_SET(general_obj_in_cmd_hdr, din, obj_type,
1109 MLX5_GET(general_obj_in_cmd_hdr, in, obj_type));
1110 break;
1111
1112 case MLX5_CMD_OP_CREATE_UMEM:
1113 MLX5_SET(destroy_umem_in, din, opcode,
1114 MLX5_CMD_OP_DESTROY_UMEM);
1115 MLX5_SET(destroy_umem_in, din, umem_id, *obj_id);
1116 break;
1117 case MLX5_CMD_OP_CREATE_MKEY:
1118 MLX5_SET(destroy_mkey_in, din, opcode,
1119 MLX5_CMD_OP_DESTROY_MKEY);
1120 MLX5_SET(destroy_mkey_in, din, mkey_index, *obj_id);
1121 break;
1122 case MLX5_CMD_OP_CREATE_CQ:
1123 MLX5_SET(destroy_cq_in, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
1124 MLX5_SET(destroy_cq_in, din, cqn, *obj_id);
1125 break;
1126 case MLX5_CMD_OP_ALLOC_PD:
1127 MLX5_SET(dealloc_pd_in, din, opcode, MLX5_CMD_OP_DEALLOC_PD);
1128 MLX5_SET(dealloc_pd_in, din, pd, *obj_id);
1129 break;
1130 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
1131 MLX5_SET(dealloc_transport_domain_in, din, opcode,
1132 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
1133 MLX5_SET(dealloc_transport_domain_in, din, transport_domain,
1134 *obj_id);
1135 break;
1136 case MLX5_CMD_OP_CREATE_RMP:
1137 MLX5_SET(destroy_rmp_in, din, opcode, MLX5_CMD_OP_DESTROY_RMP);
1138 MLX5_SET(destroy_rmp_in, din, rmpn, *obj_id);
1139 break;
1140 case MLX5_CMD_OP_CREATE_SQ:
1141 MLX5_SET(destroy_sq_in, din, opcode, MLX5_CMD_OP_DESTROY_SQ);
1142 MLX5_SET(destroy_sq_in, din, sqn, *obj_id);
1143 break;
1144 case MLX5_CMD_OP_CREATE_RQ:
1145 MLX5_SET(destroy_rq_in, din, opcode, MLX5_CMD_OP_DESTROY_RQ);
1146 MLX5_SET(destroy_rq_in, din, rqn, *obj_id);
1147 break;
1148 case MLX5_CMD_OP_CREATE_RQT:
1149 MLX5_SET(destroy_rqt_in, din, opcode, MLX5_CMD_OP_DESTROY_RQT);
1150 MLX5_SET(destroy_rqt_in, din, rqtn, *obj_id);
1151 break;
1152 case MLX5_CMD_OP_CREATE_TIR:
1153 MLX5_SET(destroy_tir_in, din, opcode, MLX5_CMD_OP_DESTROY_TIR);
1154 MLX5_SET(destroy_tir_in, din, tirn, *obj_id);
1155 break;
1156 case MLX5_CMD_OP_CREATE_TIS:
1157 MLX5_SET(destroy_tis_in, din, opcode, MLX5_CMD_OP_DESTROY_TIS);
1158 MLX5_SET(destroy_tis_in, din, tisn, *obj_id);
1159 break;
1160 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
1161 MLX5_SET(dealloc_q_counter_in, din, opcode,
1162 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
1163 MLX5_SET(dealloc_q_counter_in, din, counter_set_id, *obj_id);
1164 break;
1165 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
1166 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_table_in);
1167 MLX5_SET(destroy_flow_table_in, din, other_vport,
1168 MLX5_GET(create_flow_table_in, in, other_vport));
1169 MLX5_SET(destroy_flow_table_in, din, vport_number,
1170 MLX5_GET(create_flow_table_in, in, vport_number));
1171 MLX5_SET(destroy_flow_table_in, din, table_type,
1172 MLX5_GET(create_flow_table_in, in, table_type));
1173 MLX5_SET(destroy_flow_table_in, din, table_id, *obj_id);
1174 MLX5_SET(destroy_flow_table_in, din, opcode,
1175 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
1176 break;
1177 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
1178 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_group_in);
1179 MLX5_SET(destroy_flow_group_in, din, other_vport,
1180 MLX5_GET(create_flow_group_in, in, other_vport));
1181 MLX5_SET(destroy_flow_group_in, din, vport_number,
1182 MLX5_GET(create_flow_group_in, in, vport_number));
1183 MLX5_SET(destroy_flow_group_in, din, table_type,
1184 MLX5_GET(create_flow_group_in, in, table_type));
1185 MLX5_SET(destroy_flow_group_in, din, table_id,
1186 MLX5_GET(create_flow_group_in, in, table_id));
1187 MLX5_SET(destroy_flow_group_in, din, group_id, *obj_id);
1188 MLX5_SET(destroy_flow_group_in, din, opcode,
1189 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
1190 break;
1191 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
1192 *dinlen = MLX5_ST_SZ_BYTES(delete_fte_in);
1193 MLX5_SET(delete_fte_in, din, other_vport,
1194 MLX5_GET(set_fte_in, in, other_vport));
1195 MLX5_SET(delete_fte_in, din, vport_number,
1196 MLX5_GET(set_fte_in, in, vport_number));
1197 MLX5_SET(delete_fte_in, din, table_type,
1198 MLX5_GET(set_fte_in, in, table_type));
1199 MLX5_SET(delete_fte_in, din, table_id,
1200 MLX5_GET(set_fte_in, in, table_id));
1201 MLX5_SET(delete_fte_in, din, flow_index, *obj_id);
1202 MLX5_SET(delete_fte_in, din, opcode,
1203 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
1204 break;
1205 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
1206 MLX5_SET(dealloc_flow_counter_in, din, opcode,
1207 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
1208 MLX5_SET(dealloc_flow_counter_in, din, flow_counter_id,
1209 *obj_id);
1210 break;
1211 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
1212 MLX5_SET(dealloc_packet_reformat_context_in, din, opcode,
1213 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
1214 MLX5_SET(dealloc_packet_reformat_context_in, din,
1215 packet_reformat_id, *obj_id);
1216 break;
1217 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
1218 MLX5_SET(dealloc_modify_header_context_in, din, opcode,
1219 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
1220 MLX5_SET(dealloc_modify_header_context_in, din,
1221 modify_header_id, *obj_id);
1222 break;
1223 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
1224 *dinlen = MLX5_ST_SZ_BYTES(destroy_scheduling_element_in);
1225 MLX5_SET(destroy_scheduling_element_in, din,
1226 scheduling_hierarchy,
1227 MLX5_GET(create_scheduling_element_in, in,
1228 scheduling_hierarchy));
1229 MLX5_SET(destroy_scheduling_element_in, din,
1230 scheduling_element_id, *obj_id);
1231 MLX5_SET(destroy_scheduling_element_in, din, opcode,
1232 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
1233 break;
1234 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
1235 *dinlen = MLX5_ST_SZ_BYTES(delete_vxlan_udp_dport_in);
1236 MLX5_SET(delete_vxlan_udp_dport_in, din, vxlan_udp_port, *obj_id);
1237 MLX5_SET(delete_vxlan_udp_dport_in, din, opcode,
1238 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
1239 break;
1240 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
1241 *dinlen = MLX5_ST_SZ_BYTES(delete_l2_table_entry_in);
1242 MLX5_SET(delete_l2_table_entry_in, din, table_index, *obj_id);
1243 MLX5_SET(delete_l2_table_entry_in, din, opcode,
1244 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
1245 break;
1246 case MLX5_CMD_OP_CREATE_QP:
1247 MLX5_SET(destroy_qp_in, din, opcode, MLX5_CMD_OP_DESTROY_QP);
1248 MLX5_SET(destroy_qp_in, din, qpn, *obj_id);
1249 break;
1250 case MLX5_CMD_OP_CREATE_SRQ:
1251 MLX5_SET(destroy_srq_in, din, opcode, MLX5_CMD_OP_DESTROY_SRQ);
1252 MLX5_SET(destroy_srq_in, din, srqn, *obj_id);
1253 break;
1254 case MLX5_CMD_OP_CREATE_XRC_SRQ:
1255 MLX5_SET(destroy_xrc_srq_in, din, opcode,
1256 MLX5_CMD_OP_DESTROY_XRC_SRQ);
1257 MLX5_SET(destroy_xrc_srq_in, din, xrc_srqn, *obj_id);
1258 break;
1259 case MLX5_CMD_OP_CREATE_DCT:
1260 MLX5_SET(destroy_dct_in, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
1261 MLX5_SET(destroy_dct_in, din, dctn, *obj_id);
1262 break;
1263 case MLX5_CMD_OP_CREATE_XRQ:
1264 MLX5_SET(destroy_xrq_in, din, opcode, MLX5_CMD_OP_DESTROY_XRQ);
1265 MLX5_SET(destroy_xrq_in, din, xrqn, *obj_id);
1266 break;
1267 case MLX5_CMD_OP_ATTACH_TO_MCG:
1268 *dinlen = MLX5_ST_SZ_BYTES(detach_from_mcg_in);
1269 MLX5_SET(detach_from_mcg_in, din, qpn,
1270 MLX5_GET(attach_to_mcg_in, in, qpn));
1271 memcpy(MLX5_ADDR_OF(detach_from_mcg_in, din, multicast_gid),
1272 MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid),
1273 MLX5_FLD_SZ_BYTES(attach_to_mcg_in, multicast_gid));
1274 MLX5_SET(detach_from_mcg_in, din, opcode,
1275 MLX5_CMD_OP_DETACH_FROM_MCG);
1276 MLX5_SET(detach_from_mcg_in, din, qpn, *obj_id);
1277 break;
1278 case MLX5_CMD_OP_ALLOC_XRCD:
1279 MLX5_SET(dealloc_xrcd_in, din, opcode,
1280 MLX5_CMD_OP_DEALLOC_XRCD);
1281 MLX5_SET(dealloc_xrcd_in, din, xrcd, *obj_id);
1282 break;
1283 case MLX5_CMD_OP_CREATE_PSV:
1284 MLX5_SET(destroy_psv_in, din, opcode,
1285 MLX5_CMD_OP_DESTROY_PSV);
1286 MLX5_SET(destroy_psv_in, din, psvn, *obj_id);
1287 break;
1288 default:
1289 /* The entry must match to one of the devx_is_obj_create_cmd */
1290 WARN_ON(true);
1291 break;
1292 }
1293 }
1294
devx_handle_mkey_indirect(struct devx_obj * obj,struct mlx5_ib_dev * dev,void * in,void * out)1295 static int devx_handle_mkey_indirect(struct devx_obj *obj,
1296 struct mlx5_ib_dev *dev,
1297 void *in, void *out)
1298 {
1299 struct mlx5_ib_mkey *mkey = &obj->mkey;
1300 void *mkc;
1301 u8 key;
1302
1303 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1304 key = MLX5_GET(mkc, mkc, mkey_7_0);
1305 mkey->key = mlx5_idx_to_mkey(
1306 MLX5_GET(create_mkey_out, out, mkey_index)) | key;
1307 mkey->type = MLX5_MKEY_INDIRECT_DEVX;
1308 mkey->ndescs = MLX5_GET(mkc, mkc, translations_octword_size);
1309 init_waitqueue_head(&mkey->wait);
1310
1311 return mlx5r_store_odp_mkey(dev, mkey);
1312 }
1313
devx_handle_mkey_create(struct mlx5_ib_dev * dev,struct devx_obj * obj,void * in,int in_len)1314 static int devx_handle_mkey_create(struct mlx5_ib_dev *dev,
1315 struct devx_obj *obj,
1316 void *in, int in_len)
1317 {
1318 int min_len = MLX5_BYTE_OFF(create_mkey_in, memory_key_mkey_entry) +
1319 MLX5_FLD_SZ_BYTES(create_mkey_in,
1320 memory_key_mkey_entry);
1321 void *mkc;
1322 u8 access_mode;
1323
1324 if (in_len < min_len)
1325 return -EINVAL;
1326
1327 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1328
1329 access_mode = MLX5_GET(mkc, mkc, access_mode_1_0);
1330 access_mode |= MLX5_GET(mkc, mkc, access_mode_4_2) << 2;
1331
1332 if (access_mode == MLX5_MKC_ACCESS_MODE_KLMS ||
1333 access_mode == MLX5_MKC_ACCESS_MODE_KSM) {
1334 if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING))
1335 obj->flags |= DEVX_OBJ_FLAGS_INDIRECT_MKEY;
1336 return 0;
1337 }
1338
1339 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
1340 return 0;
1341 }
1342
devx_cleanup_subscription(struct mlx5_ib_dev * dev,struct devx_event_subscription * sub)1343 static void devx_cleanup_subscription(struct mlx5_ib_dev *dev,
1344 struct devx_event_subscription *sub)
1345 {
1346 struct devx_event *event;
1347 struct devx_obj_event *xa_val_level2;
1348
1349 if (sub->is_cleaned)
1350 return;
1351
1352 sub->is_cleaned = 1;
1353 list_del_rcu(&sub->xa_list);
1354
1355 if (list_empty(&sub->obj_list))
1356 return;
1357
1358 list_del_rcu(&sub->obj_list);
1359 /* check whether key level 1 for this obj_sub_list is empty */
1360 event = xa_load(&dev->devx_event_table.event_xa,
1361 sub->xa_key_level1);
1362 WARN_ON(!event);
1363
1364 xa_val_level2 = xa_load(&event->object_ids, sub->xa_key_level2);
1365 if (list_empty(&xa_val_level2->obj_sub_list)) {
1366 xa_erase(&event->object_ids,
1367 sub->xa_key_level2);
1368 kfree_rcu(xa_val_level2, rcu);
1369 }
1370 }
1371
devx_obj_cleanup(struct ib_uobject * uobject,enum rdma_remove_reason why,struct uverbs_attr_bundle * attrs)1372 static int devx_obj_cleanup(struct ib_uobject *uobject,
1373 enum rdma_remove_reason why,
1374 struct uverbs_attr_bundle *attrs)
1375 {
1376 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1377 struct mlx5_devx_event_table *devx_event_table;
1378 struct devx_obj *obj = uobject->object;
1379 struct devx_event_subscription *sub_entry, *tmp;
1380 struct mlx5_ib_dev *dev;
1381 int ret;
1382
1383 dev = mlx5_udata_to_mdev(&attrs->driver_udata);
1384 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY &&
1385 xa_erase(&obj->ib_dev->odp_mkeys,
1386 mlx5_base_mkey(obj->mkey.key)))
1387 /*
1388 * The pagefault_single_data_segment() does commands against
1389 * the mmkey, we must wait for that to stop before freeing the
1390 * mkey, as another allocation could get the same mkey #.
1391 */
1392 mlx5r_deref_wait_odp_mkey(&obj->mkey);
1393
1394 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1395 ret = mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1396 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1397 ret = mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1398 else
1399 ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
1400 obj->dinlen, out, sizeof(out));
1401 if (ret)
1402 return ret;
1403
1404 devx_event_table = &dev->devx_event_table;
1405
1406 mutex_lock(&devx_event_table->event_xa_lock);
1407 list_for_each_entry_safe(sub_entry, tmp, &obj->event_sub, obj_list)
1408 devx_cleanup_subscription(dev, sub_entry);
1409 mutex_unlock(&devx_event_table->event_xa_lock);
1410
1411 kfree(obj);
1412 return ret;
1413 }
1414
devx_cq_comp(struct mlx5_core_cq * mcq,struct mlx5_eqe * eqe)1415 static void devx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
1416 {
1417 struct devx_obj *obj = container_of(mcq, struct devx_obj, core_cq);
1418 struct mlx5_devx_event_table *table;
1419 struct devx_event *event;
1420 struct devx_obj_event *obj_event;
1421 u32 obj_id = mcq->cqn;
1422
1423 table = &obj->ib_dev->devx_event_table;
1424 rcu_read_lock();
1425 event = xa_load(&table->event_xa, MLX5_EVENT_TYPE_COMP);
1426 if (!event)
1427 goto out;
1428
1429 obj_event = xa_load(&event->object_ids, obj_id);
1430 if (!obj_event)
1431 goto out;
1432
1433 dispatch_event_fd(&obj_event->obj_sub_list, eqe);
1434 out:
1435 rcu_read_unlock();
1436 }
1437
is_apu_cq(struct mlx5_ib_dev * dev,const void * in)1438 static bool is_apu_cq(struct mlx5_ib_dev *dev, const void *in)
1439 {
1440 if (!MLX5_CAP_GEN(dev->mdev, apu) ||
1441 !MLX5_GET(cqc, MLX5_ADDR_OF(create_cq_in, in, cq_context), apu_cq))
1442 return false;
1443
1444 return true;
1445 }
1446
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)1447 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
1448 struct uverbs_attr_bundle *attrs)
1449 {
1450 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1451 int cmd_out_len = uverbs_attr_get_len(attrs,
1452 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT);
1453 int cmd_in_len = uverbs_attr_get_len(attrs,
1454 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1455 void *cmd_out;
1456 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1457 attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
1458 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1459 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1460 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1461 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1462 struct devx_obj *obj;
1463 u16 obj_type = 0;
1464 int err, err2 = 0;
1465 int uid;
1466 u32 obj_id;
1467 u16 opcode;
1468
1469 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1470 return -EINVAL;
1471
1472 uid = devx_get_uid(c, cmd_in);
1473 if (uid < 0)
1474 return uid;
1475
1476 if (!devx_is_obj_create_cmd(cmd_in, &opcode))
1477 return -EINVAL;
1478
1479 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1480 if (IS_ERR(cmd_out))
1481 return PTR_ERR(cmd_out);
1482
1483 obj = kzalloc(sizeof(struct devx_obj), GFP_KERNEL);
1484 if (!obj)
1485 return -ENOMEM;
1486
1487 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1488 if (opcode == MLX5_CMD_OP_CREATE_MKEY) {
1489 err = devx_handle_mkey_create(dev, obj, cmd_in, cmd_in_len);
1490 if (err)
1491 goto obj_free;
1492 } else {
1493 devx_set_umem_valid(cmd_in);
1494 }
1495
1496 if (opcode == MLX5_CMD_OP_CREATE_DCT) {
1497 obj->flags |= DEVX_OBJ_FLAGS_DCT;
1498 err = mlx5_core_create_dct(dev, &obj->core_dct, cmd_in,
1499 cmd_in_len, cmd_out, cmd_out_len);
1500 } else if (opcode == MLX5_CMD_OP_CREATE_CQ &&
1501 !is_apu_cq(dev, cmd_in)) {
1502 obj->flags |= DEVX_OBJ_FLAGS_CQ;
1503 obj->core_cq.comp = devx_cq_comp;
1504 err = mlx5_create_cq(dev->mdev, &obj->core_cq,
1505 cmd_in, cmd_in_len, cmd_out,
1506 cmd_out_len);
1507 } else {
1508 err = mlx5_cmd_do(dev->mdev, cmd_in, cmd_in_len,
1509 cmd_out, cmd_out_len);
1510 }
1511
1512 if (err == -EREMOTEIO)
1513 err2 = uverbs_copy_to(attrs,
1514 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
1515 cmd_out, cmd_out_len);
1516 if (err)
1517 goto obj_free;
1518
1519 if (opcode == MLX5_CMD_OP_ALLOC_FLOW_COUNTER) {
1520 u8 bulk = MLX5_GET(alloc_flow_counter_in,
1521 cmd_in,
1522 flow_counter_bulk);
1523 obj->flow_counter_bulk_size = 128UL * bulk;
1524 }
1525
1526 uobj->object = obj;
1527 INIT_LIST_HEAD(&obj->event_sub);
1528 obj->ib_dev = dev;
1529 devx_obj_build_destroy_cmd(cmd_in, cmd_out, obj->dinbox, &obj->dinlen,
1530 &obj_id);
1531 WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
1532
1533 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
1534 if (err)
1535 goto obj_destroy;
1536
1537 if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJECT)
1538 obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type);
1539 obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id);
1540
1541 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) {
1542 err = devx_handle_mkey_indirect(obj, dev, cmd_in, cmd_out);
1543 if (err)
1544 goto obj_destroy;
1545 }
1546 return 0;
1547
1548 obj_destroy:
1549 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1550 mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1551 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1552 mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1553 else
1554 mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox, obj->dinlen, out,
1555 sizeof(out));
1556 obj_free:
1557 kfree(obj);
1558 return err2 ?: err;
1559 }
1560
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)1561 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)(
1562 struct uverbs_attr_bundle *attrs)
1563 {
1564 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN);
1565 int cmd_out_len = uverbs_attr_get_len(attrs,
1566 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT);
1567 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1568 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE);
1569 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1570 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1571 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1572 void *cmd_out;
1573 int err, err2;
1574 int uid;
1575
1576 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1577 return -EINVAL;
1578
1579 uid = devx_get_uid(c, cmd_in);
1580 if (uid < 0)
1581 return uid;
1582
1583 if (!devx_is_obj_modify_cmd(cmd_in))
1584 return -EINVAL;
1585
1586 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1587 return -EINVAL;
1588
1589 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1590 if (IS_ERR(cmd_out))
1591 return PTR_ERR(cmd_out);
1592
1593 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1594 devx_set_umem_valid(cmd_in);
1595
1596 err = mlx5_cmd_do(mdev->mdev, cmd_in,
1597 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN),
1598 cmd_out, cmd_out_len);
1599 if (err && err != -EREMOTEIO)
1600 return err;
1601
1602 err2 = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
1603 cmd_out, cmd_out_len);
1604
1605 return err2 ?: err;
1606 }
1607
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)1608 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)(
1609 struct uverbs_attr_bundle *attrs)
1610 {
1611 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN);
1612 int cmd_out_len = uverbs_attr_get_len(attrs,
1613 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT);
1614 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1615 MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE);
1616 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1617 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1618 void *cmd_out;
1619 int err, err2;
1620 int uid;
1621 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1622
1623 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1624 return -EINVAL;
1625
1626 uid = devx_get_uid(c, cmd_in);
1627 if (uid < 0)
1628 return uid;
1629
1630 if (!devx_is_obj_query_cmd(cmd_in))
1631 return -EINVAL;
1632
1633 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1634 return -EINVAL;
1635
1636 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1637 if (IS_ERR(cmd_out))
1638 return PTR_ERR(cmd_out);
1639
1640 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1641 err = mlx5_cmd_do(mdev->mdev, cmd_in,
1642 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN),
1643 cmd_out, cmd_out_len);
1644 if (err && err != -EREMOTEIO)
1645 return err;
1646
1647 err2 = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
1648 cmd_out, cmd_out_len);
1649
1650 return err2 ?: err;
1651 }
1652
1653 struct devx_async_event_queue {
1654 spinlock_t lock;
1655 wait_queue_head_t poll_wait;
1656 struct list_head event_list;
1657 atomic_t bytes_in_use;
1658 u8 is_destroyed:1;
1659 };
1660
1661 struct devx_async_cmd_event_file {
1662 struct ib_uobject uobj;
1663 struct devx_async_event_queue ev_queue;
1664 struct mlx5_async_ctx async_ctx;
1665 };
1666
devx_init_event_queue(struct devx_async_event_queue * ev_queue)1667 static void devx_init_event_queue(struct devx_async_event_queue *ev_queue)
1668 {
1669 spin_lock_init(&ev_queue->lock);
1670 INIT_LIST_HEAD(&ev_queue->event_list);
1671 init_waitqueue_head(&ev_queue->poll_wait);
1672 atomic_set(&ev_queue->bytes_in_use, 0);
1673 ev_queue->is_destroyed = 0;
1674 }
1675
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)1676 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)(
1677 struct uverbs_attr_bundle *attrs)
1678 {
1679 struct devx_async_cmd_event_file *ev_file;
1680
1681 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1682 attrs, MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE);
1683 struct mlx5_ib_dev *mdev = mlx5_udata_to_mdev(&attrs->driver_udata);
1684
1685 ev_file = container_of(uobj, struct devx_async_cmd_event_file,
1686 uobj);
1687 devx_init_event_queue(&ev_file->ev_queue);
1688 mlx5_cmd_init_async_ctx(mdev->mdev, &ev_file->async_ctx);
1689 return 0;
1690 }
1691
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)1692 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)(
1693 struct uverbs_attr_bundle *attrs)
1694 {
1695 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1696 attrs, MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE);
1697 struct devx_async_event_file *ev_file;
1698 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1699 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1700 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1701 u32 flags;
1702 int err;
1703
1704 err = uverbs_get_flags32(&flags, attrs,
1705 MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
1706 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA);
1707
1708 if (err)
1709 return err;
1710
1711 ev_file = container_of(uobj, struct devx_async_event_file,
1712 uobj);
1713 spin_lock_init(&ev_file->lock);
1714 INIT_LIST_HEAD(&ev_file->event_list);
1715 init_waitqueue_head(&ev_file->poll_wait);
1716 if (flags & MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA)
1717 ev_file->omit_data = 1;
1718 INIT_LIST_HEAD(&ev_file->subscribed_events_list);
1719 ev_file->dev = dev;
1720 get_device(&dev->ib_dev.dev);
1721 return 0;
1722 }
1723
devx_query_callback(int status,struct mlx5_async_work * context)1724 static void devx_query_callback(int status, struct mlx5_async_work *context)
1725 {
1726 struct devx_async_data *async_data =
1727 container_of(context, struct devx_async_data, cb_work);
1728 struct devx_async_cmd_event_file *ev_file = async_data->ev_file;
1729 struct devx_async_event_queue *ev_queue = &ev_file->ev_queue;
1730 unsigned long flags;
1731
1732 /*
1733 * Note that if the struct devx_async_cmd_event_file uobj begins to be
1734 * destroyed it will block at mlx5_cmd_cleanup_async_ctx() until this
1735 * routine returns, ensuring that it always remains valid here.
1736 */
1737 spin_lock_irqsave(&ev_queue->lock, flags);
1738 list_add_tail(&async_data->list, &ev_queue->event_list);
1739 spin_unlock_irqrestore(&ev_queue->lock, flags);
1740
1741 wake_up_interruptible(&ev_queue->poll_wait);
1742 }
1743
1744 #define MAX_ASYNC_BYTES_IN_USE (1024 * 1024) /* 1MB */
1745
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)1746 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)(
1747 struct uverbs_attr_bundle *attrs)
1748 {
1749 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs,
1750 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN);
1751 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1752 attrs,
1753 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE);
1754 u16 cmd_out_len;
1755 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1756 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1757 struct ib_uobject *fd_uobj;
1758 int err;
1759 int uid;
1760 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1761 struct devx_async_cmd_event_file *ev_file;
1762 struct devx_async_data *async_data;
1763
1764 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1765 return -EINVAL;
1766
1767 uid = devx_get_uid(c, cmd_in);
1768 if (uid < 0)
1769 return uid;
1770
1771 if (!devx_is_obj_query_cmd(cmd_in))
1772 return -EINVAL;
1773
1774 err = uverbs_get_const(&cmd_out_len, attrs,
1775 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN);
1776 if (err)
1777 return err;
1778
1779 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1780 return -EINVAL;
1781
1782 fd_uobj = uverbs_attr_get_uobject(attrs,
1783 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD);
1784 if (IS_ERR(fd_uobj))
1785 return PTR_ERR(fd_uobj);
1786
1787 ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1788 uobj);
1789
1790 if (atomic_add_return(cmd_out_len, &ev_file->ev_queue.bytes_in_use) >
1791 MAX_ASYNC_BYTES_IN_USE) {
1792 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1793 return -EAGAIN;
1794 }
1795
1796 async_data = kvzalloc(struct_size(async_data, hdr.out_data,
1797 cmd_out_len), GFP_KERNEL);
1798 if (!async_data) {
1799 err = -ENOMEM;
1800 goto sub_bytes;
1801 }
1802
1803 err = uverbs_copy_from(&async_data->hdr.wr_id, attrs,
1804 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID);
1805 if (err)
1806 goto free_async;
1807
1808 async_data->cmd_out_len = cmd_out_len;
1809 async_data->mdev = mdev;
1810 async_data->ev_file = ev_file;
1811
1812 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1813 err = mlx5_cmd_exec_cb(&ev_file->async_ctx, cmd_in,
1814 uverbs_attr_get_len(attrs,
1815 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN),
1816 async_data->hdr.out_data,
1817 async_data->cmd_out_len,
1818 devx_query_callback, &async_data->cb_work);
1819
1820 if (err)
1821 goto free_async;
1822
1823 return 0;
1824
1825 free_async:
1826 kvfree(async_data);
1827 sub_bytes:
1828 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1829 return err;
1830 }
1831
1832 static void
subscribe_event_xa_dealloc(struct mlx5_devx_event_table * devx_event_table,u32 key_level1,bool is_level2,u32 key_level2)1833 subscribe_event_xa_dealloc(struct mlx5_devx_event_table *devx_event_table,
1834 u32 key_level1,
1835 bool is_level2,
1836 u32 key_level2)
1837 {
1838 struct devx_event *event;
1839 struct devx_obj_event *xa_val_level2;
1840
1841 /* Level 1 is valid for future use, no need to free */
1842 if (!is_level2)
1843 return;
1844
1845 event = xa_load(&devx_event_table->event_xa, key_level1);
1846 WARN_ON(!event);
1847
1848 xa_val_level2 = xa_load(&event->object_ids,
1849 key_level2);
1850 if (list_empty(&xa_val_level2->obj_sub_list)) {
1851 xa_erase(&event->object_ids,
1852 key_level2);
1853 kfree_rcu(xa_val_level2, rcu);
1854 }
1855 }
1856
1857 static int
subscribe_event_xa_alloc(struct mlx5_devx_event_table * devx_event_table,u32 key_level1,bool is_level2,u32 key_level2)1858 subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table,
1859 u32 key_level1,
1860 bool is_level2,
1861 u32 key_level2)
1862 {
1863 struct devx_obj_event *obj_event;
1864 struct devx_event *event;
1865 int err;
1866
1867 event = xa_load(&devx_event_table->event_xa, key_level1);
1868 if (!event) {
1869 event = kzalloc(sizeof(*event), GFP_KERNEL);
1870 if (!event)
1871 return -ENOMEM;
1872
1873 INIT_LIST_HEAD(&event->unaffiliated_list);
1874 xa_init(&event->object_ids);
1875
1876 err = xa_insert(&devx_event_table->event_xa,
1877 key_level1,
1878 event,
1879 GFP_KERNEL);
1880 if (err) {
1881 kfree(event);
1882 return err;
1883 }
1884 }
1885
1886 if (!is_level2)
1887 return 0;
1888
1889 obj_event = xa_load(&event->object_ids, key_level2);
1890 if (!obj_event) {
1891 obj_event = kzalloc(sizeof(*obj_event), GFP_KERNEL);
1892 if (!obj_event)
1893 /* Level1 is valid for future use, no need to free */
1894 return -ENOMEM;
1895
1896 err = xa_insert(&event->object_ids,
1897 key_level2,
1898 obj_event,
1899 GFP_KERNEL);
1900 if (err) {
1901 kfree(obj_event);
1902 return err;
1903 }
1904 INIT_LIST_HEAD(&obj_event->obj_sub_list);
1905 }
1906
1907 return 0;
1908 }
1909
is_valid_events_legacy(int num_events,u16 * event_type_num_list,struct devx_obj * obj)1910 static bool is_valid_events_legacy(int num_events, u16 *event_type_num_list,
1911 struct devx_obj *obj)
1912 {
1913 int i;
1914
1915 for (i = 0; i < num_events; i++) {
1916 if (obj) {
1917 if (!is_legacy_obj_event_num(event_type_num_list[i]))
1918 return false;
1919 } else if (!is_legacy_unaffiliated_event_num(
1920 event_type_num_list[i])) {
1921 return false;
1922 }
1923 }
1924
1925 return true;
1926 }
1927
1928 #define MAX_SUPP_EVENT_NUM 255
is_valid_events(struct mlx5_core_dev * dev,int num_events,u16 * event_type_num_list,struct devx_obj * obj)1929 static bool is_valid_events(struct mlx5_core_dev *dev,
1930 int num_events, u16 *event_type_num_list,
1931 struct devx_obj *obj)
1932 {
1933 __be64 *aff_events;
1934 __be64 *unaff_events;
1935 int mask_entry;
1936 int mask_bit;
1937 int i;
1938
1939 if (MLX5_CAP_GEN(dev, event_cap)) {
1940 aff_events = MLX5_CAP_DEV_EVENT(dev,
1941 user_affiliated_events);
1942 unaff_events = MLX5_CAP_DEV_EVENT(dev,
1943 user_unaffiliated_events);
1944 } else {
1945 return is_valid_events_legacy(num_events, event_type_num_list,
1946 obj);
1947 }
1948
1949 for (i = 0; i < num_events; i++) {
1950 if (event_type_num_list[i] > MAX_SUPP_EVENT_NUM)
1951 return false;
1952
1953 mask_entry = event_type_num_list[i] / 64;
1954 mask_bit = event_type_num_list[i] % 64;
1955
1956 if (obj) {
1957 /* CQ completion */
1958 if (event_type_num_list[i] == 0)
1959 continue;
1960
1961 if (!(be64_to_cpu(aff_events[mask_entry]) &
1962 (1ull << mask_bit)))
1963 return false;
1964
1965 continue;
1966 }
1967
1968 if (!(be64_to_cpu(unaff_events[mask_entry]) &
1969 (1ull << mask_bit)))
1970 return false;
1971 }
1972
1973 return true;
1974 }
1975
1976 #define MAX_NUM_EVENTS 16
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)1977 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)(
1978 struct uverbs_attr_bundle *attrs)
1979 {
1980 struct ib_uobject *devx_uobj = uverbs_attr_get_uobject(
1981 attrs,
1982 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE);
1983 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1984 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1985 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1986 struct ib_uobject *fd_uobj;
1987 struct devx_obj *obj = NULL;
1988 struct devx_async_event_file *ev_file;
1989 struct mlx5_devx_event_table *devx_event_table = &dev->devx_event_table;
1990 u16 *event_type_num_list;
1991 struct devx_event_subscription *event_sub, *tmp_sub;
1992 struct list_head sub_list;
1993 int redirect_fd;
1994 bool use_eventfd = false;
1995 int num_events;
1996 int num_alloc_xa_entries = 0;
1997 u16 obj_type = 0;
1998 u64 cookie = 0;
1999 u32 obj_id = 0;
2000 int err;
2001 int i;
2002
2003 if (!c->devx_uid)
2004 return -EINVAL;
2005
2006 if (!IS_ERR(devx_uobj)) {
2007 obj = (struct devx_obj *)devx_uobj->object;
2008 if (obj)
2009 obj_id = get_dec_obj_id(obj->obj_id);
2010 }
2011
2012 fd_uobj = uverbs_attr_get_uobject(attrs,
2013 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE);
2014 if (IS_ERR(fd_uobj))
2015 return PTR_ERR(fd_uobj);
2016
2017 ev_file = container_of(fd_uobj, struct devx_async_event_file,
2018 uobj);
2019
2020 if (uverbs_attr_is_valid(attrs,
2021 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM)) {
2022 err = uverbs_copy_from(&redirect_fd, attrs,
2023 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM);
2024 if (err)
2025 return err;
2026
2027 use_eventfd = true;
2028 }
2029
2030 if (uverbs_attr_is_valid(attrs,
2031 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE)) {
2032 if (use_eventfd)
2033 return -EINVAL;
2034
2035 err = uverbs_copy_from(&cookie, attrs,
2036 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE);
2037 if (err)
2038 return err;
2039 }
2040
2041 num_events = uverbs_attr_ptr_get_array_size(
2042 attrs, MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2043 sizeof(u16));
2044
2045 if (num_events < 0)
2046 return num_events;
2047
2048 if (num_events > MAX_NUM_EVENTS)
2049 return -EINVAL;
2050
2051 event_type_num_list = uverbs_attr_get_alloced_ptr(attrs,
2052 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST);
2053
2054 if (!is_valid_events(dev->mdev, num_events, event_type_num_list, obj))
2055 return -EINVAL;
2056
2057 INIT_LIST_HEAD(&sub_list);
2058
2059 /* Protect from concurrent subscriptions to same XA entries to allow
2060 * both to succeed
2061 */
2062 mutex_lock(&devx_event_table->event_xa_lock);
2063 for (i = 0; i < num_events; i++) {
2064 u32 key_level1;
2065
2066 if (obj)
2067 obj_type = get_dec_obj_type(obj,
2068 event_type_num_list[i]);
2069 key_level1 = event_type_num_list[i] | obj_type << 16;
2070
2071 err = subscribe_event_xa_alloc(devx_event_table,
2072 key_level1,
2073 obj,
2074 obj_id);
2075 if (err)
2076 goto err;
2077
2078 num_alloc_xa_entries++;
2079 event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL);
2080 if (!event_sub) {
2081 err = -ENOMEM;
2082 goto err;
2083 }
2084
2085 list_add_tail(&event_sub->event_list, &sub_list);
2086 uverbs_uobject_get(&ev_file->uobj);
2087 if (use_eventfd) {
2088 event_sub->eventfd =
2089 eventfd_ctx_fdget(redirect_fd);
2090
2091 if (IS_ERR(event_sub->eventfd)) {
2092 err = PTR_ERR(event_sub->eventfd);
2093 event_sub->eventfd = NULL;
2094 goto err;
2095 }
2096 }
2097
2098 event_sub->cookie = cookie;
2099 event_sub->ev_file = ev_file;
2100 /* May be needed upon cleanup the devx object/subscription */
2101 event_sub->xa_key_level1 = key_level1;
2102 event_sub->xa_key_level2 = obj_id;
2103 INIT_LIST_HEAD(&event_sub->obj_list);
2104 }
2105
2106 /* Once all the allocations and the XA data insertions were done we
2107 * can go ahead and add all the subscriptions to the relevant lists
2108 * without concern of a failure.
2109 */
2110 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2111 struct devx_event *event;
2112 struct devx_obj_event *obj_event;
2113
2114 list_del_init(&event_sub->event_list);
2115
2116 spin_lock_irq(&ev_file->lock);
2117 list_add_tail_rcu(&event_sub->file_list,
2118 &ev_file->subscribed_events_list);
2119 spin_unlock_irq(&ev_file->lock);
2120
2121 event = xa_load(&devx_event_table->event_xa,
2122 event_sub->xa_key_level1);
2123 WARN_ON(!event);
2124
2125 if (!obj) {
2126 list_add_tail_rcu(&event_sub->xa_list,
2127 &event->unaffiliated_list);
2128 continue;
2129 }
2130
2131 obj_event = xa_load(&event->object_ids, obj_id);
2132 WARN_ON(!obj_event);
2133 list_add_tail_rcu(&event_sub->xa_list,
2134 &obj_event->obj_sub_list);
2135 list_add_tail_rcu(&event_sub->obj_list,
2136 &obj->event_sub);
2137 }
2138
2139 mutex_unlock(&devx_event_table->event_xa_lock);
2140 return 0;
2141
2142 err:
2143 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2144 list_del(&event_sub->event_list);
2145
2146 subscribe_event_xa_dealloc(devx_event_table,
2147 event_sub->xa_key_level1,
2148 obj,
2149 obj_id);
2150
2151 if (event_sub->eventfd)
2152 eventfd_ctx_put(event_sub->eventfd);
2153 uverbs_uobject_put(&event_sub->ev_file->uobj);
2154 kfree(event_sub);
2155 }
2156
2157 mutex_unlock(&devx_event_table->event_xa_lock);
2158 return err;
2159 }
2160
devx_umem_get(struct mlx5_ib_dev * dev,struct ib_ucontext * ucontext,struct uverbs_attr_bundle * attrs,struct devx_umem * obj,u32 access_flags)2161 static int devx_umem_get(struct mlx5_ib_dev *dev, struct ib_ucontext *ucontext,
2162 struct uverbs_attr_bundle *attrs,
2163 struct devx_umem *obj, u32 access_flags)
2164 {
2165 u64 addr;
2166 size_t size;
2167 int err;
2168
2169 if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
2170 uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
2171 return -EFAULT;
2172
2173 err = ib_check_mr_access(&dev->ib_dev, access_flags);
2174 if (err)
2175 return err;
2176
2177 if (uverbs_attr_is_valid(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD)) {
2178 struct ib_umem_dmabuf *umem_dmabuf;
2179 int dmabuf_fd;
2180
2181 err = uverbs_get_raw_fd(&dmabuf_fd, attrs,
2182 MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD);
2183 if (err)
2184 return -EFAULT;
2185
2186 umem_dmabuf = ib_umem_dmabuf_get_pinned(
2187 &dev->ib_dev, addr, size, dmabuf_fd, access_flags);
2188 if (IS_ERR(umem_dmabuf))
2189 return PTR_ERR(umem_dmabuf);
2190 obj->umem = &umem_dmabuf->umem;
2191 } else {
2192 obj->umem = ib_umem_get(&dev->ib_dev, addr, size, access_flags);
2193 if (IS_ERR(obj->umem))
2194 return PTR_ERR(obj->umem);
2195 }
2196 return 0;
2197 }
2198
devx_umem_find_best_pgsize(struct ib_umem * umem,unsigned long pgsz_bitmap)2199 static unsigned int devx_umem_find_best_pgsize(struct ib_umem *umem,
2200 unsigned long pgsz_bitmap)
2201 {
2202 unsigned long page_size;
2203
2204 /* Don't bother checking larger page sizes as offset must be zero and
2205 * total DEVX umem length must be equal to total umem length.
2206 */
2207 pgsz_bitmap &= GENMASK_ULL(max_t(u64, order_base_2(umem->length),
2208 PAGE_SHIFT),
2209 MLX5_ADAPTER_PAGE_SHIFT);
2210 if (!pgsz_bitmap)
2211 return 0;
2212
2213 page_size = ib_umem_find_best_pgoff(umem, pgsz_bitmap, U64_MAX);
2214 if (!page_size)
2215 return 0;
2216
2217 /* If the page_size is less than the CPU page size then we can use the
2218 * offset and create a umem which is a subset of the page list.
2219 * For larger page sizes we can't be sure the DMA list reflects the
2220 * VA so we must ensure that the umem extent is exactly equal to the
2221 * page list. Reduce the page size until one of these cases is true.
2222 */
2223 while ((ib_umem_dma_offset(umem, page_size) != 0 ||
2224 (umem->length % page_size) != 0) &&
2225 page_size > PAGE_SIZE)
2226 page_size /= 2;
2227
2228 return page_size;
2229 }
2230
devx_umem_reg_cmd_alloc(struct mlx5_ib_dev * dev,struct uverbs_attr_bundle * attrs,struct devx_umem * obj,struct devx_umem_reg_cmd * cmd,int access)2231 static int devx_umem_reg_cmd_alloc(struct mlx5_ib_dev *dev,
2232 struct uverbs_attr_bundle *attrs,
2233 struct devx_umem *obj,
2234 struct devx_umem_reg_cmd *cmd,
2235 int access)
2236 {
2237 unsigned long pgsz_bitmap;
2238 unsigned int page_size;
2239 __be64 *mtt;
2240 void *umem;
2241 int ret;
2242
2243 /*
2244 * If the user does not pass in pgsz_bitmap then the user promises not
2245 * to use umem_offset!=0 in any commands that allocate on top of the
2246 * umem.
2247 *
2248 * If the user wants to use a umem_offset then it must pass in
2249 * pgsz_bitmap which guides the maximum page size and thus maximum
2250 * object alignment inside the umem. See the PRM.
2251 *
2252 * Users are not allowed to use IOVA here, mkeys are not supported on
2253 * umem.
2254 */
2255 ret = uverbs_get_const_default(&pgsz_bitmap, attrs,
2256 MLX5_IB_ATTR_DEVX_UMEM_REG_PGSZ_BITMAP,
2257 GENMASK_ULL(63,
2258 min(PAGE_SHIFT, MLX5_ADAPTER_PAGE_SHIFT)));
2259 if (ret)
2260 return ret;
2261
2262 page_size = devx_umem_find_best_pgsize(obj->umem, pgsz_bitmap);
2263 if (!page_size)
2264 return -EINVAL;
2265
2266 cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
2267 (MLX5_ST_SZ_BYTES(mtt) *
2268 ib_umem_num_dma_blocks(obj->umem, page_size));
2269 cmd->in = uverbs_zalloc(attrs, cmd->inlen);
2270 if (IS_ERR(cmd->in))
2271 return PTR_ERR(cmd->in);
2272
2273 umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
2274 mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
2275
2276 MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
2277 MLX5_SET64(umem, umem, num_of_mtt,
2278 ib_umem_num_dma_blocks(obj->umem, page_size));
2279 MLX5_SET(umem, umem, log_page_size,
2280 order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
2281 MLX5_SET(umem, umem, page_offset,
2282 ib_umem_dma_offset(obj->umem, page_size));
2283
2284 if (mlx5_umem_needs_ats(dev, obj->umem, access))
2285 MLX5_SET(umem, umem, ats, 1);
2286
2287 mlx5_ib_populate_pas(obj->umem, page_size, mtt,
2288 (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
2289 MLX5_IB_MTT_READ);
2290 return 0;
2291 }
2292
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)2293 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
2294 struct uverbs_attr_bundle *attrs)
2295 {
2296 struct devx_umem_reg_cmd cmd;
2297 struct devx_umem *obj;
2298 struct ib_uobject *uobj = uverbs_attr_get_uobject(
2299 attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2300 u32 obj_id;
2301 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2302 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2303 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2304 int access_flags;
2305 int err;
2306
2307 if (!c->devx_uid)
2308 return -EINVAL;
2309
2310 err = uverbs_get_flags32(&access_flags, attrs,
2311 MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2312 IB_ACCESS_LOCAL_WRITE |
2313 IB_ACCESS_REMOTE_WRITE |
2314 IB_ACCESS_REMOTE_READ |
2315 IB_ACCESS_RELAXED_ORDERING);
2316 if (err)
2317 return err;
2318
2319 obj = kzalloc(sizeof(struct devx_umem), GFP_KERNEL);
2320 if (!obj)
2321 return -ENOMEM;
2322
2323 err = devx_umem_get(dev, &c->ibucontext, attrs, obj, access_flags);
2324 if (err)
2325 goto err_obj_free;
2326
2327 err = devx_umem_reg_cmd_alloc(dev, attrs, obj, &cmd, access_flags);
2328 if (err)
2329 goto err_umem_release;
2330
2331 MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
2332 err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
2333 sizeof(cmd.out));
2334 if (err)
2335 goto err_umem_release;
2336
2337 obj->mdev = dev->mdev;
2338 uobj->object = obj;
2339 devx_obj_build_destroy_cmd(cmd.in, cmd.out, obj->dinbox, &obj->dinlen, &obj_id);
2340 uverbs_finalize_uobj_create(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2341
2342 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, &obj_id,
2343 sizeof(obj_id));
2344 return err;
2345
2346 err_umem_release:
2347 ib_umem_release(obj->umem);
2348 err_obj_free:
2349 kfree(obj);
2350 return err;
2351 }
2352
devx_umem_cleanup(struct ib_uobject * uobject,enum rdma_remove_reason why,struct uverbs_attr_bundle * attrs)2353 static int devx_umem_cleanup(struct ib_uobject *uobject,
2354 enum rdma_remove_reason why,
2355 struct uverbs_attr_bundle *attrs)
2356 {
2357 struct devx_umem *obj = uobject->object;
2358 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
2359 int err;
2360
2361 err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
2362 if (err)
2363 return err;
2364
2365 ib_umem_release(obj->umem);
2366 kfree(obj);
2367 return 0;
2368 }
2369
is_unaffiliated_event(struct mlx5_core_dev * dev,unsigned long event_type)2370 static bool is_unaffiliated_event(struct mlx5_core_dev *dev,
2371 unsigned long event_type)
2372 {
2373 __be64 *unaff_events;
2374 int mask_entry;
2375 int mask_bit;
2376
2377 if (!MLX5_CAP_GEN(dev, event_cap))
2378 return is_legacy_unaffiliated_event_num(event_type);
2379
2380 unaff_events = MLX5_CAP_DEV_EVENT(dev,
2381 user_unaffiliated_events);
2382 WARN_ON(event_type > MAX_SUPP_EVENT_NUM);
2383
2384 mask_entry = event_type / 64;
2385 mask_bit = event_type % 64;
2386
2387 if (!(be64_to_cpu(unaff_events[mask_entry]) & (1ull << mask_bit)))
2388 return false;
2389
2390 return true;
2391 }
2392
devx_get_obj_id_from_event(unsigned long event_type,void * data)2393 static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
2394 {
2395 struct mlx5_eqe *eqe = data;
2396 u32 obj_id = 0;
2397
2398 switch (event_type) {
2399 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
2400 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
2401 case MLX5_EVENT_TYPE_PATH_MIG:
2402 case MLX5_EVENT_TYPE_COMM_EST:
2403 case MLX5_EVENT_TYPE_SQ_DRAINED:
2404 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
2405 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
2406 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
2407 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
2408 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
2409 obj_id = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
2410 break;
2411 case MLX5_EVENT_TYPE_XRQ_ERROR:
2412 obj_id = be32_to_cpu(eqe->data.xrq_err.type_xrqn) & 0xffffff;
2413 break;
2414 case MLX5_EVENT_TYPE_DCT_DRAINED:
2415 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
2416 obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
2417 break;
2418 case MLX5_EVENT_TYPE_CQ_ERROR:
2419 obj_id = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
2420 break;
2421 default:
2422 obj_id = MLX5_GET(affiliated_event_header, &eqe->data, obj_id);
2423 break;
2424 }
2425
2426 return obj_id;
2427 }
2428
deliver_event(struct devx_event_subscription * event_sub,const void * data)2429 static int deliver_event(struct devx_event_subscription *event_sub,
2430 const void *data)
2431 {
2432 struct devx_async_event_file *ev_file;
2433 struct devx_async_event_data *event_data;
2434 unsigned long flags;
2435
2436 ev_file = event_sub->ev_file;
2437
2438 if (ev_file->omit_data) {
2439 spin_lock_irqsave(&ev_file->lock, flags);
2440 if (!list_empty(&event_sub->event_list) ||
2441 ev_file->is_destroyed) {
2442 spin_unlock_irqrestore(&ev_file->lock, flags);
2443 return 0;
2444 }
2445
2446 list_add_tail(&event_sub->event_list, &ev_file->event_list);
2447 spin_unlock_irqrestore(&ev_file->lock, flags);
2448 wake_up_interruptible(&ev_file->poll_wait);
2449 return 0;
2450 }
2451
2452 event_data = kzalloc(sizeof(*event_data) + sizeof(struct mlx5_eqe),
2453 GFP_ATOMIC);
2454 if (!event_data) {
2455 spin_lock_irqsave(&ev_file->lock, flags);
2456 ev_file->is_overflow_err = 1;
2457 spin_unlock_irqrestore(&ev_file->lock, flags);
2458 return -ENOMEM;
2459 }
2460
2461 event_data->hdr.cookie = event_sub->cookie;
2462 memcpy(event_data->hdr.out_data, data, sizeof(struct mlx5_eqe));
2463
2464 spin_lock_irqsave(&ev_file->lock, flags);
2465 if (!ev_file->is_destroyed)
2466 list_add_tail(&event_data->list, &ev_file->event_list);
2467 else
2468 kfree(event_data);
2469 spin_unlock_irqrestore(&ev_file->lock, flags);
2470 wake_up_interruptible(&ev_file->poll_wait);
2471
2472 return 0;
2473 }
2474
dispatch_event_fd(struct list_head * fd_list,const void * data)2475 static void dispatch_event_fd(struct list_head *fd_list,
2476 const void *data)
2477 {
2478 struct devx_event_subscription *item;
2479
2480 list_for_each_entry_rcu(item, fd_list, xa_list) {
2481 if (item->eventfd)
2482 eventfd_signal(item->eventfd, 1);
2483 else
2484 deliver_event(item, data);
2485 }
2486 }
2487
devx_event_notifier(struct notifier_block * nb,unsigned long event_type,void * data)2488 static int devx_event_notifier(struct notifier_block *nb,
2489 unsigned long event_type, void *data)
2490 {
2491 struct mlx5_devx_event_table *table;
2492 struct mlx5_ib_dev *dev;
2493 struct devx_event *event;
2494 struct devx_obj_event *obj_event;
2495 u16 obj_type = 0;
2496 bool is_unaffiliated;
2497 u32 obj_id;
2498
2499 /* Explicit filtering to kernel events which may occur frequently */
2500 if (event_type == MLX5_EVENT_TYPE_CMD ||
2501 event_type == MLX5_EVENT_TYPE_PAGE_REQUEST)
2502 return NOTIFY_OK;
2503
2504 table = container_of(nb, struct mlx5_devx_event_table, devx_nb.nb);
2505 dev = container_of(table, struct mlx5_ib_dev, devx_event_table);
2506 is_unaffiliated = is_unaffiliated_event(dev->mdev, event_type);
2507
2508 if (!is_unaffiliated)
2509 obj_type = get_event_obj_type(event_type, data);
2510
2511 rcu_read_lock();
2512 event = xa_load(&table->event_xa, event_type | (obj_type << 16));
2513 if (!event) {
2514 rcu_read_unlock();
2515 return NOTIFY_DONE;
2516 }
2517
2518 if (is_unaffiliated) {
2519 dispatch_event_fd(&event->unaffiliated_list, data);
2520 rcu_read_unlock();
2521 return NOTIFY_OK;
2522 }
2523
2524 obj_id = devx_get_obj_id_from_event(event_type, data);
2525 obj_event = xa_load(&event->object_ids, obj_id);
2526 if (!obj_event) {
2527 rcu_read_unlock();
2528 return NOTIFY_DONE;
2529 }
2530
2531 dispatch_event_fd(&obj_event->obj_sub_list, data);
2532
2533 rcu_read_unlock();
2534 return NOTIFY_OK;
2535 }
2536
mlx5_ib_devx_init(struct mlx5_ib_dev * dev)2537 int mlx5_ib_devx_init(struct mlx5_ib_dev *dev)
2538 {
2539 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2540 int uid;
2541
2542 uid = mlx5_ib_devx_create(dev, false);
2543 if (uid > 0) {
2544 dev->devx_whitelist_uid = uid;
2545 xa_init(&table->event_xa);
2546 mutex_init(&table->event_xa_lock);
2547 MLX5_NB_INIT(&table->devx_nb, devx_event_notifier, NOTIFY_ANY);
2548 mlx5_eq_notifier_register(dev->mdev, &table->devx_nb);
2549 }
2550
2551 return 0;
2552 }
2553
mlx5_ib_devx_cleanup(struct mlx5_ib_dev * dev)2554 void mlx5_ib_devx_cleanup(struct mlx5_ib_dev *dev)
2555 {
2556 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2557 struct devx_event_subscription *sub, *tmp;
2558 struct devx_event *event;
2559 void *entry;
2560 unsigned long id;
2561
2562 if (dev->devx_whitelist_uid) {
2563 mlx5_eq_notifier_unregister(dev->mdev, &table->devx_nb);
2564 mutex_lock(&dev->devx_event_table.event_xa_lock);
2565 xa_for_each(&table->event_xa, id, entry) {
2566 event = entry;
2567 list_for_each_entry_safe(
2568 sub, tmp, &event->unaffiliated_list, xa_list)
2569 devx_cleanup_subscription(dev, sub);
2570 kfree(entry);
2571 }
2572 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2573 xa_destroy(&table->event_xa);
2574
2575 mlx5_ib_devx_destroy(dev, dev->devx_whitelist_uid);
2576 }
2577 }
2578
devx_async_cmd_event_read(struct file * filp,char __user * buf,size_t count,loff_t * pos)2579 static ssize_t devx_async_cmd_event_read(struct file *filp, char __user *buf,
2580 size_t count, loff_t *pos)
2581 {
2582 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2583 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2584 struct devx_async_data *event;
2585 int ret = 0;
2586 size_t eventsz;
2587
2588 spin_lock_irq(&ev_queue->lock);
2589
2590 while (list_empty(&ev_queue->event_list)) {
2591 spin_unlock_irq(&ev_queue->lock);
2592
2593 if (filp->f_flags & O_NONBLOCK)
2594 return -EAGAIN;
2595
2596 if (wait_event_interruptible(
2597 ev_queue->poll_wait,
2598 (!list_empty(&ev_queue->event_list) ||
2599 ev_queue->is_destroyed))) {
2600 return -ERESTARTSYS;
2601 }
2602
2603 spin_lock_irq(&ev_queue->lock);
2604 if (ev_queue->is_destroyed) {
2605 spin_unlock_irq(&ev_queue->lock);
2606 return -EIO;
2607 }
2608 }
2609
2610 event = list_entry(ev_queue->event_list.next,
2611 struct devx_async_data, list);
2612 eventsz = event->cmd_out_len +
2613 sizeof(struct mlx5_ib_uapi_devx_async_cmd_hdr);
2614
2615 if (eventsz > count) {
2616 spin_unlock_irq(&ev_queue->lock);
2617 return -ENOSPC;
2618 }
2619
2620 list_del(ev_queue->event_list.next);
2621 spin_unlock_irq(&ev_queue->lock);
2622
2623 if (copy_to_user(buf, &event->hdr, eventsz))
2624 ret = -EFAULT;
2625 else
2626 ret = eventsz;
2627
2628 atomic_sub(event->cmd_out_len, &ev_queue->bytes_in_use);
2629 kvfree(event);
2630 return ret;
2631 }
2632
devx_async_cmd_event_poll(struct file * filp,struct poll_table_struct * wait)2633 static __poll_t devx_async_cmd_event_poll(struct file *filp,
2634 struct poll_table_struct *wait)
2635 {
2636 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2637 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2638 __poll_t pollflags = 0;
2639
2640 poll_wait(filp, &ev_queue->poll_wait, wait);
2641
2642 spin_lock_irq(&ev_queue->lock);
2643 if (ev_queue->is_destroyed)
2644 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2645 else if (!list_empty(&ev_queue->event_list))
2646 pollflags = EPOLLIN | EPOLLRDNORM;
2647 spin_unlock_irq(&ev_queue->lock);
2648
2649 return pollflags;
2650 }
2651
2652 static const struct file_operations devx_async_cmd_event_fops = {
2653 .owner = THIS_MODULE,
2654 .read = devx_async_cmd_event_read,
2655 .poll = devx_async_cmd_event_poll,
2656 .release = uverbs_uobject_fd_release,
2657 .llseek = no_llseek,
2658 };
2659
devx_async_event_read(struct file * filp,char __user * buf,size_t count,loff_t * pos)2660 static ssize_t devx_async_event_read(struct file *filp, char __user *buf,
2661 size_t count, loff_t *pos)
2662 {
2663 struct devx_async_event_file *ev_file = filp->private_data;
2664 struct devx_event_subscription *event_sub;
2665 struct devx_async_event_data *event;
2666 int ret = 0;
2667 size_t eventsz;
2668 bool omit_data;
2669 void *event_data;
2670
2671 omit_data = ev_file->omit_data;
2672
2673 spin_lock_irq(&ev_file->lock);
2674
2675 if (ev_file->is_overflow_err) {
2676 ev_file->is_overflow_err = 0;
2677 spin_unlock_irq(&ev_file->lock);
2678 return -EOVERFLOW;
2679 }
2680
2681
2682 while (list_empty(&ev_file->event_list)) {
2683 spin_unlock_irq(&ev_file->lock);
2684
2685 if (filp->f_flags & O_NONBLOCK)
2686 return -EAGAIN;
2687
2688 if (wait_event_interruptible(ev_file->poll_wait,
2689 (!list_empty(&ev_file->event_list) ||
2690 ev_file->is_destroyed))) {
2691 return -ERESTARTSYS;
2692 }
2693
2694 spin_lock_irq(&ev_file->lock);
2695 if (ev_file->is_destroyed) {
2696 spin_unlock_irq(&ev_file->lock);
2697 return -EIO;
2698 }
2699 }
2700
2701 if (omit_data) {
2702 event_sub = list_first_entry(&ev_file->event_list,
2703 struct devx_event_subscription,
2704 event_list);
2705 eventsz = sizeof(event_sub->cookie);
2706 event_data = &event_sub->cookie;
2707 } else {
2708 event = list_first_entry(&ev_file->event_list,
2709 struct devx_async_event_data, list);
2710 eventsz = sizeof(struct mlx5_eqe) +
2711 sizeof(struct mlx5_ib_uapi_devx_async_event_hdr);
2712 event_data = &event->hdr;
2713 }
2714
2715 if (eventsz > count) {
2716 spin_unlock_irq(&ev_file->lock);
2717 return -EINVAL;
2718 }
2719
2720 if (omit_data)
2721 list_del_init(&event_sub->event_list);
2722 else
2723 list_del(&event->list);
2724
2725 spin_unlock_irq(&ev_file->lock);
2726
2727 if (copy_to_user(buf, event_data, eventsz))
2728 /* This points to an application issue, not a kernel concern */
2729 ret = -EFAULT;
2730 else
2731 ret = eventsz;
2732
2733 if (!omit_data)
2734 kfree(event);
2735 return ret;
2736 }
2737
devx_async_event_poll(struct file * filp,struct poll_table_struct * wait)2738 static __poll_t devx_async_event_poll(struct file *filp,
2739 struct poll_table_struct *wait)
2740 {
2741 struct devx_async_event_file *ev_file = filp->private_data;
2742 __poll_t pollflags = 0;
2743
2744 poll_wait(filp, &ev_file->poll_wait, wait);
2745
2746 spin_lock_irq(&ev_file->lock);
2747 if (ev_file->is_destroyed)
2748 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2749 else if (!list_empty(&ev_file->event_list))
2750 pollflags = EPOLLIN | EPOLLRDNORM;
2751 spin_unlock_irq(&ev_file->lock);
2752
2753 return pollflags;
2754 }
2755
devx_free_subscription(struct rcu_head * rcu)2756 static void devx_free_subscription(struct rcu_head *rcu)
2757 {
2758 struct devx_event_subscription *event_sub =
2759 container_of(rcu, struct devx_event_subscription, rcu);
2760
2761 if (event_sub->eventfd)
2762 eventfd_ctx_put(event_sub->eventfd);
2763 uverbs_uobject_put(&event_sub->ev_file->uobj);
2764 kfree(event_sub);
2765 }
2766
2767 static const struct file_operations devx_async_event_fops = {
2768 .owner = THIS_MODULE,
2769 .read = devx_async_event_read,
2770 .poll = devx_async_event_poll,
2771 .release = uverbs_uobject_fd_release,
2772 .llseek = no_llseek,
2773 };
2774
devx_async_cmd_event_destroy_uobj(struct ib_uobject * uobj,enum rdma_remove_reason why)2775 static void devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
2776 enum rdma_remove_reason why)
2777 {
2778 struct devx_async_cmd_event_file *comp_ev_file =
2779 container_of(uobj, struct devx_async_cmd_event_file,
2780 uobj);
2781 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2782 struct devx_async_data *entry, *tmp;
2783
2784 spin_lock_irq(&ev_queue->lock);
2785 ev_queue->is_destroyed = 1;
2786 spin_unlock_irq(&ev_queue->lock);
2787 wake_up_interruptible(&ev_queue->poll_wait);
2788
2789 mlx5_cmd_cleanup_async_ctx(&comp_ev_file->async_ctx);
2790
2791 spin_lock_irq(&comp_ev_file->ev_queue.lock);
2792 list_for_each_entry_safe(entry, tmp,
2793 &comp_ev_file->ev_queue.event_list, list) {
2794 list_del(&entry->list);
2795 kvfree(entry);
2796 }
2797 spin_unlock_irq(&comp_ev_file->ev_queue.lock);
2798 };
2799
devx_async_event_destroy_uobj(struct ib_uobject * uobj,enum rdma_remove_reason why)2800 static void devx_async_event_destroy_uobj(struct ib_uobject *uobj,
2801 enum rdma_remove_reason why)
2802 {
2803 struct devx_async_event_file *ev_file =
2804 container_of(uobj, struct devx_async_event_file,
2805 uobj);
2806 struct devx_event_subscription *event_sub, *event_sub_tmp;
2807 struct mlx5_ib_dev *dev = ev_file->dev;
2808
2809 spin_lock_irq(&ev_file->lock);
2810 ev_file->is_destroyed = 1;
2811
2812 /* free the pending events allocation */
2813 if (ev_file->omit_data) {
2814 struct devx_event_subscription *event_sub, *tmp;
2815
2816 list_for_each_entry_safe(event_sub, tmp, &ev_file->event_list,
2817 event_list)
2818 list_del_init(&event_sub->event_list);
2819
2820 } else {
2821 struct devx_async_event_data *entry, *tmp;
2822
2823 list_for_each_entry_safe(entry, tmp, &ev_file->event_list,
2824 list) {
2825 list_del(&entry->list);
2826 kfree(entry);
2827 }
2828 }
2829
2830 spin_unlock_irq(&ev_file->lock);
2831 wake_up_interruptible(&ev_file->poll_wait);
2832
2833 mutex_lock(&dev->devx_event_table.event_xa_lock);
2834 /* delete the subscriptions which are related to this FD */
2835 list_for_each_entry_safe(event_sub, event_sub_tmp,
2836 &ev_file->subscribed_events_list, file_list) {
2837 devx_cleanup_subscription(dev, event_sub);
2838 list_del_rcu(&event_sub->file_list);
2839 /* subscription may not be used by the read API any more */
2840 call_rcu(&event_sub->rcu, devx_free_subscription);
2841 }
2842 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2843
2844 put_device(&dev->ib_dev.dev);
2845 };
2846
2847 DECLARE_UVERBS_NAMED_METHOD(
2848 MLX5_IB_METHOD_DEVX_UMEM_REG,
2849 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE,
2850 MLX5_IB_OBJECT_DEVX_UMEM,
2851 UVERBS_ACCESS_NEW,
2852 UA_MANDATORY),
2853 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR,
2854 UVERBS_ATTR_TYPE(u64),
2855 UA_MANDATORY),
2856 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_LEN,
2857 UVERBS_ATTR_TYPE(u64),
2858 UA_MANDATORY),
2859 UVERBS_ATTR_RAW_FD(MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD,
2860 UA_OPTIONAL),
2861 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2862 enum ib_access_flags),
2863 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_PGSZ_BITMAP,
2864 u64),
2865 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID,
2866 UVERBS_ATTR_TYPE(u32),
2867 UA_MANDATORY));
2868
2869 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2870 MLX5_IB_METHOD_DEVX_UMEM_DEREG,
2871 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE,
2872 MLX5_IB_OBJECT_DEVX_UMEM,
2873 UVERBS_ACCESS_DESTROY,
2874 UA_MANDATORY));
2875
2876 DECLARE_UVERBS_NAMED_METHOD(
2877 MLX5_IB_METHOD_DEVX_QUERY_EQN,
2878 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC,
2879 UVERBS_ATTR_TYPE(u32),
2880 UA_MANDATORY),
2881 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
2882 UVERBS_ATTR_TYPE(u32),
2883 UA_MANDATORY));
2884
2885 DECLARE_UVERBS_NAMED_METHOD(
2886 MLX5_IB_METHOD_DEVX_QUERY_UAR,
2887 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX,
2888 UVERBS_ATTR_TYPE(u32),
2889 UA_MANDATORY),
2890 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
2891 UVERBS_ATTR_TYPE(u32),
2892 UA_MANDATORY));
2893
2894 DECLARE_UVERBS_NAMED_METHOD(
2895 MLX5_IB_METHOD_DEVX_OTHER,
2896 UVERBS_ATTR_PTR_IN(
2897 MLX5_IB_ATTR_DEVX_OTHER_CMD_IN,
2898 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2899 UA_MANDATORY,
2900 UA_ALLOC_AND_COPY),
2901 UVERBS_ATTR_PTR_OUT(
2902 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT,
2903 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2904 UA_MANDATORY));
2905
2906 DECLARE_UVERBS_NAMED_METHOD(
2907 MLX5_IB_METHOD_DEVX_OBJ_CREATE,
2908 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE,
2909 MLX5_IB_OBJECT_DEVX_OBJ,
2910 UVERBS_ACCESS_NEW,
2911 UA_MANDATORY),
2912 UVERBS_ATTR_PTR_IN(
2913 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN,
2914 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2915 UA_MANDATORY,
2916 UA_ALLOC_AND_COPY),
2917 UVERBS_ATTR_PTR_OUT(
2918 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
2919 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2920 UA_MANDATORY));
2921
2922 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2923 MLX5_IB_METHOD_DEVX_OBJ_DESTROY,
2924 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE,
2925 MLX5_IB_OBJECT_DEVX_OBJ,
2926 UVERBS_ACCESS_DESTROY,
2927 UA_MANDATORY));
2928
2929 DECLARE_UVERBS_NAMED_METHOD(
2930 MLX5_IB_METHOD_DEVX_OBJ_MODIFY,
2931 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE,
2932 UVERBS_IDR_ANY_OBJECT,
2933 UVERBS_ACCESS_WRITE,
2934 UA_MANDATORY),
2935 UVERBS_ATTR_PTR_IN(
2936 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN,
2937 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2938 UA_MANDATORY,
2939 UA_ALLOC_AND_COPY),
2940 UVERBS_ATTR_PTR_OUT(
2941 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
2942 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2943 UA_MANDATORY));
2944
2945 DECLARE_UVERBS_NAMED_METHOD(
2946 MLX5_IB_METHOD_DEVX_OBJ_QUERY,
2947 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2948 UVERBS_IDR_ANY_OBJECT,
2949 UVERBS_ACCESS_READ,
2950 UA_MANDATORY),
2951 UVERBS_ATTR_PTR_IN(
2952 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2953 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2954 UA_MANDATORY,
2955 UA_ALLOC_AND_COPY),
2956 UVERBS_ATTR_PTR_OUT(
2957 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
2958 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2959 UA_MANDATORY));
2960
2961 DECLARE_UVERBS_NAMED_METHOD(
2962 MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY,
2963 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2964 UVERBS_IDR_ANY_OBJECT,
2965 UVERBS_ACCESS_READ,
2966 UA_MANDATORY),
2967 UVERBS_ATTR_PTR_IN(
2968 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2969 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2970 UA_MANDATORY,
2971 UA_ALLOC_AND_COPY),
2972 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN,
2973 u16, UA_MANDATORY),
2974 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD,
2975 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2976 UVERBS_ACCESS_READ,
2977 UA_MANDATORY),
2978 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID,
2979 UVERBS_ATTR_TYPE(u64),
2980 UA_MANDATORY));
2981
2982 DECLARE_UVERBS_NAMED_METHOD(
2983 MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT,
2984 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE,
2985 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2986 UVERBS_ACCESS_READ,
2987 UA_MANDATORY),
2988 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE,
2989 MLX5_IB_OBJECT_DEVX_OBJ,
2990 UVERBS_ACCESS_READ,
2991 UA_OPTIONAL),
2992 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2993 UVERBS_ATTR_MIN_SIZE(sizeof(u16)),
2994 UA_MANDATORY,
2995 UA_ALLOC_AND_COPY),
2996 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE,
2997 UVERBS_ATTR_TYPE(u64),
2998 UA_OPTIONAL),
2999 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM,
3000 UVERBS_ATTR_TYPE(u32),
3001 UA_OPTIONAL));
3002
3003 DECLARE_UVERBS_GLOBAL_METHODS(MLX5_IB_OBJECT_DEVX,
3004 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OTHER),
3005 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_UAR),
3006 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_EQN),
3007 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT));
3008
3009 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_OBJ,
3010 UVERBS_TYPE_ALLOC_IDR(devx_obj_cleanup),
3011 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_CREATE),
3012 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_DESTROY),
3013 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_MODIFY),
3014 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_QUERY),
3015 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY));
3016
3017 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_UMEM,
3018 UVERBS_TYPE_ALLOC_IDR(devx_umem_cleanup),
3019 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_REG),
3020 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_DEREG));
3021
3022
3023 DECLARE_UVERBS_NAMED_METHOD(
3024 MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC,
3025 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE,
3026 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3027 UVERBS_ACCESS_NEW,
3028 UA_MANDATORY));
3029
3030 DECLARE_UVERBS_NAMED_OBJECT(
3031 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3032 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_cmd_event_file),
3033 devx_async_cmd_event_destroy_uobj,
3034 &devx_async_cmd_event_fops, "[devx_async_cmd]",
3035 O_RDONLY),
3036 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC));
3037
3038 DECLARE_UVERBS_NAMED_METHOD(
3039 MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC,
3040 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE,
3041 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3042 UVERBS_ACCESS_NEW,
3043 UA_MANDATORY),
3044 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
3045 enum mlx5_ib_uapi_devx_create_event_channel_flags,
3046 UA_MANDATORY));
3047
3048 DECLARE_UVERBS_NAMED_OBJECT(
3049 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3050 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_event_file),
3051 devx_async_event_destroy_uobj,
3052 &devx_async_event_fops, "[devx_async_event]",
3053 O_RDONLY),
3054 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC));
3055
devx_is_supported(struct ib_device * device)3056 static bool devx_is_supported(struct ib_device *device)
3057 {
3058 struct mlx5_ib_dev *dev = to_mdev(device);
3059
3060 return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
3061 }
3062
3063 const struct uapi_definition mlx5_ib_devx_defs[] = {
3064 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3065 MLX5_IB_OBJECT_DEVX,
3066 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3067 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3068 MLX5_IB_OBJECT_DEVX_OBJ,
3069 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3070 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3071 MLX5_IB_OBJECT_DEVX_UMEM,
3072 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3073 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3074 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3075 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3076 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3077 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3078 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3079 {},
3080 };
3081