1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * SiS 300/540/630[S]/730[S],
4  * SiS 315[E|PRO]/550/[M]65x/[M]661[F|M]X/740/[M]741[GX]/330/[M]76x[GX],
5  * XGI V3XT/V5/V8, Z7
6  * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
7  *
8  * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
9  */
10 
11 #ifndef _SIS_H_
12 #define _SIS_H_
13 
14 #include <video/sisfb.h>
15 
16 #include "vgatypes.h"
17 #include "vstruct.h"
18 
19 #define VER_MAJOR		1
20 #define VER_MINOR		8
21 #define VER_LEVEL		9
22 
23 #include <linux/spinlock.h>
24 
25 #ifdef CONFIG_COMPAT
26 #define SIS_NEW_CONFIG_COMPAT
27 #endif	/* CONFIG_COMPAT */
28 
29 #undef SISFBDEBUG
30 
31 #ifdef SISFBDEBUG
32 #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
33 #define TWDEBUG(x) printk(KERN_INFO x "\n");
34 #else
35 #define DPRINTK(fmt, args...)
36 #define TWDEBUG(x)
37 #endif
38 
39 #define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
40 
41 /* To be included in pci_ids.h */
42 #ifndef PCI_DEVICE_ID_SI_650_VGA
43 #define PCI_DEVICE_ID_SI_650_VGA	0x6325
44 #endif
45 #ifndef PCI_DEVICE_ID_SI_650
46 #define PCI_DEVICE_ID_SI_650		0x0650
47 #endif
48 #ifndef PCI_DEVICE_ID_SI_651
49 #define PCI_DEVICE_ID_SI_651		0x0651
50 #endif
51 #ifndef PCI_DEVICE_ID_SI_740
52 #define PCI_DEVICE_ID_SI_740		0x0740
53 #endif
54 #ifndef PCI_DEVICE_ID_SI_330
55 #define PCI_DEVICE_ID_SI_330		0x0330
56 #endif
57 #ifndef PCI_DEVICE_ID_SI_660_VGA
58 #define PCI_DEVICE_ID_SI_660_VGA	0x6330
59 #endif
60 #ifndef PCI_DEVICE_ID_SI_661
61 #define PCI_DEVICE_ID_SI_661		0x0661
62 #endif
63 #ifndef PCI_DEVICE_ID_SI_741
64 #define PCI_DEVICE_ID_SI_741		0x0741
65 #endif
66 #ifndef PCI_DEVICE_ID_SI_660
67 #define PCI_DEVICE_ID_SI_660		0x0660
68 #endif
69 #ifndef PCI_DEVICE_ID_SI_760
70 #define PCI_DEVICE_ID_SI_760		0x0760
71 #endif
72 #ifndef PCI_DEVICE_ID_SI_761
73 #define PCI_DEVICE_ID_SI_761		0x0761
74 #endif
75 
76 #ifndef PCI_VENDOR_ID_XGI
77 #define PCI_VENDOR_ID_XGI		0x18ca
78 #endif
79 
80 #ifndef PCI_DEVICE_ID_XGI_20
81 #define PCI_DEVICE_ID_XGI_20		0x0020
82 #endif
83 
84 #ifndef PCI_DEVICE_ID_XGI_40
85 #define PCI_DEVICE_ID_XGI_40		0x0040
86 #endif
87 
88 /* To be included in fb.h */
89 #ifndef FB_ACCEL_SIS_GLAMOUR_2
90 #define FB_ACCEL_SIS_GLAMOUR_2	40	/* SiS 315, 65x, 740, 661, 741  */
91 #endif
92 #ifndef FB_ACCEL_SIS_XABRE
93 #define FB_ACCEL_SIS_XABRE	41	/* SiS 330 ("Xabre"), 76x 	*/
94 #endif
95 #ifndef FB_ACCEL_XGI_VOLARI_V
96 #define FB_ACCEL_XGI_VOLARI_V	47	/* XGI Volari Vx (V3XT, V5, V8)	*/
97 #endif
98 #ifndef FB_ACCEL_XGI_VOLARI_Z
99 #define FB_ACCEL_XGI_VOLARI_Z	48	/* XGI Volari Z7		*/
100 #endif
101 
102 /* ivideo->caps */
103 #define HW_CURSOR_CAP		0x80
104 #define TURBO_QUEUE_CAP		0x40
105 #define AGP_CMD_QUEUE_CAP	0x20
106 #define VM_CMD_QUEUE_CAP	0x10
107 #define MMIO_CMD_QUEUE_CAP	0x08
108 
109 /* For 300 series */
110 #define TURBO_QUEUE_AREA_SIZE	(512 * 1024)	/* 512K */
111 #define HW_CURSOR_AREA_SIZE_300	4096		/* 4K */
112 
113 /* For 315/Xabre series */
114 #define COMMAND_QUEUE_AREA_SIZE	(512 * 1024)	/* 512K */
115 #define COMMAND_QUEUE_AREA_SIZE_Z7 (128 * 1024)	/* 128k for XGI Z7 */
116 #define HW_CURSOR_AREA_SIZE_315	16384		/* 16K */
117 #define COMMAND_QUEUE_THRESHOLD	0x1F
118 
119 #define SIS_OH_ALLOC_SIZE	4000
120 #define SENTINEL		0x7fffffff
121 
122 #define SEQ_ADR			0x14
123 #define SEQ_DATA		0x15
124 #define DAC_ADR			0x18
125 #define DAC_DATA		0x19
126 #define CRTC_ADR		0x24
127 #define CRTC_DATA		0x25
128 #define DAC2_ADR		(0x16-0x30)
129 #define DAC2_DATA		(0x17-0x30)
130 #define VB_PART1_ADR		(0x04-0x30)
131 #define VB_PART1_DATA		(0x05-0x30)
132 #define VB_PART2_ADR		(0x10-0x30)
133 #define VB_PART2_DATA		(0x11-0x30)
134 #define VB_PART3_ADR		(0x12-0x30)
135 #define VB_PART3_DATA		(0x13-0x30)
136 #define VB_PART4_ADR		(0x14-0x30)
137 #define VB_PART4_DATA		(0x15-0x30)
138 
139 #define SISSR			ivideo->SiS_Pr.SiS_P3c4
140 #define SISCR			ivideo->SiS_Pr.SiS_P3d4
141 #define SISDACA			ivideo->SiS_Pr.SiS_P3c8
142 #define SISDACD			ivideo->SiS_Pr.SiS_P3c9
143 #define SISPART1		ivideo->SiS_Pr.SiS_Part1Port
144 #define SISPART2		ivideo->SiS_Pr.SiS_Part2Port
145 #define SISPART3		ivideo->SiS_Pr.SiS_Part3Port
146 #define SISPART4		ivideo->SiS_Pr.SiS_Part4Port
147 #define SISPART5		ivideo->SiS_Pr.SiS_Part5Port
148 #define SISDAC2A		SISPART5
149 #define SISDAC2D		(SISPART5 + 1)
150 #define SISMISCR		(ivideo->SiS_Pr.RelIO + 0x1c)
151 #define SISMISCW		ivideo->SiS_Pr.SiS_P3c2
152 #define SISINPSTAT		(ivideo->SiS_Pr.RelIO + 0x2a)
153 #define SISPEL			ivideo->SiS_Pr.SiS_P3c6
154 #define SISVGAENABLE		(ivideo->SiS_Pr.RelIO + 0x13)
155 #define SISVID			(ivideo->SiS_Pr.RelIO + 0x02 - 0x30)
156 #define SISCAP			(ivideo->SiS_Pr.RelIO + 0x00 - 0x30)
157 
158 #define IND_SIS_PASSWORD		0x05  /* SRs */
159 #define IND_SIS_COLOR_MODE		0x06
160 #define IND_SIS_RAMDAC_CONTROL		0x07
161 #define IND_SIS_DRAM_SIZE		0x14
162 #define IND_SIS_MODULE_ENABLE		0x1E
163 #define IND_SIS_PCI_ADDRESS_SET		0x20
164 #define IND_SIS_TURBOQUEUE_ADR		0x26
165 #define IND_SIS_TURBOQUEUE_SET		0x27
166 #define IND_SIS_POWER_ON_TRAP		0x38
167 #define IND_SIS_POWER_ON_TRAP2		0x39
168 #define IND_SIS_CMDQUEUE_SET		0x26
169 #define IND_SIS_CMDQUEUE_THRESHOLD	0x27
170 
171 #define IND_SIS_AGP_IO_PAD	0x48
172 
173 #define SIS_CRT2_WENABLE_300	0x24  /* Part1 */
174 #define SIS_CRT2_WENABLE_315	0x2F
175 
176 #define SIS_PASSWORD		0x86  /* SR05 */
177 
178 #define SIS_INTERLACED_MODE	0x20  /* SR06 */
179 #define SIS_8BPP_COLOR_MODE	0x0
180 #define SIS_15BPP_COLOR_MODE	0x1
181 #define SIS_16BPP_COLOR_MODE	0x2
182 #define SIS_32BPP_COLOR_MODE	0x4
183 
184 #define SIS_ENABLE_2D		0x40  /* SR1E */
185 
186 #define SIS_MEM_MAP_IO_ENABLE	0x01  /* SR20 */
187 #define SIS_PCI_ADDR_ENABLE	0x80
188 
189 #define SIS_AGP_CMDQUEUE_ENABLE		0x80  /* 315/330/340 series SR26 */
190 #define SIS_VRAM_CMDQUEUE_ENABLE	0x40
191 #define SIS_MMIO_CMD_ENABLE		0x20
192 #define SIS_CMD_QUEUE_SIZE_512k		0x00
193 #define SIS_CMD_QUEUE_SIZE_1M		0x04
194 #define SIS_CMD_QUEUE_SIZE_2M		0x08
195 #define SIS_CMD_QUEUE_SIZE_4M		0x0C
196 #define SIS_CMD_QUEUE_RESET		0x01
197 #define SIS_CMD_AUTO_CORR		0x02
198 
199 #define SIS_CMD_QUEUE_SIZE_Z7_64k	0x00 /* XGI Z7 */
200 #define SIS_CMD_QUEUE_SIZE_Z7_128k	0x04
201 
202 #define SIS_SIMULTANEOUS_VIEW_ENABLE	0x01  /* CR30 */
203 #define SIS_MODE_SELECT_CRT2		0x02
204 #define SIS_VB_OUTPUT_COMPOSITE		0x04
205 #define SIS_VB_OUTPUT_SVIDEO		0x08
206 #define SIS_VB_OUTPUT_SCART		0x10
207 #define SIS_VB_OUTPUT_LCD		0x20
208 #define SIS_VB_OUTPUT_CRT2		0x40
209 #define SIS_VB_OUTPUT_HIVISION		0x80
210 
211 #define SIS_VB_OUTPUT_DISABLE	0x20  /* CR31 */
212 #define SIS_DRIVER_MODE		0x40
213 
214 #define SIS_VB_COMPOSITE	0x01  /* CR32 */
215 #define SIS_VB_SVIDEO		0x02
216 #define SIS_VB_SCART		0x04
217 #define SIS_VB_LCD		0x08
218 #define SIS_VB_CRT2		0x10
219 #define SIS_CRT1		0x20
220 #define SIS_VB_HIVISION		0x40
221 #define SIS_VB_YPBPR		0x80
222 #define SIS_VB_TV		(SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
223 				SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
224 
225 #define SIS_EXTERNAL_CHIP_MASK			0x0E  /* CR37 (< SiS 660) */
226 #define SIS_EXTERNAL_CHIP_SIS301		0x01  /* in CR37 << 1 ! */
227 #define SIS_EXTERNAL_CHIP_LVDS			0x02
228 #define SIS_EXTERNAL_CHIP_TRUMPION		0x03
229 #define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL		0x04
230 #define SIS_EXTERNAL_CHIP_CHRONTEL		0x05
231 #define SIS310_EXTERNAL_CHIP_LVDS		0x02
232 #define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL	0x03
233 
234 #define SIS_AGP_2X		0x20  /* CR48 */
235 
236 /* vbflags, private entries (others in sisfb.h) */
237 #define VB_CONEXANT		0x00000800	/* 661 series only */
238 #define VB_TRUMPION		VB_CONEXANT	/* 300 series only */
239 #define VB_302ELV		0x00004000
240 #define VB_301			0x00100000	/* Video bridge type */
241 #define VB_301B			0x00200000
242 #define VB_302B			0x00400000
243 #define VB_30xBDH		0x00800000	/* 30xB DH version (w/o LCD support) */
244 #define VB_LVDS			0x01000000
245 #define VB_CHRONTEL		0x02000000
246 #define VB_301LV		0x04000000
247 #define VB_302LV		0x08000000
248 #define VB_301C			0x10000000
249 
250 #define VB_SISBRIDGE		(VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
251 #define VB_VIDEOBRIDGE		(VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
252 
253 /* vbflags2 (static stuff only!) */
254 #define VB2_SISUMC		0x00000001
255 #define VB2_301			0x00000002	/* Video bridge type */
256 #define VB2_301B		0x00000004
257 #define VB2_301C		0x00000008
258 #define VB2_307T		0x00000010
259 #define VB2_302B		0x00000800
260 #define VB2_301LV		0x00001000
261 #define VB2_302LV		0x00002000
262 #define VB2_302ELV		0x00004000
263 #define VB2_307LV		0x00008000
264 #define VB2_30xBDH		0x08000000      /* 30xB DH version (w/o LCD support) */
265 #define VB2_CONEXANT		0x10000000
266 #define VB2_TRUMPION		0x20000000
267 #define VB2_LVDS		0x40000000
268 #define VB2_CHRONTEL		0x80000000
269 
270 #define VB2_SISLVDSBRIDGE	(VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
271 #define VB2_SISTMDSBRIDGE	(VB2_301   | VB2_301B  | VB2_301C   | VB2_302B | VB2_307T)
272 #define VB2_SISBRIDGE		(VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE)
273 
274 #define VB2_SISTMDSLCDABRIDGE	(VB2_301C | VB2_307T)
275 #define VB2_SISLCDABRIDGE	(VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
276 
277 #define VB2_SISHIVISIONBRIDGE	(VB2_301  | VB2_301B | VB2_302B)
278 #define VB2_SISYPBPRBRIDGE	(VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE)
279 #define VB2_SISYPBPRARBRIDGE	(VB2_301C | VB2_307T | VB2_307LV)
280 #define VB2_SISTAP4SCALER	(VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV)
281 #define VB2_SISTVBRIDGE		(VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE)
282 
283 #define VB2_SISVGA2BRIDGE	(VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
284 
285 #define VB2_VIDEOBRIDGE		(VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT)
286 
287 #define VB2_30xB		(VB2_301B  | VB2_301C   | VB2_302B  | VB2_307T)
288 #define VB2_30xBLV		(VB2_30xB  | VB2_SISLVDSBRIDGE)
289 #define VB2_30xC		(VB2_301C  | VB2_307T)
290 #define VB2_30xCLV		(VB2_301C  | VB2_307T   | VB2_302ELV| VB2_307LV)
291 #define VB2_SISEMIBRIDGE	(VB2_302LV | VB2_302ELV | VB2_307LV)
292 #define VB2_LCD162MHZBRIDGE	(VB2_301C  | VB2_307T)
293 #define VB2_LCDOVER1280BRIDGE	(VB2_301C  | VB2_307T   | VB2_302LV | VB2_302ELV | VB2_307LV)
294 #define VB2_LCDOVER1600BRIDGE	(VB2_307T  | VB2_307LV)
295 #define VB2_RAMDAC202MHZBRIDGE	(VB2_301C  | VB2_307T)
296 
297 /* I/O port access functions */
298 
299 void SiS_SetReg(SISIOADDRESS, u8, u8);
300 void SiS_SetRegByte(SISIOADDRESS, u8);
301 void SiS_SetRegShort(SISIOADDRESS, u16);
302 void SiS_SetRegLong(SISIOADDRESS, u32);
303 void SiS_SetRegANDOR(SISIOADDRESS, u8, u8, u8);
304 void SiS_SetRegAND(SISIOADDRESS, u8, u8);
305 void SiS_SetRegOR(SISIOADDRESS, u8, u8);
306 u8 SiS_GetReg(SISIOADDRESS, u8);
307 u8 SiS_GetRegByte(SISIOADDRESS);
308 u16 SiS_GetRegShort(SISIOADDRESS);
309 u32 SiS_GetRegLong(SISIOADDRESS);
310 
311 /* Chrontel TV, DDC and DPMS functions */
312 /* from init.c */
313 bool		SiSInitPtr(struct SiS_Private *SiS_Pr);
314 unsigned short	SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
315 				int VDisplay, int Depth, bool FSTN,
316 				unsigned short CustomT, int LCDwith, int LCDheight,
317 				unsigned int VBFlags2);
318 unsigned short	SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
319 				int VDisplay, int Depth, unsigned int VBFlags2);
320 unsigned short	SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
321 				int VDisplay, int Depth, unsigned int VBFlags2);
322 
323 void		SiS_DisplayOn(struct SiS_Private *SiS_Pr);
324 void		SiS_DisplayOff(struct SiS_Private *SiS_Pr);
325 void		SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
326 void		SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
327 void		SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
328 unsigned short	SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
329 				unsigned short ModeIdIndex);
330 bool		SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
331 
332 bool		SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
333 				unsigned short *ModeIdIndex);
334 unsigned short	SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
335 				unsigned short ModeIdIndex);
336 unsigned short  SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
337 unsigned short  SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
338 unsigned short	SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
339 				unsigned short ModeIdIndex);
340 unsigned short	SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo,
341 				unsigned short ModeIdIndex, unsigned short RRTI);
342 #ifdef CONFIG_FB_SIS_300
343 void		SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
344 				unsigned short *idx2);
345 unsigned short	SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2);
346 unsigned short	SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
347 #endif
348 void		SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
349 bool		SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
350 void		SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
351 void		SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
352 				unsigned short ModeIdIndex);
353 void		SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
354 				int yres, struct fb_var_screeninfo *var, bool writeres);
355 
356 /* From init301.c: */
357 extern void		SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
358 				unsigned short ModeIdIndex, int chkcrt2mode);
359 extern void		SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
360 				unsigned short ModeIdIndex);
361 extern void		SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
362 extern void		SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
363 				unsigned short ModeIdIndex);
364 extern void		SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
365 extern void		SiS_DisableBridge(struct SiS_Private *);
366 extern bool		SiS_SetCRT2Group(struct SiS_Private *, unsigned short);
367 extern unsigned short	SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
368 				unsigned short ModeIdIndex);
369 extern void		SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
370 extern unsigned short	SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
371 				unsigned short ModeIdIndex);
372 extern unsigned short	SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
373 extern unsigned short	SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
374 				unsigned short ModeIdIndex, unsigned short RRTI);
375 extern bool		SiS_IsVAMode(struct SiS_Private *);
376 extern bool		SiS_IsDualEdge(struct SiS_Private *);
377 
378 #ifdef CONFIG_FB_SIS_300
379 extern unsigned int	sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
380 extern void		sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg,
381 				unsigned int val);
382 #endif
383 #ifdef CONFIG_FB_SIS_315
384 extern void		sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg,
385 				unsigned char val);
386 extern unsigned int	sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
387 #endif
388 
389 
390 /* MMIO access macros */
391 #define MMIO_IN8(base, offset)  readb((base+offset))
392 #define MMIO_IN16(base, offset) readw((base+offset))
393 #define MMIO_IN32(base, offset) readl((base+offset))
394 
395 #define MMIO_OUT8(base, offset, val)  writeb(((u8)(val)), (base+offset))
396 #define MMIO_OUT16(base, offset, val) writew(((u16)(val)), (base+offset))
397 #define MMIO_OUT32(base, offset, val) writel(((u32)(val)), (base+offset))
398 
399 /* Queue control MMIO registers */
400 #define Q_BASE_ADDR		0x85C0  /* Base address of software queue */
401 #define Q_WRITE_PTR		0x85C4  /* Current write pointer */
402 #define Q_READ_PTR		0x85C8  /* Current read pointer */
403 #define Q_STATUS		0x85CC  /* queue status */
404 
405 #define MMIO_QUEUE_PHYBASE      Q_BASE_ADDR
406 #define MMIO_QUEUE_WRITEPORT    Q_WRITE_PTR
407 #define MMIO_QUEUE_READPORT     Q_READ_PTR
408 
409 #ifndef FB_BLANK_UNBLANK
410 #define FB_BLANK_UNBLANK	0
411 #endif
412 #ifndef FB_BLANK_NORMAL
413 #define FB_BLANK_NORMAL		1
414 #endif
415 #ifndef FB_BLANK_VSYNC_SUSPEND
416 #define FB_BLANK_VSYNC_SUSPEND	2
417 #endif
418 #ifndef FB_BLANK_HSYNC_SUSPEND
419 #define FB_BLANK_HSYNC_SUSPEND	3
420 #endif
421 #ifndef FB_BLANK_POWERDOWN
422 #define FB_BLANK_POWERDOWN	4
423 #endif
424 
425 enum _SIS_LCD_TYPE {
426     LCD_INVALID = 0,
427     LCD_800x600,
428     LCD_1024x768,
429     LCD_1280x1024,
430     LCD_1280x960,
431     LCD_640x480,
432     LCD_1600x1200,
433     LCD_1920x1440,
434     LCD_2048x1536,
435     LCD_320x240,	/* FSTN */
436     LCD_1400x1050,
437     LCD_1152x864,
438     LCD_1152x768,
439     LCD_1280x768,
440     LCD_1024x600,
441     LCD_320x240_2,	/* DSTN */
442     LCD_320x240_3,	/* DSTN */
443     LCD_848x480,
444     LCD_1280x800,
445     LCD_1680x1050,
446     LCD_1280x720,
447     LCD_1280x854,
448     LCD_CUSTOM,
449     LCD_UNKNOWN
450 };
451 
452 enum _SIS_CMDTYPE {
453     MMIO_CMD = 0,
454     AGP_CMD_QUEUE,
455     VM_CMD_QUEUE,
456 };
457 
458 struct SIS_OH {
459 	struct SIS_OH *poh_next;
460 	struct SIS_OH *poh_prev;
461 	u32            offset;
462 	u32            size;
463 };
464 
465 struct SIS_OHALLOC {
466 	struct SIS_OHALLOC *poha_next;
467 	struct SIS_OH aoh[1];
468 };
469 
470 struct SIS_HEAP {
471 	struct SIS_OH	oh_free;
472 	struct SIS_OH	oh_used;
473 	struct SIS_OH	*poh_freelist;
474 	struct SIS_OHALLOC *poha_chain;
475 	u32		max_freesize;
476 	struct sis_video_info *vinfo;
477 };
478 
479 /* Our "par" */
480 struct sis_video_info {
481 	int		cardnumber;
482 	struct fb_info  *memyselfandi;
483 
484 	struct SiS_Private SiS_Pr;
485 
486 	struct sisfb_info sisfbinfo;	/* For ioctl SISFB_GET_INFO */
487 
488 	struct fb_var_screeninfo default_var;
489 
490 	struct fb_fix_screeninfo sisfb_fix;
491 	u32		pseudo_palette[16];
492 
493 	struct sisfb_monitor {
494 		u16 hmin;
495 		u16 hmax;
496 		u16 vmin;
497 		u16 vmax;
498 		u32 dclockmax;
499 		u8  feature;
500 		bool datavalid;
501 	}		sisfb_thismonitor;
502 
503 	unsigned short	chip_id;	/* PCI ID of chip */
504 	unsigned short	chip_vendor;	/* PCI ID of vendor */
505 	char		myid[40];
506 
507 	struct pci_dev  *nbridge;
508 	struct pci_dev  *lpcdev;
509 
510 	int		mni;	/* Mode number index */
511 
512 	unsigned long	video_size;
513 	unsigned long	video_base;
514 	unsigned long	mmio_size;
515 	unsigned long	mmio_base;
516 	unsigned long	vga_base;
517 
518 	unsigned long	video_offset;
519 
520 	unsigned long	UMAsize, LFBsize;
521 
522 	void __iomem	*video_vbase;
523 	void __iomem	*mmio_vbase;
524 
525 	unsigned char	*bios_abase;
526 
527 	int		wc_cookie;
528 
529 	u32		sisfb_mem;
530 
531 	u32		sisfb_parm_mem;
532 	int		sisfb_accel;
533 	int		sisfb_ypan;
534 	int		sisfb_max;
535 	int		sisfb_userom;
536 	int		sisfb_useoem;
537 	int		sisfb_mode_idx;
538 	int		sisfb_parm_rate;
539 	int		sisfb_crt1off;
540 	int		sisfb_forcecrt1;
541 	int		sisfb_crt2type;
542 	int		sisfb_crt2flags;
543 	int		sisfb_dstn;
544 	int		sisfb_fstn;
545 	int		sisfb_tvplug;
546 	int		sisfb_tvstd;
547 	int		sisfb_nocrt2rate;
548 
549 	u32		heapstart;		/* offset  */
550 	void __iomem	*sisfb_heap_start;	/* address */
551 	void __iomem	*sisfb_heap_end;	/* address */
552 	u32		sisfb_heap_size;
553 	int		havenoheap;
554 
555 	struct SIS_HEAP	sisfb_heap;		/* This card's vram heap */
556 
557 	int		video_bpp;
558 	int		video_cmap_len;
559 	int		video_width;
560 	int		video_height;
561 	unsigned int	refresh_rate;
562 
563 	unsigned int	chip;
564 	unsigned int	chip_real_id;
565 	u8		revision_id;
566 	int		sisvga_enabled;		/* PCI device was enabled */
567 
568 	int		video_linelength;	/* real pitch */
569 	int		scrnpitchCRT1;		/* pitch regarding interlace */
570 
571 	u16		DstColor;		/* For 2d acceleration */
572 	u32		SiS310_AccelDepth;
573 	u32		CommandReg;
574 	int		cmdqueuelength;		/* Current (for accel) */
575 	u32		cmdQueueSize;		/* Total size in KB */
576 
577 	spinlock_t	lockaccel;		/* Do not use outside of kernel! */
578 
579 	unsigned int	pcibus;
580 	unsigned int	pcislot;
581 	unsigned int	pcifunc;
582 
583 	int		accel;
584 	int		engineok;
585 
586 	u16		subsysvendor;
587 	u16		subsysdevice;
588 
589 	u32		vbflags;		/* Replacing deprecated stuff from above */
590 	u32		currentvbflags;
591 	u32		vbflags2;
592 
593 	int		lcdxres, lcdyres;
594 	int		lcddefmodeidx, tvdefmodeidx, defmodeidx;
595 	u32		CRT2LCDType;		/* defined in "SIS_LCD_TYPE" */
596 	u32		curFSTN, curDSTN;
597 
598 	int		current_bpp;
599 	int		current_width;
600 	int		current_height;
601 	int		current_htotal;
602 	int		current_vtotal;
603 	int		current_linelength;
604 	__u32		current_pixclock;
605 	int		current_refresh_rate;
606 
607 	unsigned int	current_base;
608 
609 	u8		mode_no;
610 	u8		rate_idx;
611 	int		modechanged;
612 	unsigned char	modeprechange;
613 
614 	u8		sisfb_lastrates[128];
615 
616 	int		newrom;
617 	int		haveXGIROM;
618 	int		registered;
619 	int		warncount;
620 
621 	int		sisvga_engine;
622 	int		hwcursor_size;
623 	int		CRT2_write_enable;
624 	u8		caps;
625 
626 	u8		detectedpdc;
627 	u8		detectedpdca;
628 	u8		detectedlcda;
629 
630 	void __iomem	*hwcursor_vbase;
631 
632 	int		chronteltype;
633 	int		tvxpos, tvypos;
634 	u8		p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
635 	int		tvx, tvy;
636 
637 	u8		sisfblocked;
638 
639 	struct sisfb_info sisfb_infoblock;
640 
641 	struct sisfb_cmd sisfb_command;
642 
643 	u32		sisfb_id;
644 
645 	u8		sisfb_can_post;
646 	u8		sisfb_card_posted;
647 	u8		sisfb_was_boot_device;
648 
649 	struct sis_video_info *next;
650 };
651 
652 /* from sis_accel.c */
653 extern void	fbcon_sis_fillrect(struct fb_info *info,
654 				const struct fb_fillrect *rect);
655 extern void	fbcon_sis_copyarea(struct fb_info *info,
656 				const struct fb_copyarea *area);
657 extern int	fbcon_sis_sync(struct fb_info *info);
658 
659 /* Internal 2D accelerator functions */
660 extern int	sisfb_initaccel(struct sis_video_info *ivideo);
661 extern void	sisfb_syncaccel(struct sis_video_info *ivideo);
662 
663 /* Internal general routines */
664 #ifdef CONFIG_FB_SIS_300
665 unsigned int	sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
666 void		sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val);
667 unsigned int	sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
668 #endif
669 #ifdef CONFIG_FB_SIS_315
670 void		sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val);
671 unsigned int	sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
672 #endif
673 
674 /* SiS-specific exported functions */
675 void			sis_malloc(struct sis_memreq *req);
676 void			sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req);
677 void			sis_free(u32 base);
678 void			sis_free_new(struct pci_dev *pdev, u32 base);
679 
680 /* Routines from init.c/init301.c */
681 extern unsigned short	SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
682 				int VDisplay, int Depth, bool FSTN, unsigned short CustomT,
683 				int LCDwith, int LCDheight, unsigned int VBFlags2);
684 extern unsigned short	SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
685 				int VDisplay, int Depth, unsigned int VBFlags2);
686 extern unsigned short	SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
687 				int VDisplay, int Depth, unsigned int VBFlags2);
688 extern void		SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
689 extern bool		SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
690 extern void		SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
691 extern void		SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
692 
693 extern bool		SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
694 
695 extern bool		sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
696 				int *htotal, int *vtotal, unsigned char rateindex);
697 extern int		sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
698 				unsigned char modeno, unsigned char rateindex);
699 extern int		sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
700 				unsigned char rateindex, struct fb_var_screeninfo *var);
701 
702 
703 #endif
704